[PATCH] arm: stm32mp: move dbgmcu_init call when DT is ready

As the dbgmcu_init use the function bsec_dbgswenable which is based on the DM and DT, its call can't be done before the spl is initialized (driver model, DT and malloc) in board_init_f::spl_early_init().
This function call is moved later in spl_board_init().
Fixes: bd3f60d29c24 ("arm: stm32mp: protect DBGMCU_IDC access with BSEC")
Signed-off-by: Patrick Delaunay patrick.delaunay@st.com ---
arch/arm/mach-stm32mp/Kconfig | 1 + arch/arm/mach-stm32mp/cpu.c | 12 ++++++++---- 2 files changed, 9 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig index 4003c2e38b..478fd2f17d 100644 --- a/arch/arm/mach-stm32mp/Kconfig +++ b/arch/arm/mach-stm32mp/Kconfig @@ -1,6 +1,7 @@ if ARCH_STM32MP
config SPL + select SPL_BOARD_INIT select SPL_CLK select SPL_DM select SPL_DM_SEQ_ALIAS diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c index 382067190c..56092c8bf6 100644 --- a/arch/arm/mach-stm32mp/cpu.c +++ b/arch/arm/mach-stm32mp/cpu.c @@ -154,15 +154,20 @@ static void security_init(void) */ static void dbgmcu_init(void) { - setbits_le32(RCC_DBGCFGR, RCC_DBGCFGR_DBGCKEN); - /* * Freeze IWDG2 if Cortex-A7 is in debug mode * done in TF-A for TRUSTED boot and * DBGMCU access is controlled by BSEC_DENABLE.DBGSWENABLE */ - if (!IS_ENABLED(CONFIG_TFABOOT) && bsec_dbgswenable()) + if (!IS_ENABLED(CONFIG_TFABOOT) && bsec_dbgswenable()) { + setbits_le32(RCC_DBGCFGR, RCC_DBGCFGR_DBGCKEN); setbits_le32(DBGMCU_APB4FZ1, DBGMCU_APB4FZ1_IWDG2); + } +} + +void spl_board_init(void) +{ + dbgmcu_init(); } #endif /* !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) */
@@ -241,7 +246,6 @@ int arch_cpu_init(void) timer_init();
#if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) - dbgmcu_init(); #ifndef CONFIG_TFABOOT security_init(); update_bootmode();

On 7/24/20 11:13 AM, Patrick Delaunay wrote:
As the dbgmcu_init use the function bsec_dbgswenable which is based on the DM and DT, its call can't be done before the spl is initialized (driver model, DT and malloc) in board_init_f::spl_early_init().
This function call is moved later in spl_board_init().
Fixes: bd3f60d29c24 ("arm: stm32mp: protect DBGMCU_IDC access with BSEC")
Signed-off-by: Patrick Delaunay patrick.delaunay@st.com
arch/arm/mach-stm32mp/Kconfig | 1 + arch/arm/mach-stm32mp/cpu.c | 12 ++++++++---- 2 files changed, 9 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig index 4003c2e38b..478fd2f17d 100644 --- a/arch/arm/mach-stm32mp/Kconfig +++ b/arch/arm/mach-stm32mp/Kconfig @@ -1,6 +1,7 @@ if ARCH_STM32MP
config SPL
- select SPL_BOARD_INIT select SPL_CLK select SPL_DM select SPL_DM_SEQ_ALIAS
diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c index 382067190c..56092c8bf6 100644 --- a/arch/arm/mach-stm32mp/cpu.c +++ b/arch/arm/mach-stm32mp/cpu.c @@ -154,15 +154,20 @@ static void security_init(void) */ static void dbgmcu_init(void) {
- setbits_le32(RCC_DBGCFGR, RCC_DBGCFGR_DBGCKEN);
- /*
*/
- Freeze IWDG2 if Cortex-A7 is in debug mode
- done in TF-A for TRUSTED boot and
- DBGMCU access is controlled by BSEC_DENABLE.DBGSWENABLE
- if (!IS_ENABLED(CONFIG_TFABOOT) && bsec_dbgswenable())
- if (!IS_ENABLED(CONFIG_TFABOOT) && bsec_dbgswenable()) {
setbits_le32(DBGMCU_APB4FZ1, DBGMCU_APB4FZ1_IWDG2);setbits_le32(RCC_DBGCFGR, RCC_DBGCFGR_DBGCKEN);
- }
+}
+void spl_board_init(void) +{
- dbgmcu_init();
} #endif /* !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) */
@@ -241,7 +246,6 @@ int arch_cpu_init(void) timer_init();
#if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
- dbgmcu_init();
#ifndef CONFIG_TFABOOT security_init(); update_bootmode();
Reviewed-by: Patrice Chotard patrice.chotard@st.com
Thanks
Patrice

On 7/28/20 3:53 PM, Patrice CHOTARD wrote:
On 7/24/20 11:13 AM, Patrick Delaunay wrote:
As the dbgmcu_init use the function bsec_dbgswenable which is based on the DM and DT, its call can't be done before the spl is initialized (driver model, DT and malloc) in board_init_f::spl_early_init().
This function call is moved later in spl_board_init().
Fixes: bd3f60d29c24 ("arm: stm32mp: protect DBGMCU_IDC access with BSEC")
Signed-off-by: Patrick Delaunay patrick.delaunay@st.com
arch/arm/mach-stm32mp/Kconfig | 1 + arch/arm/mach-stm32mp/cpu.c | 12 ++++++++---- 2 files changed, 9 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig index 4003c2e38b..478fd2f17d 100644 --- a/arch/arm/mach-stm32mp/Kconfig +++ b/arch/arm/mach-stm32mp/Kconfig @@ -1,6 +1,7 @@ if ARCH_STM32MP
config SPL
- select SPL_BOARD_INIT select SPL_CLK select SPL_DM select SPL_DM_SEQ_ALIAS
diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c index 382067190c..56092c8bf6 100644 --- a/arch/arm/mach-stm32mp/cpu.c +++ b/arch/arm/mach-stm32mp/cpu.c @@ -154,15 +154,20 @@ static void security_init(void) */ static void dbgmcu_init(void) {
- setbits_le32(RCC_DBGCFGR, RCC_DBGCFGR_DBGCKEN);
- /*
*/
- Freeze IWDG2 if Cortex-A7 is in debug mode
- done in TF-A for TRUSTED boot and
- DBGMCU access is controlled by BSEC_DENABLE.DBGSWENABLE
- if (!IS_ENABLED(CONFIG_TFABOOT) && bsec_dbgswenable())
- if (!IS_ENABLED(CONFIG_TFABOOT) && bsec_dbgswenable()) {
setbits_le32(DBGMCU_APB4FZ1, DBGMCU_APB4FZ1_IWDG2);setbits_le32(RCC_DBGCFGR, RCC_DBGCFGR_DBGCKEN);
- }
+}
+void spl_board_init(void) +{
- dbgmcu_init();
} #endif /* !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) */
@@ -241,7 +246,6 @@ int arch_cpu_init(void) timer_init();
#if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
- dbgmcu_init();
#ifndef CONFIG_TFABOOT security_init(); update_bootmode();
Reviewed-by: Patrice Chotard patrice.chotard@st.com
Thanks
Patrice _______________________________________________ Uboot-stm32 mailing list Uboot-stm32@st-md-mailman.stormreply.com https://st-md-mailman.stormreply.com/mailman/listinfo/uboot-stm32
Applied to u-boot-stm/master
Thanks
Patrice
participants (2)
-
Patrice CHOTARD
-
Patrick Delaunay