[U-Boot] [PATCH] MX53: Handle silicon revision 2.1 case
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com --- arch/arm/cpu/armv7/mx5/soc.c | 3 +++ arch/arm/include/asm/arch-mx5/imx-regs.h | 1 + 2 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/mx5/soc.c b/arch/arm/cpu/armv7/mx5/soc.c index 6f4e8db..fa7ee6d 100644 --- a/arch/arm/cpu/armv7/mx5/soc.c +++ b/arch/arm/cpu/armv7/mx5/soc.c @@ -69,6 +69,9 @@ u32 get_cpu_rev(void) case 0x20: system_rev |= CHIP_REV_2_0; break; + case 0x21: + system_rev |= CHIP_REV_2_1; + break; default: system_rev |= CHIP_REV_1_0; break; diff --git a/arch/arm/include/asm/arch-mx5/imx-regs.h b/arch/arm/include/asm/arch-mx5/imx-regs.h index a1849f8..2d3d501 100644 --- a/arch/arm/include/asm/arch-mx5/imx-regs.h +++ b/arch/arm/include/asm/arch-mx5/imx-regs.h @@ -175,6 +175,7 @@ #define CHIP_REV_1_0 0x10 #define CHIP_REV_1_1 0x11 #define CHIP_REV_2_0 0x20 +#define CHIP_REV_2_1 0x21 #define CHIP_REV_2_5 0x25 #define CHIP_REV_3_0 0x30
On 04/26/2011 02:46 AM, Fabio Estevam wrote:
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com
arch/arm/cpu/armv7/mx5/soc.c | 3 +++ arch/arm/include/asm/arch-mx5/imx-regs.h | 1 + 2 files changed, 4 insertions(+), 0 deletions(-)
Hi Fabio,
diff --git a/arch/arm/cpu/armv7/mx5/soc.c b/arch/arm/cpu/armv7/mx5/soc.c index 6f4e8db..fa7ee6d 100644 --- a/arch/arm/cpu/armv7/mx5/soc.c +++ b/arch/arm/cpu/armv7/mx5/soc.c @@ -69,6 +69,9 @@ u32 get_cpu_rev(void) case 0x20: system_rev |= CHIP_REV_2_0; break;
- case 0x21:
system_rev |= CHIP_REV_2_1;break;
At the moment it seems to me that the revision number corresponds 1:1 to the value of the register in the i.MX53, and we do not need some mapping as for i.MX51. What about to drop the switch and adding a simpler:
if (reg < 0x20) system_rev |= CHIP_REV_1_0; else system_rev |= reg;
Best regards, Stefano
participants (2)
-
Fabio Estevam -
Stefano Babic