On 15 July 2014 06:26, Simon Glass sjg@chromium.org wrote:

At present sandbox has its own table of supported SPI flash chips. Now that the SPI flash system is fully consolidated and has its own list, sandbox should use that.

This enables us to expand the number of chips that sandbox supports.

Signed-off-by: Simon Glass sjg@chromium.org

drivers/mtd/spi/sandbox.c | 114 ++++++++++++++++------------------------------ 1 file changed, 38 insertions(+), 76 deletions(-)

Reviewed-by: Jagannadha Sutradharudu Teki jaganna@xilinx.com

diff --git a/drivers/mtd/spi/sandbox.c b/drivers/mtd/spi/sandbox.c index a62ef4c..98e0a34 100644 --- a/drivers/mtd/spi/sandbox.c +++ b/drivers/mtd/spi/sandbox.c @@ -51,46 +51,7 @@ static const char *sandbox_sf_state_name(enum sandbox_sf_state state) /* Assume all SPI flashes have 3 byte addresses since they do atm */ #define SF_ADDR_LEN 3

-struct sandbox_spi_flash_erase_commands {

•   u8 cmd;
  

•   u32 size;
  

-}; -#define IDCODE_LEN 5 -#define MAX_ERASE_CMDS 3 -struct sandbox_spi_flash_data {

•   const char *name;
  

•   u8 idcode[IDCODE_LEN];
  

•   u32 size;
  

•   const struct sandbox_spi_flash_erase_commands
  

•                                           erase_cmds[MAX_ERASE_CMDS];
  

-};

-/* Structure describing all the flashes we know how to emulate */ -static const struct sandbox_spi_flash_data sandbox_sf_flashes[] = {

•   {
  

•           "M25P16", { 0x20, 0x20, 0x15 }, (2 << 20),
  

•           {       /* erase commands */
  

•                   { 0xd8, (64 << 10), }, /* sector */
  

•                   { 0xc7, (2 << 20), }, /* bulk */
  

•           },
  

•   },
  

•   {
  

•           "W25Q32", { 0xef, 0x40, 0x16 }, (4 << 20),
  

•           {       /* erase commands */
  

•                   { 0x20, (4 << 10), }, /* 4KB */
  

•                   { 0xd8, (64 << 10), }, /* sector */
  

•                   { 0xc7, (4 << 20), }, /* bulk */
  

•           },
  

•   },
  

•   {
  

•           "W25Q128", { 0xef, 0x40, 0x18 }, (16 << 20),
  

•           {       /* erase commands */
  

•                   { 0x20, (4 << 10), }, /* 4KB */
  

•                   { 0xd8, (64 << 10), }, /* sector */
  

•                   { 0xc7, (16 << 20), }, /* bulk */
  

•           },
  

•   },
  

-}; +#define IDCODE_LEN 3

/* Used to quickly bulk erase backing store */ static u8 sandbox_sf_0xff[0x1000]; @@ -109,7 +70,8 @@ struct sandbox_spi_flash { */ enum sandbox_sf_state state; uint cmd;

•   const void *cmd_data;
  

•   /* Erase size of current erase command */
  

•   uint erase_size;
    /* Current position in the flash; used when reading/writing/etc... */
    uint off;
    /* How many address bytes we've consumed */
  

@@ -117,7 +79,7 @@ struct sandbox_spi_flash { /* The current flash status (see STAT_XXX defines above) */ u16 status; /* Data describing the flash we're emulating */

•   const struct sandbox_spi_flash_data *data;
  

•   const struct spi_flash_params *data;
    /* The file on disk to serv up data from */
    int fd;
  

}; @@ -127,8 +89,8 @@ static int sandbox_sf_setup(void **priv, const char *spec) /* spec = idcode:file */ struct sandbox_spi_flash *sbsf; const char *file;

•   size_t i, len, idname_len;
  

•   const struct sandbox_spi_flash_data *data;
  

•   size_t len, idname_len;
  

•   const struct spi_flash_params *data;
  
    file = strchr(spec, ':');
    if (!file) {
  

@@ -138,15 +100,14 @@ static int sandbox_sf_setup(void **priv, const char *spec) idname_len = file - spec; ++file;

•   for (i = 0; i < ARRAY_SIZE(sandbox_sf_flashes); ++i) {
  

•           data = &sandbox_sf_flashes[i];
  

•   for (data = spi_flash_params_table; data->name; data++) {
            len = strlen(data->name);
            if (idname_len != len)
                    continue;
            if (!memcmp(spec, data->name, len))
                    break;
    }
  

•   if (i == ARRAY_SIZE(sandbox_sf_flashes)) {
  

•   if (!data->name) {
            printf("sandbox_sf: unknown flash '%*s'\n", (int)idname_len,
                   spec);
            goto error;
  

@@ -223,7 +184,6 @@ static int sandbox_sf_process_cmd(struct sandbox_spi_flash *sbsf, const u8 *rx, sbsf->pad_addr_bytes = 1; case CMD_READ_ARRAY_SLOW: case CMD_PAGE_PROGRAM:

• state_addr: sbsf->state = SF_ADDR; break; case CMD_WRITE_DISABLE:

@@ -241,24 +201,25 @@ static int sandbox_sf_process_cmd(struct sandbox_spi_flash *sbsf, const u8 *rx, sbsf->status |= STAT_WEL; break; default: {

•           size_t i;
  

•           /* handle erase commands first */
  

•           for (i = 0; i < MAX_ERASE_CMDS; ++i) {
  

•                   const struct sandbox_spi_flash_erase_commands *
  

•                           erase_cmd = &sbsf->data->erase_cmds[i];
  

•                   if (erase_cmd->cmd == 0x00)
  

•                           continue;
  

•                   if (sbsf->cmd != erase_cmd->cmd)
  

•                           continue;
  

•                   sbsf->cmd_data = erase_cmd;
  

•                   goto state_addr;
  

•           int flags = sbsf->data->flags;
  

•           /* we only support erase here */
  

•           if (sbsf->cmd == CMD_ERASE_CHIP) {
  

•                   sbsf->erase_size = sbsf->data->sector_size *
  

•                           sbsf->data->nr_sectors;
  

•           } else if (sbsf->cmd == CMD_ERASE_4K && (flags & SECT_4K)) {
  

•                   sbsf->erase_size = 4 << 10;
  

•           } else if (sbsf->cmd == CMD_ERASE_32K && (flags & SECT_32K)) {
  

•                   sbsf->erase_size = 32 << 10;
  

•           } else if (sbsf->cmd == CMD_ERASE_64K &&
  

•                      !(flags & (SECT_4K | SECT_32K))) {
  

•                   sbsf->erase_size = 64 << 10;
  

•           } else {
  

•                   debug(" cmd unknown: %#x\n", sbsf->cmd);
  

•                   return 1;
            }
  

•           debug(" cmd unknown: %#x\n", sbsf->cmd);
  

•           return 1;
  

•           sbsf->state = SF_ADDR;
  

•           break;
    }
    }
  
  

@@ -309,11 +270,14 @@ static int sandbox_sf_xfer(void *priv, const u8 *rx, u8 *tx, u8 id;

                    debug(" id: off:%u tx:", sbsf->off);

•                   if (sbsf->off < IDCODE_LEN)
  

•                           id = sbsf->data->idcode[sbsf->off];
  

•                   else
  

•                   if (sbsf->off < IDCODE_LEN) {
  

•                           /* Extract correct byte from ID 0x00aabbcc */
  

•                           id = sbsf->data->jedec >>
  

•                                   (8 * (IDCODE_LEN - 1 - sbsf->off));
  

•                   } else {
                            id = 0;
  

•                   debug("%02x\n", id);
  

•                   }
  

•                   debug("%d %02x\n", sbsf->off, id);
                    tx[pos++] = id;
                    ++sbsf->off;
                    break;
  

@@ -406,24 +370,22 @@ static int sandbox_sf_xfer(void *priv, const u8 *rx, u8 *tx, break; case SF_ERASE: case_sf_erase: {

•                   const struct sandbox_spi_flash_erase_commands *
  

•                                           erase_cmd = sbsf->cmd_data;
  

•                   if (!(sbsf->status & STAT_WEL)) {
                            puts("sandbox_sf: write enable not set before erase\n");
                            goto done;
                    }
  
                    /* verify address is aligned */
  

•                   if (sbsf->off & (erase_cmd->size - 1)) {
  

•                   if (sbsf->off & (sbsf->erase_size - 1)) {
                            debug(" sector erase: cmd:%#x needs align:%#x, but we got %#x\n",
  

•                                 erase_cmd->cmd, erase_cmd->size,
  

•                                 sbsf->cmd, sbsf->erase_size,
                                  sbsf->off);
                            sbsf->status &= ~STAT_WEL;
                            goto done;
                    }
  
  

•                   debug(" sector erase addr: %u\n", sbsf->off);
  

•                   debug(" sector erase addr: %u, size: %u\n", sbsf->off,
  

•                         sbsf->erase_size);
  
                    cnt = bytes - pos;
                    sandbox_spi_tristate(&tx[pos], cnt);
  

@@ -433,7 +395,7 @@ static int sandbox_sf_xfer(void *priv, const u8 *rx, u8 *tx, * TODO(vapier@gentoo.org): latch WIP in status, and * delay before clearing it ? */

•                   ret = sandbox_erase_part(sbsf, erase_cmd->size);
  

•                   ret = sandbox_erase_part(sbsf, sbsf->erase_size);
                    sbsf->status &= ~STAT_WEL;
                    if (ret) {
                            debug("sandbox_sf: Erase failed\n");
  

-- 2.0.0.526.g5318336

thanks!

On 15 July 2014 06:26, Simon Glass sjg@chromium.org wrote:

Sandbox may as well support everything. This increases the amount of code that is built/tested by sandbox, and also provides access to all the supported SPI flash devices.

Signed-off-by: Simon Glass sjg@chromium.org

include/configs/sandbox.h | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-)

Reviewed-by: Jagannadha Sutradharudu Teki jaganna@xilinx.com

diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index f5fa4b3..5e4e5fc 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -94,7 +94,7 @@ #define CONFIG_ENV_SIZE 8192 #define CONFIG_ENV_IS_NOWHERE

-/* SPI */ +/* SPI - enable all SPI flash types for testing purposes */ #define CONFIG_SANDBOX_SPI #define CONFIG_CMD_SF #define CONFIG_CMD_SF_TEST @@ -102,7 +102,13 @@ #define CONFIG_SPI_FLASH #define CONFIG_OF_SPI #define CONFIG_OF_SPI_FLASH +#define CONFIG_SPI_FLASH_ATMEL +#define CONFIG_SPI_FLASH_EON +#define CONFIG_SPI_FLASH_GIGADEVICE +#define CONFIG_SPI_FLASH_MACRONIX #define CONFIG_SPI_FLASH_SANDBOX +#define CONFIG_SPI_FLASH_SPANSION +#define CONFIG_SPI_FLASH_SST #define CONFIG_SPI_FLASH_STMICRO #define CONFIG_SPI_FLASH_WINBOND

-- 2.0.0.526.g5318336

thanks!

Hi Simon,

On 15 July 2014 06:26, Simon Glass sjg@chromium.org wrote:

Add a SPI device which can be used for testing SPI flash features in sandbox.

Also add a cros_ec device since with driver model the Chrome OS EC emulation will not otherwise be available.

Signed-off-by: Simon Glass sjg@chromium.org

arch/sandbox/dts/sandbox.dts | 25 +++++++++++++++++++++++++ doc/device-tree-bindings/mtd/spi/m25p80.txt | 29 +++++++++++++++++++++++++++++ 2 files changed, 54 insertions(+) create mode 100644 doc/device-tree-bindings/mtd/spi/m25p80.txt

diff --git a/arch/sandbox/dts/sandbox.dts b/arch/sandbox/dts/sandbox.dts index daf5e73..fad1fae 100644 --- a/arch/sandbox/dts/sandbox.dts +++ b/arch/sandbox/dts/sandbox.dts @@ -1,6 +1,9 @@ /dts-v1/;

/ {

•   #address-cells = <1>;
  

•   #size-cells = <0>;
  

•   aliases {
            console = "/serial";
    };
  

@@ -131,5 +134,27 @@ num-gpios = <20>; };

•   spi@0 {
  

•           #address-cells = <1>;
  

•           #size-cells = <0>;
  

•           reg = <0>;
  

•           compatible = "sandbox,spi";
  

•           cs-gpios = <0>, <&gpio_a 0>;
  

•           flash@0 {
  

•                   reg = <0>;
  

•                   compatible = "spansion,m25p16", "sandbox,spi-flash";
  

•                   spi-max-frequency = <40000000>;
  

•                   sandbox,filename = "spi.bin";
  

•           };
  

•   };
  

•   cros-ec@0 {
  

•           compatible = "google,cros-ec";
  

•           #address-cells = <1>;
  

•           #size-cells = <1>;
  

•           firmware_storage_spi: flash@0 {
  

•                   reg = <0 0x400000>;
  

•           };
  

•   };
  
  

}; diff --git a/doc/device-tree-bindings/mtd/spi/m25p80.txt b/doc/device-tree-bindings/mtd/spi/m25p80.txt new file mode 100644 index 0000000..6d3d576 --- /dev/null +++ b/doc/device-tree-bindings/mtd/spi/m25p80.txt @@ -0,0 +1,29 @@ +* MTD SPI driver for ST M25Pxx (and similar) serial flash chips

+Required properties: +- #address-cells, #size-cells : Must be present if the device has sub-nodes

• representing partitions.

+- compatible : Should be the manufacturer and the name of the chip. Bear in mind

•           the DT binding is not Linux-only, but in case of Linux, see the
  

•           "m25p_ids" table in drivers/mtd/devices/m25p80.c for the list of
  

•           supported chips.
  

+- reg : Chip-Select number +- spi-max-frequency : Maximum frequency of the SPI bus the chip can operate at

+Optional properties: +- m25p,fast-read : Use the "fast read" opcode to read data from the chip instead

•               of the usual "read" opcode. This opcode is not supported by
  

•               all chips and support for it can not be detected at runtime.
  

•               Refer to your chips' datasheet to check if this is supported
  

•               by your chip.
  

+Example:

•   flash: m25p80@0 {
  

•           #address-cells = <1>;
  

•           #size-cells = <1>;
  

•           compatible = "spansion,m25p80";
  

•           reg = <0>;
  

•           spi-max-frequency = <40000000>;
  

•           m25p,fast-read;
  

•   };
  

-- 2.0.0.526.g5318336

Please add doc-binding stuff more specific to your usage and w/o having any Linux stuff/terminologies as of now.

thanks!

On 15 July 2014 06:26, Simon Glass sjg@chromium.org wrote:

In preparation for changing the error handling in this code for driver model, move it into its own function.

Signed-off-by: Simon Glass sjg@chromium.org

common/cmd_spi.c | 53 ++++++++++++++++++++++++++++++++--------------------- 1 file changed, 32 insertions(+), 21 deletions(-)

Reviewed-by: Jagannadha Sutradharudu Teki jaganna@xilinx.com

diff --git a/common/cmd_spi.c b/common/cmd_spi.c index 3c8e913..be5709c 100644 --- a/common/cmd_spi.c +++ b/common/cmd_spi.c @@ -11,6 +11,7 @@

#include <common.h> #include <command.h> +#include <errno.h> #include <spi.h>

/*----------------------------------------------------------------------- @@ -38,6 +39,35 @@ static int bitlen; static uchar dout[MAX_SPI_BYTES]; static uchar din[MAX_SPI_BYTES];

+static int do_spi_xfer(int bus, int cs) +{

•   struct spi_slave *slave;
  

•   int rcode = 0;
  

•   slave = spi_setup_slave(bus, cs, 1000000, mode);
  

•   if (!slave) {
  

•           printf("Invalid device %d:%d\n", bus, cs);
  

•           return -EINVAL;
  

•   }
  

•   spi_claim_bus(slave);
  

•   if (spi_xfer(slave, bitlen, dout, din,
  

•                SPI_XFER_BEGIN | SPI_XFER_END) != 0) {
  

•           printf("Error during SPI transaction\n");
  

•           rcode = -EIO;
  

•   } else {
  

•           int j;
  

•           for (j = 0; j < ((bitlen + 7) / 8); j++)
  

•                   printf("%02X", din[j]);
  

•           printf("\n");
  

•   }
  

•   spi_release_bus(slave);
  

•   spi_free_slave(slave);
  

•   return rcode;
  

+}

/*

• SPI read/write

@@ -51,11 +81,9 @@ static uchar din[MAX_SPI_BYTES];

int do_spi (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) {

•   struct spi_slave *slave;
    char  *cp = 0;
    uchar tmp;
    int   j;
  

•   int   rcode = 0;
  
    /*
     * We use the last specified parameters, unless new ones are
  

@@ -103,27 +131,10 @@ int do_spi (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) return 1; }

•   slave = spi_setup_slave(bus, cs, 1000000, mode);
  

•   if (!slave) {
  

•           printf("Invalid device %d:%d\n", bus, cs);
  

•   if (do_spi_xfer(bus, cs))
            return 1;
  

•   }
  

•   spi_claim_bus(slave);
  

•   if(spi_xfer(slave, bitlen, dout, din,
  

•                           SPI_XFER_BEGIN | SPI_XFER_END) != 0) {
  

•           printf("Error during SPI transaction\n");
  

•           rcode = 1;
  

•   } else {
  

•           for(j = 0; j < ((bitlen + 7) / 8); j++) {
  

•                   printf("%02X", din[j]);
  

•           }
  

•           printf("\n");
  

•   }
  

•   spi_release_bus(slave);
  

•   spi_free_slave(slave);
  
  

•   return rcode;
  

•   return 0;
  

}

/***************************************************/

2.0.0.526.g5318336

thanks!

On 15 July 2014 06:26, Simon Glass sjg@chromium.org wrote:

Add a uclass which provides access to SPI buses and includes operations required by SPI.

For a time driver model will need to co-exist with the legacy SPI interface so some parts of the header file are changed depending on which is in use. The exports are adjusted also since some functions are not available with driver model.

Boards must define CONFIG_DM_SPI to use driver model for SPI.

Signed-off-by: Simon Glass sjg@chromium.org

common/exports.c | 4 +- drivers/spi/Makefile | 4 + drivers/spi/spi-uclass.c | 253 +++++++++++++++++++++++++++++++++++++++++++++++ include/dm/uclass-id.h | 1 + include/spi.h | 140 ++++++++++++++++++++++++++ 5 files changed, 401 insertions(+), 1 deletion(-) create mode 100644 drivers/spi/spi-uclass.c

diff --git a/common/exports.c b/common/exports.c index b97ca48..88fcfc8 100644 --- a/common/exports.c +++ b/common/exports.c @@ -27,10 +27,12 @@ unsigned long get_version(void) # define i2c_write dummy # define i2c_read dummy #endif -#ifndef CONFIG_CMD_SPI +#if !defined(CONFIG_CMD_SPI) || defined(CONFIG_DM_SPI) # define spi_init dummy # define spi_setup_slave dummy # define spi_free_slave dummy +#endif +#ifndef CONFIG_CMD_SPI # define spi_claim_bus dummy # define spi_release_bus dummy # define spi_xfer dummy diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index f02c35a..d1f1dd0 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -6,7 +6,11 @@ #

# There are many options which enable SPI, so make this library available +ifdef CONFIG_DM_SPI +obj-y += spi-uclass.o +else obj-y += spi.o +endif

obj-$(CONFIG_EP93XX_SPI) += ep93xx_spi.o obj-$(CONFIG_ALTERA_SPI) += altera_spi.o diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c new file mode 100644 index 0000000..4057bce --- /dev/null +++ b/drivers/spi/spi-uclass.c @@ -0,0 +1,253 @@ +/*

• • Copyright (c) 2014 Google, Inc
• • SPDX-License-Identifier: GPL-2.0+
• */

+#include <common.h> +#include <dm.h> +#include <errno.h> +#include <fdtdec.h> +#include <spi.h> +#include <dm/device-internal.h> +#include <dm/uclass-internal.h> +#include <dm/root.h> +#include <dm/lists.h>

+DECLARE_GLOBAL_DATA_PTR;

+static int spi_set_speed_mode(struct udevice *bus, int speed, int mode) +{

•   struct dm_spi_ops *ops;
  

•   int ret;
  

•   ops = spi_get_ops(bus);
  

•   if (ops->set_speed)
  

•           ret = (*ops->set_speed)(bus, speed);
  

•   else
  

•           ret = -EINVAL;
  

•   if (ret) {
  

•           printf("Cannot set speed (err=%d)\n", ret);
  

•           return ret;
  

•   }
  

•   ops = spi_get_ops(bus);
  

•   if (ops->set_mode)
  

•           ret = (*ops->set_mode)(bus, mode);
  

•   else
  

•           ret = -EINVAL;
  

•   if (ret) {
  

•           printf("Cannot set mode (err=%d)\n", ret);
  

•           return ret;
  

•   }
  

•   return 0;
  

+}

+int spi_claim_bus(struct spi_slave *slave) +{

•   struct udevice *dev = slave->dev;
  

•   struct udevice *bus = dev->parent;
  

•   struct dm_spi_ops *ops = spi_get_ops(bus);
  

•   struct dm_spi_bus *spi = bus->uclass_priv;
  

•   int speed;
  

•   int ret;
  

•   speed = slave->max_hz;
  

•   if (spi->max_hz) {
  

•           if (speed)
  

•                   speed = min(speed, spi->max_hz);
  

•           else
  

•                   speed = spi->max_hz;
  

•   }
  

•   if (!speed)
  

•           speed = 100000;
  

•   ret = spi_set_speed_mode(bus, speed, slave->mode);
  

•   if (ret)
  

•           return ret;
  

•   return ops->claim_bus ? ops->claim_bus(bus) : 0;
  

+}

+void spi_release_bus(struct spi_slave *slave) +{

•   struct udevice *dev = slave->dev;
  

•   struct udevice *bus = dev->parent;
  

•   struct dm_spi_ops *ops = spi_get_ops(bus);
  

•   if (ops->release_bus)
  

•           spi_get_ops(bus)->release_bus(bus);
  

+}

+int spi_xfer(struct spi_slave *slave, unsigned int bitlen,

•        const void *dout, void *din, unsigned long flags)
  

+{

•   struct udevice *dev = slave->dev;
  

•   struct udevice *bus = dev->parent;
  

•   if (bus->uclass->uc_drv->id != UCLASS_SPI)
  

•           return -EOPNOTSUPP;
  

•   return spi_get_ops(bus)->xfer(bus, dev, bitlen, dout, din, flags);
  

+}

Cleared all these calls, as individual drivers/spi* will setup their ops and fills the priv data. So this uclass will call accordingly - correct? add if I'm missing anything.

+int spi_post_bind(struct udevice *dev) +{

•   /* Scan the bus for devices */
  

•   return dm_scan_fdt_node(dev, gd->fdt_blob, dev->of_offset, false);
  

+}

+int spi_post_probe(struct udevice *dev) +{

•   struct dm_spi_bus *spi = dev->uclass_priv;
  

•   spi->max_hz = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
  

•                                "spi-max-frequency", 0);
  

•   return 0;
  

+}

Anyway each spi driver will fills the data from dtb - like spi-max-frequency, why the spi core (uclass) will do the same.

Can't we reuse the spi_slave, why dm_spi_bus?

+int spi_bind_device(struct udevice *bus, int cs, const char *drv_name,

•               const char *dev_name, struct udevice **slavep)
  

+{

•   struct driver *drv;
  

•   int ret;
  

•   drv = lists_driver_lookup_name(drv_name);
  

•   if (!drv) {
  

•           puts("Cannot find spi_flash_std driver\n");
  

•           return -ENOENT;
  

•   }
  

•   ret = device_bind(bus, drv, dev_name, NULL, -1, slavep);
  

•   if (ret) {
  

•           printf("Cannot create device named '%s' (err=%d)\n",
  

•                  dev_name, ret);
  

•           return ret;
  

•   }
  

•   (*slavep)->req_seq = cs;
  

•   return 0;
  

+}

+int spi_find_bus_and_cs(int busnum, int cs, struct udevice **busp,

•                   struct udevice **devp)
  

+{

•   struct udevice *bus, *dev;
  

•   int ret;
  

•   ret = uclass_find_device_by_seq(UCLASS_SPI, busnum, false, &bus);
  

•   if (ret)
  

•           return ret;
  

•   ret = device_find_child_by_seq(bus, cs, false, &dev);
  

•   if (ret)
  

•           return ret;
  

•   *busp = bus;
  

•   *devp = dev;
  

•   return ret;
  

+}

+int spi_get_bus_and_cs(int busnum, int cs, int speed, int mode,

•                  const char *drv_name, const char *dev_name,
  

•                  struct udevice **devp, struct spi_slave **slavep)
  

+{

•   struct udevice *bus, *dev;
  

•   int ret;
  

•   ret = uclass_get_device_by_seq(UCLASS_SPI, busnum, &bus);
  

•   if (ret) {
  

•           printf("Invalid bus %d (err=%d)\n", busnum, ret);
  

•           return ret;
  

•   }
  

•   ret = device_get_child_by_seq(bus, cs, &dev);
  

•   /**
  

•    * If there is no such device, create one automatically. This means
  

•    * that we don't need a device tree node or platform data for the
  

•    * SPI flash chip - we will bind to the correct driver.
  

•    */
  

•   if (ret == -ENODEV && drv_name) {
  

•           ret = spi_bind_device(bus, cs, drv_name, dev_name, &dev);
  

•           if (ret)
  

•                   return ret;
  

•   }
  

•   if (ret) {
  

•           printf("Invalid chip select %d:%d (err=%d)\n", busnum, cs,
  

•                  ret);
  

•           return ret;
  

•   }
  

•   ret = spi_set_speed_mode(bus, speed, mode);
  

•   if (ret)
  

•           return ret;
  

•   *devp = bus;
  

•   *slavep = dev_get_parentdata(dev);
  

•   return 0;
  

+}

I guess this is one of the replacement for spi_setup_slave() in spi drivers, so how bus and cs member will populate to drivers.

Usually bus and cs members from spi_slave will populate to drivers through "sf probe" so spi_cs_activate will set the respective chip-select and along with reg_base in driver select through bus value.

spi_setup_slave() { ... zslave->base = get_zynq_spi_base(bus); ... }

How these will handling with dm?

+/* Compatibility function - to be removed */ +struct spi_slave *spi_setup_slave_fdt(const void *blob, int node,

•                                 int bus_node)
  

+{

•   struct udevice *bus, *dev;
  

•   int ret;
  

•   ret = uclass_get_device_by_of_offset(UCLASS_SPI, bus_node, &bus);
  

•   if (ret)
  

•           return NULL;
  

•   ret = device_get_child_by_of_offset(bus, node, &dev);
  

•   if (ret)
  

•           return NULL;
  

•   return dev_get_parentdata(dev);
  

+}

+/* Compatibility function - to be removed */ +struct spi_slave *spi_setup_slave(unsigned int busnum, unsigned int cs,

•                             unsigned int speed, unsigned int mode)
  

+{

•   struct spi_slave *slave;
  

•   struct udevice *dev;
  

•   int ret;
  

•   ret = spi_get_bus_and_cs(busnum, cs, speed, mode, NULL, 0, &dev,
  

•                             &slave);
  

•   if (ret)
  

•           return NULL;
  

•   return slave;
  

+}

+void spi_free_slave(struct spi_slave *slave) +{

•   device_remove(slave->dev);
  

•   slave->dev = NULL;
  

+}

+int spi_ofdata_to_platdata(const void *blob, int node,

•                      struct spi_slave *spi)
  

+{

•   int mode = 0;
  

•   spi->max_hz = fdtdec_get_int(blob, node, "spi-max-frequency", 0);
  

•   if (fdtdec_get_bool(blob, node, "spi-cpol"))
  

•           mode |= SPI_CPOL;
  

•   if (fdtdec_get_bool(blob, node, "spi-cpha"))
  

•           mode |= SPI_CPHA;
  

•   if (fdtdec_get_bool(blob, node, "spi-cs-high"))
  

•           mode |= SPI_CS_HIGH;
  

•   if (fdtdec_get_bool(blob, node, "spi-half-duplex"))
  

•           mode |= SPI_PREAMBLE;
  

•   spi->mode = mode;
  

•   return 0;
  

+}

+UCLASS_DRIVER(spi) = {

•   .id             = UCLASS_SPI,
  

•   .name           = "spi",
  

•   .post_bind      = spi_post_bind,
  

•   .post_probe     = spi_post_probe,
  

•   .per_device_auto_alloc_size = sizeof(struct dm_spi_bus),
  

+}; diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h index 7f0e37b..8207483 100644 --- a/include/dm/uclass-id.h +++ b/include/dm/uclass-id.h @@ -22,6 +22,7 @@ enum uclass_id { /* U-Boot uclasses start here */ UCLASS_GPIO, /* Bank of general-purpose I/O pins */ UCLASS_SERIAL, /* Serial UART */

•   UCLASS_SPI,             /* SPI bus */
  
    UCLASS_COUNT,
    UCLASS_INVALID = -1,
  

diff --git a/include/spi.h b/include/spi.h index b673be2..b5e9347 100644 --- a/include/spi.h +++ b/include/spi.h @@ -54,11 +54,19 @@

#define SPI_DEFAULT_WORDLEN 8

+#ifdef CONFIG_DM_SPI +struct dm_spi_bus {

•   uint max_hz;
  

+};

+#endif /* CONFIG_DM_SPI */

No idea why this should require, max_hz is already a part of spi_slave and handling of these like getting from dtb and process and fill on priv data should be part of individual drivers and filling spi_slave member should be part of uclass - based on my understanding.

Any comments?

/**

• struct spi_slave - Representation of a SPI slave
• Drivers are expected to extend this with controller-specific data.

• • @dev: SPI slave device

Missing comments for max_hz and mode

• @bus: ID of the bus that the slave is attached to.
• @cs: ID of the chip select connected to the slave.
• @op_mode_rx: SPI RX operation mode.

@@ -71,8 +79,14 @@

• @flags: Indication of SPI flags.

*/ struct spi_slave { +#ifdef CONFIG_DM_SPI

•   struct udevice *dev;    /* struct spi_slave is dev->parentdata */
  

•   uint max_hz;
  

•   uint mode;
  

+#else unsigned int bus; unsigned int cs; +#endif u8 op_mode_rx; u8 op_mode_tx; unsigned int wordlen; @@ -220,6 +234,8 @@ int spi_set_wordlen(struct spi_slave *slave, unsigned int wordlen); int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, void *din, unsigned long flags);

+#ifndef CONFIG_DM_SPI

/**

• Determine if a SPI chipselect is valid.
• This function is provided by the board if the low-level SPI driver

@@ -255,6 +271,7 @@ void spi_cs_deactivate(struct spi_slave *slave);

• @hz: The transfer speed

*/ void spi_set_speed(struct spi_slave *slave, uint hz); +#endif

/**

• Write 8 bits, then read 8 bits.

@@ -305,4 +322,127 @@ struct spi_slave *spi_setup_slave_fdt(const void *blob, int slave_node, struct spi_slave *spi_base_setup_slave_fdt(const void *blob, int busnum, int node);

+#ifdef CONFIG_DM_SPI

+/**

• • struct struct dm_spi_ops - Driver model SPI operations
• • The uclass interface is implemented by all SPI devices which use
• • driver model.
• */

+struct dm_spi_ops {

•   /**
  

•    * Claim the bus and prepare it for communication.
  

•    *
  

•    * The device privided is the slave device. It's parent controller
  

•    * will be used to provide the communication.
  

•    *
  

•    * This must be called before doing any transfers with a SPI slave. It
  

•    * will enable and initialize any SPI hardware as necessary, and make
  

•    * sure that the SCK line is in the correct idle state. It is not
  

•    * allowed to claim the same bus for several slaves without releasing
  

•    * the bus in between.
  

•    *
  

•    * @device:     The SPI slave
  

•    *
  

•    * Returns: 0 if the bus was claimed successfully, or a negative value
  

•    * if it wasn't.
  

•    */
  

•   int (*claim_bus)(struct udevice *device);
  

•   /**
  

•    * Release the SPI bus
  

•    *
  

•    * This must be called once for every call to spi_claim_bus() after
  

•    * all transfers have finished. It may disable any SPI hardware as
  

•    * appropriate.
  

•    *
  

•    * @device:     The SPI slave
  

•    */
  

•   int (*release_bus)(struct udevice *device);
  

•   /**
  

•    * Set the word length for SPI transactions
  

•    *
  

•    * Set the word length (number of bits per word) for SPI transactions.
  

•    *
  

•    * @device:     The SPI slave
  

•    * @wordlen:    The number of bits in a word
  

•    *
  

•    * Returns: 0 on success, -ve on failure.
  

•    */
  

•   int (*set_wordlen)(struct udevice *deiuce, unsigned int wordlen);
  

•   /**
  

•    * SPI transfer
  

•    *
  

•    * This writes "bitlen" bits out the SPI MOSI port and simultaneously
  

•    * clocks "bitlen" bits in the SPI MISO port.  That's just the way SPI
  

•    * works.
  

•    *
  

•    * The source of the outgoing bits is the "dout" parameter and the
  

•    * destination of the input bits is the "din" parameter.  Note that
  

•    * "dout" and "din" can point to the same memory location, in which
  

•    * case the input data overwrites the output data (since both are
  

•    * buffered by temporary variables, this is OK).
  

•    *
  

•    * spi_xfer() interface:
  

•    * @device:     The SPI bus which will be sending/receiving the data.
  

•    * @slave:      The slave device to communicate with
  

•    * @bitlen:     How many bits to write and read.
  

•    * @dout:       Pointer to a string of bits to send out.  The bits are
  

•    *              held in a byte array and are sent MSB first.
  

•    * @din:        Pointer to a string of bits that will be filled in.
  

•    * @flags:      A bitwise combination of SPI_XFER_* flags.
  

•    *
  

•    * Returns: 0 on success, not -1 on failure
  

•    */
  

•   int (*xfer)(struct udevice *device, struct udevice *slave,
  

•               unsigned int bitlen, const void *dout, void *din,
  

•               unsigned long flags);
  

•   /**
  

•    * Set transfer speed.
  

•    * This sets a new speed to be applied for next spi_xfer().
  

•    * @slave:      The SPI slave
  

•    * @hz:         The transfer speed
  

•    * @return 0 if OK, -ve on error
  

•    */
  

•   int (*set_speed)(struct udevice *device, uint hz);
  

•   /**
  

•    * Set the SPI mode/flags
  

•    *
  

•    * It is unclear if we want to set speed and mode together instead
  

•    * of separately.
  

•    *
  

•    * @slave:      The SPI slave
  

•    * @mode:       Requested SPI mode (SPI_... flags)
  

•    * @return 0 if OK, -ve on error
  

•    */
  

•   int (*set_mode)(struct udevice *device, uint mode);
  

+};

+int spi_find_bus_and_cs(int busnum, int cs, struct udevice **busp,

•                   struct udevice **devp);
  

+int spi_get_bus_and_cs(int busnum, int cs, int speed, int mode,

•                   const char *drv_name, const char *dev_name,
  

•                   struct udevice **devp, struct spi_slave **slavep);
  

+int spi_bind_device(struct udevice *bus, int cs, const char *drv_name,

•               const char *dev_name, struct udevice **slavep);
  

+int spi_ofdata_to_platdata(const void *blob, int node,

•                      struct spi_slave *spi);
  

+struct sandbox_state; +int sandbox_spi_get_emul(struct sandbox_state *state,

•                    struct udevice *bus, struct udevice *slave,
  

•                    struct udevice **emulp);
  

+/* Access the serial operations for a device */ +#define spi_get_ops(dev) ((struct dm_spi_ops *)(dev)->driver->ops) +#endif /* CONFIG_DM_SPI */

#endif /* _SPI_H_ */

2.0.0.526.g5318336

thanks!

On 15 July 2014 06:26, Simon Glass sjg@chromium.org wrote:

This README is intended to help maintainers move their SPI drivers over to driver model. It works through the required steps with an example.

Signed-off-by: Simon Glass sjg@chromium.org

doc/driver-model/spi-howto.txt | 570 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 570 insertions(+) create mode 100644 doc/driver-model/spi-howto.txt

diff --git a/doc/driver-model/spi-howto.txt b/doc/driver-model/spi-howto.txt new file mode 100644 index 0000000..bb64735 --- /dev/null +++ b/doc/driver-model/spi-howto.txt @@ -0,0 +1,570 @@ +How to port a SPI driver to driver model +========================================

+Here is a rough step-by-step guide. It is based around converting the +exynos SPI driver to driver model (DM) and the example code is based +around U-Boot v2014.04 (commit dda0dbf).

+It is quite long since it includes actual code examples.

+Before driver model, SPI drivers have their own private structure which +contains 'struct spi_slave'. With driver model, 'struct spi_slave' still +exists, but now it is 'per-child data' for the SPI bus. Each child of the +SPI bus is a SPI slave. The information that was stored in the +driver-specific slave structure can now be put in private data for the +SPI bus.

Do you think spi_slave still require, I guess It's needed as some slave members to cs, bus are used to control the driver.

But any specific reason for removing spi_slave from exynos_spi.c?

+For example, struct tegra_spi_slave looks like this:

+struct tegra_spi_slave {

•   struct spi_slave slave;
  

•   struct tegra_spi_ctrl *ctrl;
  

+};

+In this case 'slave' will be in per-child data, and 'ctrl' will be in the +SPI bus' private data.

+0. How long does this take?

+Around 2.5 hours, including some allowance for figuring out the driver +model bits.

+1. Enable driver mode for SPI and SPI flash

+Add these to your board config:

+#define CONFIG_DM_SPI +#define CONFIG_DM_SPI_FLASH

+2. Add the skeleton

+Put this code at the bottom of your existing driver file:

+struct spi_slave *spi_setup_slave(unsigned int busnum, unsigned int cs,

•                   unsigned int max_hz, unsigned int mode)
  

+{

•   return NULL;
  

+}

+struct spi_slave *spi_setup_slave_fdt(const void *blob, int slave_node,

•                                 int spi_node)
  

+{

•   return NULL;
  

+}

+static int exynos_spi_ofdata_to_platdata(struct udevice *dev) +{

•   return -ENODEV;
  

+}

+static int exynos_spi_probe(struct udevice *dev) +{

•   return -ENODEV;
  

+}

+static int exynos_spi_remove(struct udevice *dev) +{

•   return -ENODEV;
  

+}

+static int exynos_spi_claim_bus(struct udevice *dev) +{

•   return -ENODEV;
  

+}

+static int exynos_spi_release_bus(struct udevice *dev) +{

•   return -ENODEV;
  

+}

+static int exynos_spi_xfer(struct udevice *dev, unsigned int bitlen,

•                       const void *dout, void *din, unsigned long flags)
  

+{

•   return -ENODEV;
  

+}

+static int exynos_spi_set_speed(struct udevice *dev, uint speed) +{

•   return -ENODEV;
  

+}

+static int exynos_spi_set_mode(struct udevice *dev, uint mode) +{

•   return -ENODEV;
  

+}

+static const struct dm_spi_ops exynos_spi_ops = {

•   .claim_bus      = exynos_spi_claim_bus,
  

•   .release_bus    = exynos_spi_release_bus,
  

•   .xfer           = exynos_spi_xfer,
  

•   .set_speed      = exynos_spi_set_speed,
  

•   .set_mode       = exynos_spi_set_mode,
  

+};

+static const struct udevice_id exynos_spi_ids[] = {

•   { .compatible = "samsung,exynos-spi" },
  

•   { }
  

+};

+U_BOOT_DRIVER(exynos_spi) = {

•   .name   = "exynos_spi",
  

•   .id     = UCLASS_SPI,
  

•   .of_match = exynos_spi_ids,
  

•   .ops    = &exynos_spi_ops,
  

•   .ofdata_to_platdata = exynos_spi_ofdata_to_platdata,
  

•   .probe  = exynos_spi_probe,
  

•   .remove = exynos_spi_remove
  

comma missing - remove is necessary?

+};

+3. Replace 'exynos' in the above code with your driver name

+4. #ifdef out all of the code in your driver except for the above

+This will allow you to get it building, which means you can work +incrementally. Since all the methods return an error initially, there is +less chance that you will accidentally leave something in.

+Also, even though your conversion is basically a rewrite, it might help +reviewers if you leave functions in the same place in the file, +particularly for large drivers.

+5. Add some includes

+Add these includes to your driver:

+#include <dm.h> +#include <errno.h>

+6. Build

+At this point you should be able to build U-Boot for your board with the +empty SPI driver. You still have empty methods in yur driver, but we will

typo your instead of yur

+write these one by one.

+If you have spi_init() functions or the like that are called from your +board then the build will fail. Remove these calls and make a note of the +init that needs to be done.

+7. Set up your platform data structure

+This will hold the information your driver needs to operate, like its +hardware address or maximum frequency.

+You may already have a struct like this, or you may need to create one +from some of the #defines or global variables in the driver.

+Note that this information is not the run-time information. It should not +include state that changes. It should be fixed throughout the life of +U-Boot. Run-time information comes later.

+Here is what was in the exynos spi driver:

+struct spi_bus {

•   enum periph_id periph_id;
  

•   s32 frequency;          /* Default clock frequency, -1 for none */
  

•   struct exynos_spi *regs;
  

•   int inited;             /* 1 if this bus is ready for use */
  

•   int node;
  

•   uint deactivate_delay_us;       /* Delay to wait after deactivate */
  

+};

+Of these, inited is handled by DM and node is the device tree node, which +DM tells you. The name is not quite right. So in this case we would use:

+struct exynos_spi_platdata {

•   enum periph_id periph_id;
  

•   s32 frequency;          /* Default clock frequency, -1 for none */
  

•   struct exynos_spi *regs;
  

•   uint deactivate_delay_us;       /* Delay to wait after deactivate */
  

+};

+8a. Write ofdata_to_platdata() [for device tree only]

+This method will convert information in the device tree node into a C +structure in your driver (called platform data). If you are not using +device tree, go to 8b.

+DM will automatically allocate the struct for us when we are using device +tree, but we need to tell it the size:

+U_BOOT_DRIVER(spi_exynos) = { +...

•   .platdata_auto_alloc_size = sizeof(struct exynos_spi_platdata),
  

+Here is a sample function. It gets a pointer to the platform data and +fills in the fields from device tree.

+static int exynos_spi_ofdata_to_platdata(struct udevice *dev) +{

•   struct exynos_spi_platdata *plat = dev->platdata;
  

•   const void *blob = gd->fdt_blob;
  

•   int node = dev->of_offset;
  

•   plat->regs = (struct exynos_spi *)fdtdec_get_addr(blob, node, "reg");
  

•   plat->periph_id = pinmux_decode_periph_id(blob, node);
  

•   if (plat->periph_id == PERIPH_ID_NONE) {
  

•           debug("%s: Invalid peripheral ID %d\n", __func__,
  

•                   plat->periph_id);
  

•           return -FDT_ERR_NOTFOUND;
  

•   }
  

•   /* Use 500KHz as a suitable default */
  

•   plat->frequency = fdtdec_get_int(blob, node, "spi-max-frequency",
  

•                                   500000);
  

•   plat->deactivate_delay_us = fdtdec_get_int(blob, node,
  

•                                   "spi-deactivate-delay", 0);
  

•   return 0;
  

+}

+8b. Add the platform data [non-device-tree only]

+Specify this data in a U_BOOT_DEVICE() declaration in your board file:

+struct exynos_spi_platdata platdata_spi0 = {

•   .periph_id = ...
  

•   .frequency = ...
  

•   .regs = ...
  

•   .deactivate_delay_us = ...
  

+};

+U_BOOT_DEVICE(board_spi0) = {

•   .name = "exynos_spi",
  

•   .platdata = &platdata_spi0,
  

+};

+You will unfortunately need to put the struct into a header file in this +case so that your board file can use it.

+9. Add the device private data

+Most devices have some private data which they use to keep track of things +while active. This is the run-time information and needs to be stored in +a structure. There is probably a structure in the driver that includes a +'struct spi_slave', so you can use that.

+struct exynos_spi_slave {

•   struct spi_slave slave;
  

•   struct exynos_spi *regs;
  

•   unsigned int freq;              /* Default frequency */
  

•   unsigned int mode;
  

•   enum periph_id periph_id;       /* Peripheral ID for this device */
  

•   unsigned int fifo_size;
  

•   int skip_preamble;
  

•   struct spi_bus *bus;            /* Pointer to our SPI bus info */
  

•   ulong last_transaction_us;      /* Time of last transaction end */
  

+};

+We should rename this to make its purpose more obvious, and get rid of +the slave structure, so we have:

+struct exynos_spi_priv {

•   struct exynos_spi *regs;
  

•   unsigned int freq;              /* Default frequency */
  

•   unsigned int mode;
  

•   enum periph_id periph_id;       /* Peripheral ID for this device */
  

•   unsigned int fifo_size;
  

•   int skip_preamble;
  

•   ulong last_transaction_us;      /* Time of last transaction end */
  

+};

+DM can auto-allocate this also:

+U_BOOT_DRIVER(spi_exynos) = { +...

•   .priv_auto_alloc_size = sizeof(struct exynos_spi_priv),
  

+Note that this is created before the probe() method is called, and destroyed +after the remove() method is called. It will be zeroed when the probe() +method is called.

+10. Add the probe() and remove() methods

+Note: It's a good idea to build repeatedly as you are working, to avoid a +huge amount of work getting things compiling at the end.

+The probe() method is supposed to set up the hardware. U-Boot used to use +spi_setup_slave() to do this. So take a look at this function and see +what you can copy out to set things up.

+static int exynos_spi_probe(struct udevice *dev) +{

•   struct exynos_spi_platdata *pdata = dev_get_platdata(dev);
  

•   struct exynos_spi_priv *priv = dev_get_priv(dev);
  

•   if (pdata->periph_id == PERIPH_ID_SPI1 ||
  

•       pdata->periph_id == PERIPH_ID_SPI2)
  

•           priv->fifo_size = 64;
  

•   else
  

•           priv->fifo_size = 256;
  

•   priv->skip_preamble = 0;
  

•   priv->last_transaction_us = timer_get_us();
  

•   priv->freq = pdata->frequency;
  

•   priv->periph_id = pdata->periph_id;
  

•   return 0;
  

+}

+This implementation doesn't actually touch the hardware, which is somewhat +unusual for a driver. In this case we will do that when the device is +claimed by something that wants to use the SPI bus.

+For remove() we could shut down the clocks, but in this case there is +nothing to do. DM frees any memory that it allocated, so we can just +remove exynos_spi_remove() and its reference in U_BOOT_DRIVER.

+11. Implement set_speed()

+This should set up clocks so that the SPI bus is running at the right +speed. With the old API spi_claim_bus() would normally do this and several +of the following functions, so let's look at that function:

+int spi_claim_bus(struct spi_slave *slave) +{

•   struct exynos_spi_slave *spi_slave = to_exynos_spi(slave);
  

•   struct exynos_spi *regs = spi_slave->regs;
  

•   u32 reg = 0;
  

•   int ret;
  

•   ret = set_spi_clk(spi_slave->periph_id,
  

•                                   spi_slave->freq);
  

•   if (ret < 0) {
  

•           debug("%s: Failed to setup spi clock\n", __func__);
  

•           return ret;
  

•   }
  

•   exynos_pinmux_config(spi_slave->periph_id, PINMUX_FLAG_NONE);
  

•   spi_flush_fifo(slave);
  

•   reg = readl(&regs->ch_cfg);
  

•   reg &= ~(SPI_CH_CPHA_B | SPI_CH_CPOL_L);
  

•   if (spi_slave->mode & SPI_CPHA)
  

•           reg |= SPI_CH_CPHA_B;
  

•   if (spi_slave->mode & SPI_CPOL)
  

•           reg |= SPI_CH_CPOL_L;
  

•   writel(reg, &regs->ch_cfg);
  

•   writel(SPI_FB_DELAY_180, &regs->fb_clk);
  

•   return 0;
  

+}

+It sets up the speed, mode, pinmux, feedback delay and clears the FIFOs. +With DM these will happen in separate methods.

+Here is an example for the speed part:

+static int exynos_spi_set_speed(struct udevice *dev, uint speed) +{

•   struct exynos_spi_priv *priv = dev_get_priv(dev);
  

•   int ret;
  

•   ret = set_spi_clk(priv->periph_id, speed);
  

•   if (ret)
  

•           return ret;
  

•   priv->freq = speed;
  

•   return 0;
  

+}

+12. Implement set_mode()

+This should adjust the SPI mode (polarity, etc.). Again this code probably +comes from the old spi_claim_bus(). Here is an example:

+static int exynos_spi_set_mode(struct udevice *dev, uint mode) +{

•   struct exynos_spi_priv *priv = dev_get_priv(dev);
  

•   uint32_t reg;
  

•   reg = readl(&priv->regs->ch_cfg);
  

•   reg &= ~(SPI_CH_CPHA_B | SPI_CH_CPOL_L);
  

•   if (mode & SPI_CPHA)
  

•           reg |= SPI_CH_CPHA_B;
  

•   if (mode & SPI_CPOL)
  

•           reg |= SPI_CH_CPOL_L;
  

•   writel(reg, &priv->regs->ch_cfg);
  

•   return 0;
  

+}

+13. Implement claim_bus()

+This is where a client wants to make use of the bus, so claims it first. +At this point we need to make sure every is set up ready for data transfer.

+Here again we look at the old claim function and see some code that is +needed. It is anything unrelated to speed and mode:

+static int exynos_spi_claim_bus(struct udevice *dev) +{

•   struct exynos_spi_priv *priv = dev_get_priv(dev);
  

•   exynos_pinmux_config(priv->periph_id, PINMUX_FLAG_NONE);
  

•   spi_flush_fifo(priv->regs);
  

•   writel(SPI_FB_DELAY_180, &priv->regs->fb_clk);
  

•   return 0;
  

+}

+The spi_flush_fifo() function is in the removed part of the code, so we +need to expose it again (perhaps with an #endif before it and '#if 0' +after it). It only needs accesss to priv->regs which is why we have +passed that in:

+/**

• • Flush spi tx, rx fifos and reset the SPI controller
• • @param regs Pointer to SPI registers
• */

+static void spi_flush_fifo(struct exynos_spi *regs) +{

•   clrsetbits_le32(&regs->ch_cfg, SPI_CH_HS_EN, SPI_CH_RST);
  

•   clrbits_le32(&regs->ch_cfg, SPI_CH_RST);
  

•   setbits_le32(&regs->ch_cfg, SPI_TX_CH_ON | SPI_RX_CH_ON);
  

+}

+14. Implement release_bus()

+This releases the bus - in our example the old code in spi_release_bus() +is a call to spi_flush_fifo, so we add:

+static int exynos_spi_release_bus(struct udevice *dev) +{

•   struct exynos_spi_priv *priv = dev_get_priv(dev);
  

•   spi_flush_fifo(priv->regs);
  

•   return 0;
  

+}

+15. Implement xfer()

+This is the final method that we need to create, and it is where all the +work happens. The method parameters are the same as the old spi_xfer() with +the addition of a 'struct udevice' so conversion is pretty easy. Start +by copying the contents of spi_xfer() to your new xfer() mthod and proceed

typo - method

+from there.

+If (flags & SPI_XFER_BEGIN) is non-zero then xfer() normally calls an +activate function, something like this:

+void spi_cs_activate(struct spi_slave *slave) +{

•   struct exynos_spi_slave *spi_slave = to_exynos_spi(slave);
  

•   /* If it's too soon to do another transaction, wait */
  

•   if (spi_slave->bus->deactivate_delay_us &&
  

•       spi_slave->last_transaction_us) {
  

•           ulong delay_us;         /* The delay completed so far */
  

•           delay_us = timer_get_us() - spi_slave->last_transaction_us;
  

•           if (delay_us < spi_slave->bus->deactivate_delay_us)
  

•                   udelay(spi_slave->bus->deactivate_delay_us - delay_us);
  

•   }
  

•   clrbits_le32(&spi_slave->regs->cs_reg, SPI_SLAVE_SIG_INACT);
  

•   debug("Activate CS, bus %d\n", spi_slave->slave.bus);
  

•   spi_slave->skip_preamble = spi_slave->mode & SPI_PREAMBLE;
  

+}

+The new version looks like this:

+static void spi_cs_activate(struct udevice *dev) +{

•   struct exynos_spi_platdata *pdata = dev_get_platdata(dev);
  

•   struct exynos_spi_priv *priv = dev_get_priv(dev);
  

•   /* If it's too soon to do another transaction, wait */
  

•   if (pdata->deactivate_delay_us &&
  

•       priv->last_transaction_us) {
  

•           ulong delay_us;         /* The delay completed so far */
  

•           delay_us = timer_get_us() - priv->last_transaction_us;
  

•           if (delay_us < pdata->deactivate_delay_us)
  

•                   udelay(pdata->deactivate_delay_us - delay_us);
  

•   }
  

•   clrbits_le32(&priv->regs->cs_reg, SPI_SLAVE_SIG_INACT);
  

•   debug("Activate CS, bus '%s'\n", dev->name);
  

•   priv->skip_preamble = priv->mode & SPI_PREAMBLE;
  

+}

+All we have really done here is change the pointers and print the device name +instead of the bus number. Other local static functions can be treated in +the same way.

+16. Set up the per-child data and child_pre_probe() method

+To minimise the pain and complexity of the SPI subsystem while the driver

typo - minimize

+model change-over is in place, struct spi_slave is used to reference a +SPI bus slave, even though that slave is actually a struct udevice. In fact +struct spi_slave is the device's child data. We need to make sure this is +set up. It is possible to allocate more space that struct spi_slave needs, +but this is the minimum.

+U_BOOT_DRIVER(exynos_spi) = { +...

•   .per_child_auto_alloc_size      = sizeof(struct spi_slave),
  

•   .child_pre_probe        = exynos_spi_child_pre_probe,
  

+}

+int exynos_spi_child_pre_probe(struct udevice *dev) +{

•   struct spi_slave *slave = dev_get_parentdata(dev);
  

•   return spi_ofdata_to_platdata(gd->fdt_blob, dev->of_offset, slave);
  

+}

So this routine will fill spi_slave members - is it? Why cs and bus are not part of DM?

+Here our child_pre_probe() method merely calls a standard method to convert +device tree data to that used in the slave.

+17. Test it

+Now that you have the code written and it compiles, try testing it using +the 'sf test' command. You may need to enable CONFIG_CMD_SF_TEST for your +board.

+18. Prepare patches and send them to the mailing lists

+You can use 'tools/patman/patman' to prepare, check and send patches for

+your work. See the README for details.

2.0.0.526.g5318336

thanks!

Hi Simon,

On 1 September 2014 10:36, Simon Glass sjg@chromium.org wrote:

Hi Jagan,

On 28 August 2014 04:32, Jagan Teki jagannadh.teki@gmail.com wrote:

...

On 15 July 2014 06:26, Simon Glass sjg@chromium.org wrote:

...

This README is intended to help maintainers move their SPI drivers over to driver model. It works through the required steps with an example.

Signed-off-by: Simon Glass sjg@chromium.org

doc/driver-model/spi-howto.txt | 570 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 570 insertions(+) create mode 100644 doc/driver-model/spi-howto.txt

diff --git a/doc/driver-model/spi-howto.txt b/doc/driver-model/spi-howto.txt new file mode 100644 index 0000000..bb64735 --- /dev/null +++ b/doc/driver-model/spi-howto.txt @@ -0,0 +1,570 @@ +How to port a SPI driver to driver model +========================================

+Here is a rough step-by-step guide. It is based around converting the +exynos SPI driver to driver model (DM) and the example code is based +around U-Boot v2014.04 (commit dda0dbf).

+It is quite long since it includes actual code examples.

+Before driver model, SPI drivers have their own private structure which +contains 'struct spi_slave'. With driver model, 'struct spi_slave' still +exists, but now it is 'per-child data' for the SPI bus. Each child of the +SPI bus is a SPI slave. The information that was stored in the +driver-specific slave structure can now be put in private data for the +SPI bus.

Do you think spi_slave still require, I guess It's needed as some slave members to cs, bus are used to control the driver.

The CS and bus are purely command-line conveniences with DM. When it gets down to the driver the bus is determined by the SPI peripheral it is connected to, and the CS is the control that it adjusts to enable the chip select. The numbering of buses and chip selects is not relevant down at the driver level anymore.

Yes - I understand but let me explain my comments.

u-boot> sf probe bus:cs speed mode

Unlike other buses/controllers on u-boot we're dynamically probing the slave on bus using bus and cs for example, we have a zynq_spi handling spi0, spi1 (bus's) and each one has 3 chip-selects. So

u-boot> sf probe 1:1 for probing bus1 (spi1) and cs 1

u-boot> sf probe 0:1 for probing bus0 (spi0) and cs 1

The respective reg base (based on bus) and register chip-select (based on cs) zynq_spi.c will handle these in driver it self.

speed and mode settings, I'm fine with dm, where it will configure using

int spi_get_bus_and_cs(int busnum, int cs, int speed, int mode, const char *drv_name, const char *dev_name, struct udevice **devp, struct spi_slave **slavep) { ..... ret = spi_set_speed_mode(bus, speed, mode); ...... }

But how can spi-uclass.c will identifies how many bus's along with cs lines does specified controller driver support.

This what usually we're doing in driver as int spi_cs_is_valid(unsigned int bus, unsigned int cs) { /* 2 bus with 3 chipselect */ return bus < 2 && cs < 3; }

Please let me know if you have any questions, this is what usually doing most of drivers.

...

But any specific reason for removing spi_slave from exynos_spi.c?

The driver has its own private data, there is no longer a need to store the SPI subsystem's data there also. That is what the per-child data is for.

...

...

+For example, struct tegra_spi_slave looks like this:

+struct tegra_spi_slave {

•   struct spi_slave slave;
  

•   struct tegra_spi_ctrl *ctrl;
  

+};

+In this case 'slave' will be in per-child data, and 'ctrl' will be in the +SPI bus' private data.

+0. How long does this take?

+Around 2.5 hours, including some allowance for figuring out the driver +model bits.

+1. Enable driver mode for SPI and SPI flash

+Add these to your board config:

+#define CONFIG_DM_SPI +#define CONFIG_DM_SPI_FLASH

+2. Add the skeleton

+Put this code at the bottom of your existing driver file:

+struct spi_slave *spi_setup_slave(unsigned int busnum, unsigned int cs,

•                   unsigned int max_hz, unsigned int mode)
  

+{

•   return NULL;
  

+}

+struct spi_slave *spi_setup_slave_fdt(const void *blob, int slave_node,

•                                 int spi_node)
  

+{

•   return NULL;
  

+}

+static int exynos_spi_ofdata_to_platdata(struct udevice *dev) +{

•   return -ENODEV;
  

+}

+static int exynos_spi_probe(struct udevice *dev) +{

•   return -ENODEV;
  

+}

+static int exynos_spi_remove(struct udevice *dev) +{

•   return -ENODEV;
  

+}

+static int exynos_spi_claim_bus(struct udevice *dev) +{

•   return -ENODEV;
  

+}

+static int exynos_spi_release_bus(struct udevice *dev) +{

•   return -ENODEV;
  

+}

+static int exynos_spi_xfer(struct udevice *dev, unsigned int bitlen,

•                       const void *dout, void *din, unsigned long flags)
  

+{

•   return -ENODEV;
  

+}

+static int exynos_spi_set_speed(struct udevice *dev, uint speed) +{

•   return -ENODEV;
  

+}

+static int exynos_spi_set_mode(struct udevice *dev, uint mode) +{

•   return -ENODEV;
  

+}

+static const struct dm_spi_ops exynos_spi_ops = {

•   .claim_bus      = exynos_spi_claim_bus,
  

•   .release_bus    = exynos_spi_release_bus,
  

•   .xfer           = exynos_spi_xfer,
  

•   .set_speed      = exynos_spi_set_speed,
  

•   .set_mode       = exynos_spi_set_mode,
  

+};

+static const struct udevice_id exynos_spi_ids[] = {

•   { .compatible = "samsung,exynos-spi" },
  

•   { }
  

+};

+U_BOOT_DRIVER(exynos_spi) = {

•   .name   = "exynos_spi",
  

•   .id     = UCLASS_SPI,
  

•   .of_match = exynos_spi_ids,
  

•   .ops    = &exynos_spi_ops,
  

•   .ofdata_to_platdata = exynos_spi_ofdata_to_platdata,
  

•   .probe  = exynos_spi_probe,
  

•   .remove = exynos_spi_remove
  

comma missing - remove is necessary?

...

+};

+3. Replace 'exynos' in the above code with your driver name

+4. #ifdef out all of the code in your driver except for the above

+This will allow you to get it building, which means you can work +incrementally. Since all the methods return an error initially, there is +less chance that you will accidentally leave something in.

+Also, even though your conversion is basically a rewrite, it might help +reviewers if you leave functions in the same place in the file, +particularly for large drivers.

+5. Add some includes

+Add these includes to your driver:

+#include <dm.h> +#include <errno.h>

+6. Build

+At this point you should be able to build U-Boot for your board with the +empty SPI driver. You still have empty methods in yur driver, but we will

typo your instead of yur

...

+write these one by one.

+If you have spi_init() functions or the like that are called from your +board then the build will fail. Remove these calls and make a note of the +init that needs to be done.

+7. Set up your platform data structure

+This will hold the information your driver needs to operate, like its +hardware address or maximum frequency.

+You may already have a struct like this, or you may need to create one +from some of the #defines or global variables in the driver.

+Note that this information is not the run-time information. It should not +include state that changes. It should be fixed throughout the life of +U-Boot. Run-time information comes later.

+Here is what was in the exynos spi driver:

+struct spi_bus {

•   enum periph_id periph_id;
  

•   s32 frequency;          /* Default clock frequency, -1 for none */
  

•   struct exynos_spi *regs;
  

•   int inited;             /* 1 if this bus is ready for use */
  

•   int node;
  

•   uint deactivate_delay_us;       /* Delay to wait after deactivate */
  

+};

+Of these, inited is handled by DM and node is the device tree node, which +DM tells you. The name is not quite right. So in this case we would use:

+struct exynos_spi_platdata {

•   enum periph_id periph_id;
  

•   s32 frequency;          /* Default clock frequency, -1 for none */
  

•   struct exynos_spi *regs;
  

•   uint deactivate_delay_us;       /* Delay to wait after deactivate */
  

+};

+8a. Write ofdata_to_platdata() [for device tree only]

+This method will convert information in the device tree node into a C +structure in your driver (called platform data). If you are not using +device tree, go to 8b.

+DM will automatically allocate the struct for us when we are using device +tree, but we need to tell it the size:

+U_BOOT_DRIVER(spi_exynos) = { +...

•   .platdata_auto_alloc_size = sizeof(struct exynos_spi_platdata),
  

+Here is a sample function. It gets a pointer to the platform data and +fills in the fields from device tree.

+static int exynos_spi_ofdata_to_platdata(struct udevice *dev) +{

•   struct exynos_spi_platdata *plat = dev->platdata;
  

•   const void *blob = gd->fdt_blob;
  

•   int node = dev->of_offset;
  

•   plat->regs = (struct exynos_spi *)fdtdec_get_addr(blob, node, "reg");
  

•   plat->periph_id = pinmux_decode_periph_id(blob, node);
  

•   if (plat->periph_id == PERIPH_ID_NONE) {
  

•           debug("%s: Invalid peripheral ID %d\n", __func__,
  

•                   plat->periph_id);
  

•           return -FDT_ERR_NOTFOUND;
  

•   }
  

•   /* Use 500KHz as a suitable default */
  

•   plat->frequency = fdtdec_get_int(blob, node, "spi-max-frequency",
  

•                                   500000);
  

•   plat->deactivate_delay_us = fdtdec_get_int(blob, node,
  

•                                   "spi-deactivate-delay", 0);
  

•   return 0;
  

+}

+8b. Add the platform data [non-device-tree only]

+Specify this data in a U_BOOT_DEVICE() declaration in your board file:

+struct exynos_spi_platdata platdata_spi0 = {

•   .periph_id = ...
  

•   .frequency = ...
  

•   .regs = ...
  

•   .deactivate_delay_us = ...
  

+};

+U_BOOT_DEVICE(board_spi0) = {

•   .name = "exynos_spi",
  

•   .platdata = &platdata_spi0,
  

+};

+You will unfortunately need to put the struct into a header file in this +case so that your board file can use it.

+9. Add the device private data

+Most devices have some private data which they use to keep track of things +while active. This is the run-time information and needs to be stored in +a structure. There is probably a structure in the driver that includes a +'struct spi_slave', so you can use that.

+struct exynos_spi_slave {

•   struct spi_slave slave;
  

•   struct exynos_spi *regs;
  

•   unsigned int freq;              /* Default frequency */
  

•   unsigned int mode;
  

•   enum periph_id periph_id;       /* Peripheral ID for this device */
  

•   unsigned int fifo_size;
  

•   int skip_preamble;
  

•   struct spi_bus *bus;            /* Pointer to our SPI bus info */
  

•   ulong last_transaction_us;      /* Time of last transaction end */
  

+};

+We should rename this to make its purpose more obvious, and get rid of +the slave structure, so we have:

+struct exynos_spi_priv {

•   struct exynos_spi *regs;
  

•   unsigned int freq;              /* Default frequency */
  

•   unsigned int mode;
  

•   enum periph_id periph_id;       /* Peripheral ID for this device */
  

•   unsigned int fifo_size;
  

•   int skip_preamble;
  

•   ulong last_transaction_us;      /* Time of last transaction end */
  

+};

+DM can auto-allocate this also:

+U_BOOT_DRIVER(spi_exynos) = { +...

•   .priv_auto_alloc_size = sizeof(struct exynos_spi_priv),
  

+Note that this is created before the probe() method is called, and destroyed +after the remove() method is called. It will be zeroed when the probe() +method is called.

+10. Add the probe() and remove() methods

+Note: It's a good idea to build repeatedly as you are working, to avoid a +huge amount of work getting things compiling at the end.

+The probe() method is supposed to set up the hardware. U-Boot used to use +spi_setup_slave() to do this. So take a look at this function and see +what you can copy out to set things up.

+static int exynos_spi_probe(struct udevice *dev) +{

•   struct exynos_spi_platdata *pdata = dev_get_platdata(dev);
  

•   struct exynos_spi_priv *priv = dev_get_priv(dev);
  

•   if (pdata->periph_id == PERIPH_ID_SPI1 ||
  

•       pdata->periph_id == PERIPH_ID_SPI2)
  

•           priv->fifo_size = 64;
  

•   else
  

•           priv->fifo_size = 256;
  

•   priv->skip_preamble = 0;
  

•   priv->last_transaction_us = timer_get_us();
  

•   priv->freq = pdata->frequency;
  

•   priv->periph_id = pdata->periph_id;
  

•   return 0;
  

+}

+This implementation doesn't actually touch the hardware, which is somewhat +unusual for a driver. In this case we will do that when the device is +claimed by something that wants to use the SPI bus.

+For remove() we could shut down the clocks, but in this case there is +nothing to do. DM frees any memory that it allocated, so we can just +remove exynos_spi_remove() and its reference in U_BOOT_DRIVER.

+11. Implement set_speed()

+This should set up clocks so that the SPI bus is running at the right +speed. With the old API spi_claim_bus() would normally do this and several +of the following functions, so let's look at that function:

+int spi_claim_bus(struct spi_slave *slave) +{

•   struct exynos_spi_slave *spi_slave = to_exynos_spi(slave);
  

•   struct exynos_spi *regs = spi_slave->regs;
  

•   u32 reg = 0;
  

•   int ret;
  

•   ret = set_spi_clk(spi_slave->periph_id,
  

•                                   spi_slave->freq);
  

•   if (ret < 0) {
  

•           debug("%s: Failed to setup spi clock\n", __func__);
  

•           return ret;
  

•   }
  

•   exynos_pinmux_config(spi_slave->periph_id, PINMUX_FLAG_NONE);
  

•   spi_flush_fifo(slave);
  

•   reg = readl(&regs->ch_cfg);
  

•   reg &= ~(SPI_CH_CPHA_B | SPI_CH_CPOL_L);
  

•   if (spi_slave->mode & SPI_CPHA)
  

•           reg |= SPI_CH_CPHA_B;
  

•   if (spi_slave->mode & SPI_CPOL)
  

•           reg |= SPI_CH_CPOL_L;
  

•   writel(reg, &regs->ch_cfg);
  

•   writel(SPI_FB_DELAY_180, &regs->fb_clk);
  

•   return 0;
  

+}

+It sets up the speed, mode, pinmux, feedback delay and clears the FIFOs. +With DM these will happen in separate methods.

+Here is an example for the speed part:

+static int exynos_spi_set_speed(struct udevice *dev, uint speed) +{

•   struct exynos_spi_priv *priv = dev_get_priv(dev);
  

•   int ret;
  

•   ret = set_spi_clk(priv->periph_id, speed);
  

•   if (ret)
  

•           return ret;
  

•   priv->freq = speed;
  

•   return 0;
  

+}

+12. Implement set_mode()

+This should adjust the SPI mode (polarity, etc.). Again this code probably +comes from the old spi_claim_bus(). Here is an example:

+static int exynos_spi_set_mode(struct udevice *dev, uint mode) +{

•   struct exynos_spi_priv *priv = dev_get_priv(dev);
  

•   uint32_t reg;
  

•   reg = readl(&priv->regs->ch_cfg);
  

•   reg &= ~(SPI_CH_CPHA_B | SPI_CH_CPOL_L);
  

•   if (mode & SPI_CPHA)
  

•           reg |= SPI_CH_CPHA_B;
  

•   if (mode & SPI_CPOL)
  

•           reg |= SPI_CH_CPOL_L;
  

•   writel(reg, &priv->regs->ch_cfg);
  

•   return 0;
  

+}

+13. Implement claim_bus()

+This is where a client wants to make use of the bus, so claims it first. +At this point we need to make sure every is set up ready for data transfer.

+Here again we look at the old claim function and see some code that is +needed. It is anything unrelated to speed and mode:

+static int exynos_spi_claim_bus(struct udevice *dev) +{

•   struct exynos_spi_priv *priv = dev_get_priv(dev);
  

•   exynos_pinmux_config(priv->periph_id, PINMUX_FLAG_NONE);
  

•   spi_flush_fifo(priv->regs);
  

•   writel(SPI_FB_DELAY_180, &priv->regs->fb_clk);
  

•   return 0;
  

+}

+The spi_flush_fifo() function is in the removed part of the code, so we +need to expose it again (perhaps with an #endif before it and '#if 0' +after it). It only needs accesss to priv->regs which is why we have +passed that in:

+/**

• • Flush spi tx, rx fifos and reset the SPI controller
• • @param regs Pointer to SPI registers
• */

+static void spi_flush_fifo(struct exynos_spi *regs) +{

•   clrsetbits_le32(&regs->ch_cfg, SPI_CH_HS_EN, SPI_CH_RST);
  

•   clrbits_le32(&regs->ch_cfg, SPI_CH_RST);
  

•   setbits_le32(&regs->ch_cfg, SPI_TX_CH_ON | SPI_RX_CH_ON);
  

+}

+14. Implement release_bus()

+This releases the bus - in our example the old code in spi_release_bus() +is a call to spi_flush_fifo, so we add:

+static int exynos_spi_release_bus(struct udevice *dev) +{

•   struct exynos_spi_priv *priv = dev_get_priv(dev);
  

•   spi_flush_fifo(priv->regs);
  

•   return 0;
  

+}

+15. Implement xfer()

+This is the final method that we need to create, and it is where all the +work happens. The method parameters are the same as the old spi_xfer() with +the addition of a 'struct udevice' so conversion is pretty easy. Start +by copying the contents of spi_xfer() to your new xfer() mthod and proceed

typo - method

...

+from there.

+If (flags & SPI_XFER_BEGIN) is non-zero then xfer() normally calls an +activate function, something like this:

+void spi_cs_activate(struct spi_slave *slave) +{

•   struct exynos_spi_slave *spi_slave = to_exynos_spi(slave);
  

•   /* If it's too soon to do another transaction, wait */
  

•   if (spi_slave->bus->deactivate_delay_us &&
  

•       spi_slave->last_transaction_us) {
  

•           ulong delay_us;         /* The delay completed so far */
  

•           delay_us = timer_get_us() - spi_slave->last_transaction_us;
  

•           if (delay_us < spi_slave->bus->deactivate_delay_us)
  

•                   udelay(spi_slave->bus->deactivate_delay_us - delay_us);
  

•   }
  

•   clrbits_le32(&spi_slave->regs->cs_reg, SPI_SLAVE_SIG_INACT);
  

•   debug("Activate CS, bus %d\n", spi_slave->slave.bus);
  

•   spi_slave->skip_preamble = spi_slave->mode & SPI_PREAMBLE;
  

+}

+The new version looks like this:

+static void spi_cs_activate(struct udevice *dev) +{

•   struct exynos_spi_platdata *pdata = dev_get_platdata(dev);
  

•   struct exynos_spi_priv *priv = dev_get_priv(dev);
  

•   /* If it's too soon to do another transaction, wait */
  

•   if (pdata->deactivate_delay_us &&
  

•       priv->last_transaction_us) {
  

•           ulong delay_us;         /* The delay completed so far */
  

•           delay_us = timer_get_us() - priv->last_transaction_us;
  

•           if (delay_us < pdata->deactivate_delay_us)
  

•                   udelay(pdata->deactivate_delay_us - delay_us);
  

•   }
  

•   clrbits_le32(&priv->regs->cs_reg, SPI_SLAVE_SIG_INACT);
  

•   debug("Activate CS, bus '%s'\n", dev->name);
  

•   priv->skip_preamble = priv->mode & SPI_PREAMBLE;
  

+}

+All we have really done here is change the pointers and print the device name +instead of the bus number. Other local static functions can be treated in +the same way.

+16. Set up the per-child data and child_pre_probe() method

+To minimise the pain and complexity of the SPI subsystem while the driver

typo - minimize

English spelling (this is U-Boot).

...

...

+model change-over is in place, struct spi_slave is used to reference a +SPI bus slave, even though that slave is actually a struct udevice. In fact +struct spi_slave is the device's child data. We need to make sure this is +set up. It is possible to allocate more space that struct spi_slave needs, +but this is the minimum.

+U_BOOT_DRIVER(exynos_spi) = { +...

•   .per_child_auto_alloc_size      = sizeof(struct spi_slave),
  

•   .child_pre_probe        = exynos_spi_child_pre_probe,
  

+}

+int exynos_spi_child_pre_probe(struct udevice *dev) +{

•   struct spi_slave *slave = dev_get_parentdata(dev);
  

•   return spi_ofdata_to_platdata(gd->fdt_blob, dev->of_offset, slave);
  

+}

So this routine will fill spi_slave members - is it? Why cs and bus are not part of DM?

See above for my comments, but let me know if unsure.

...

...

+Here our child_pre_probe() method merely calls a standard method to convert +device tree data to that used in the slave.

+17. Test it

+Now that you have the code written and it compiles, try testing it using +the 'sf test' command. You may need to enable CONFIG_CMD_SF_TEST for your +board.

+18. Prepare patches and send them to the mailing lists

+You can use 'tools/patman/patman' to prepare, check and send patches for

+your work. See the README for details.

2.0.0.526.g5318336