[PATCH v2 RESEND 0/6] Update Chameleon v3 configuration
These changes add the third chameleon variation and make it easier to deploy images to different boards.
v2 changes: - rename chameleonv3.dts to .dtsi - add missing CONFIG_SPL_MAX_SIZE symbol
Paweł Anikiel (6): socfpga: chameleonv3: Enable ext4 in SPL socfpga: chameleonv3: Move environment to a text file arm: dts: chameleonv3: Override chameleonv3 bitstream names arm: dts: chameleonv3: Rename chameleonv3.dts to .dtsi arm: dts: chameleonv3: Add 270-2 variant chameleonv3: Convert CONFIG_SPL_MAX_SIZE to Kconfig
arch/arm/dts/Makefile | 1 + ...eleonv3.dts => socfpga_arria10_chameleonv3.dtsi} | 0 .../socfpga_arria10_chameleonv3_270_2-u-boot.dtsi | 12 ++++++++++++ arch/arm/dts/socfpga_arria10_chameleonv3_270_2.dts | 5 +++++ .../socfpga_arria10_chameleonv3_270_3-u-boot.dtsi | 4 ++++ arch/arm/dts/socfpga_arria10_chameleonv3_270_3.dts | 2 +- .../socfpga_arria10_chameleonv3_480_2-u-boot.dtsi | 4 ++++ arch/arm/dts/socfpga_arria10_chameleonv3_480_2.dts | 2 +- board/google/chameleonv3/environment.txt | 13 +++++++++++++ configs/socfpga_chameleonv3_defconfig | 2 ++ include/configs/socfpga_chameleonv3.h | 9 ++++----- 11 files changed, 47 insertions(+), 7 deletions(-) rename arch/arm/dts/{socfpga_arria10_chameleonv3.dts => socfpga_arria10_chameleonv3.dtsi} (100%) create mode 100644 arch/arm/dts/socfpga_arria10_chameleonv3_270_2-u-boot.dtsi create mode 100644 arch/arm/dts/socfpga_arria10_chameleonv3_270_2.dts create mode 100644 board/google/chameleonv3/environment.txt
Allow SPL to boot from an ext4 filesystem.
Signed-off-by: Paweł Anikiel pan@semihalf.com Reviewed-by: Simon Glass sjg@chromium.org --- configs/socfpga_chameleonv3_defconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/configs/socfpga_chameleonv3_defconfig b/configs/socfpga_chameleonv3_defconfig index 4bbce3591d..5d08fd282b 100644 --- a/configs/socfpga_chameleonv3_defconfig +++ b/configs/socfpga_chameleonv3_defconfig @@ -7,6 +7,7 @@ CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_chameleonv3_480_2" CONFIG_SPL_TEXT_BASE=0xFFE00000 CONFIG_SPL_DRIVERS_MISC=y CONFIG_TARGET_SOCFPGA_CHAMELEONV3=y +CONFIG_SPL_FS_EXT4=y CONFIG_SPL_FS_FAT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y
Move the environment to an easily editable text file in the boot partition
Signed-off-by: Paweł Anikiel pan@semihalf.com Reviewed-by: Simon Glass sjg@chromium.org --- board/google/chameleonv3/environment.txt | 13 +++++++++++++ include/configs/socfpga_chameleonv3.h | 9 ++++----- 2 files changed, 17 insertions(+), 5 deletions(-) create mode 100644 board/google/chameleonv3/environment.txt
diff --git a/board/google/chameleonv3/environment.txt b/board/google/chameleonv3/environment.txt new file mode 100644 index 0000000000..52aedbb90a --- /dev/null +++ b/board/google/chameleonv3/environment.txt @@ -0,0 +1,13 @@ +# MMC boot command +bootcmd_mmc=load mmc 0:1 ${loadaddr} kernel.itb; bootm + +# Network boot command and vars +bootcmd_net=dhcp; tftpboot ${loadaddr} kernel.itb; bootm +autoload=no +serverip=192.168.0.1 + +# U-Boot will run this after loading this file +bootcmd_txt=run bootcmd_mmc + +# Kernel cmdline +bootargs=cma=256M console=ttyS1,115200 root=/dev/mmcblk0p3 rootflags=subvol=root rw rootwait diff --git a/include/configs/socfpga_chameleonv3.h b/include/configs/socfpga_chameleonv3.h index 2ce7011529..fc08e74dba 100644 --- a/include/configs/socfpga_chameleonv3.h +++ b/include/configs/socfpga_chameleonv3.h @@ -20,11 +20,10 @@ #define CFG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200}
#define CFG_EXTRA_ENV_SETTINGS \ - "autoload=no\0" \ - "bootargs=cma=256M console=ttyS1,115200 root=/dev/mmcblk0p3 rw rootwait\0" \ - "distro_bootcmd=bridge enable; run bootcmd_mmc\0" \ - "bootcmd_mmc=load mmc 0:1 ${loadaddr} kernel.itb; bootm\0" \ - "bootcmd_net=dhcp; tftpboot ${loadaddr} kernel.itb; bootm\0" + "distro_bootcmd=bridge enable; " \ + "load mmc 0:1 ${loadaddr} u-boot.txt; " \ + "env import -t ${loadaddr}; " \ + "run bootcmd_txt\0"
/* * L4 OSC1 Timer 0
Set the bitstream name per Chameleon variant. This allows the same boot filesystem with all bitstream variants to be used on different boards.
Signed-off-by: Paweł Anikiel pan@semihalf.com Reviewed-by: Simon Glass sjg@chromium.org --- arch/arm/dts/socfpga_arria10_chameleonv3_270_3-u-boot.dtsi | 4 ++++ arch/arm/dts/socfpga_arria10_chameleonv3_480_2-u-boot.dtsi | 4 ++++ 2 files changed, 8 insertions(+)
diff --git a/arch/arm/dts/socfpga_arria10_chameleonv3_270_3-u-boot.dtsi b/arch/arm/dts/socfpga_arria10_chameleonv3_270_3-u-boot.dtsi index e789d49657..a7aa17b220 100644 --- a/arch/arm/dts/socfpga_arria10_chameleonv3_270_3-u-boot.dtsi +++ b/arch/arm/dts/socfpga_arria10_chameleonv3_270_3-u-boot.dtsi @@ -6,3 +6,7 @@ #include "socfpga_arria10-handoff.dtsi" #include "socfpga_arria10_handoff_u-boot.dtsi" #include "socfpga_arria10_mercury_aa1-u-boot.dtsi" + +&fpga_mgr { + altr,bitstream = "fpga-270-3.itb"; +}; diff --git a/arch/arm/dts/socfpga_arria10_chameleonv3_480_2-u-boot.dtsi b/arch/arm/dts/socfpga_arria10_chameleonv3_480_2-u-boot.dtsi index 7bbcc471c5..82a94894ea 100644 --- a/arch/arm/dts/socfpga_arria10_chameleonv3_480_2-u-boot.dtsi +++ b/arch/arm/dts/socfpga_arria10_chameleonv3_480_2-u-boot.dtsi @@ -6,3 +6,7 @@ #include "socfpga_arria10-handoff.dtsi" #include "socfpga_arria10_handoff_u-boot.dtsi" #include "socfpga_arria10_mercury_aa1-u-boot.dtsi" + +&fpga_mgr { + altr,bitstream = "fpga-480-2.itb"; +};
This file is included by the different chameleonv3 variants. Change the name to .dtsi.
Signed-off-by: Paweł Anikiel pan@semihalf.com Reviewed-by: Simon Glass sjg@chromium.org --- ...arria10_chameleonv3.dts => socfpga_arria10_chameleonv3.dtsi} | 0 arch/arm/dts/socfpga_arria10_chameleonv3_270_3.dts | 2 +- arch/arm/dts/socfpga_arria10_chameleonv3_480_2.dts | 2 +- 3 files changed, 2 insertions(+), 2 deletions(-) rename arch/arm/dts/{socfpga_arria10_chameleonv3.dts => socfpga_arria10_chameleonv3.dtsi} (100%)
diff --git a/arch/arm/dts/socfpga_arria10_chameleonv3.dts b/arch/arm/dts/socfpga_arria10_chameleonv3.dtsi similarity index 100% rename from arch/arm/dts/socfpga_arria10_chameleonv3.dts rename to arch/arm/dts/socfpga_arria10_chameleonv3.dtsi diff --git a/arch/arm/dts/socfpga_arria10_chameleonv3_270_3.dts b/arch/arm/dts/socfpga_arria10_chameleonv3_270_3.dts index 5f40af6eb9..bef0280212 100644 --- a/arch/arm/dts/socfpga_arria10_chameleonv3_270_3.dts +++ b/arch/arm/dts/socfpga_arria10_chameleonv3_270_3.dts @@ -2,4 +2,4 @@ /* * Copyright 2022 Google LLC */ -#include "socfpga_arria10_chameleonv3.dts" +#include "socfpga_arria10_chameleonv3.dtsi" diff --git a/arch/arm/dts/socfpga_arria10_chameleonv3_480_2.dts b/arch/arm/dts/socfpga_arria10_chameleonv3_480_2.dts index 5f40af6eb9..bef0280212 100644 --- a/arch/arm/dts/socfpga_arria10_chameleonv3_480_2.dts +++ b/arch/arm/dts/socfpga_arria10_chameleonv3_480_2.dts @@ -2,4 +2,4 @@ /* * Copyright 2022 Google LLC */ -#include "socfpga_arria10_chameleonv3.dts" +#include "socfpga_arria10_chameleonv3.dtsi"
Add devicetree for chameleonv3 with the 270-2I2-D11E variant of the Mercury+ AA1 module
Signed-off-by: Paweł Anikiel pan@semihalf.com Reviewed-by: Simon Glass sjg@chromium.org --- arch/arm/dts/Makefile | 1 + .../socfpga_arria10_chameleonv3_270_2-u-boot.dtsi | 12 ++++++++++++ arch/arm/dts/socfpga_arria10_chameleonv3_270_2.dts | 5 +++++ 3 files changed, 18 insertions(+) create mode 100644 arch/arm/dts/socfpga_arria10_chameleonv3_270_2-u-boot.dtsi create mode 100644 arch/arm/dts/socfpga_arria10_chameleonv3_270_2.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 9d647b9639..7a577deb50 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -442,6 +442,7 @@ dtb-$(CONFIG_ARCH_SOCFPGA) += \ socfpga_agilex_socdk.dtb \ socfpga_arria5_secu1.dtb \ socfpga_arria5_socdk.dtb \ + socfpga_arria10_chameleonv3_270_2.dtb \ socfpga_arria10_chameleonv3_270_3.dtb \ socfpga_arria10_chameleonv3_480_2.dtb \ socfpga_arria10_socdk_sdmmc.dtb \ diff --git a/arch/arm/dts/socfpga_arria10_chameleonv3_270_2-u-boot.dtsi b/arch/arm/dts/socfpga_arria10_chameleonv3_270_2-u-boot.dtsi new file mode 100644 index 0000000000..05b4485cf3 --- /dev/null +++ b/arch/arm/dts/socfpga_arria10_chameleonv3_270_2-u-boot.dtsi @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright 2022 Google LLC + */ +#include "socfpga_arria10_chameleonv3_480_2_handoff.h" +#include "socfpga_arria10-handoff.dtsi" +#include "socfpga_arria10_handoff_u-boot.dtsi" +#include "socfpga_arria10_mercury_aa1-u-boot.dtsi" + +&fpga_mgr { + altr,bitstream = "fpga-270-2.itb"; +}; diff --git a/arch/arm/dts/socfpga_arria10_chameleonv3_270_2.dts b/arch/arm/dts/socfpga_arria10_chameleonv3_270_2.dts new file mode 100644 index 0000000000..bef0280212 --- /dev/null +++ b/arch/arm/dts/socfpga_arria10_chameleonv3_270_2.dts @@ -0,0 +1,5 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright 2022 Google LLC + */ +#include "socfpga_arria10_chameleonv3.dtsi"
This file was missed during the conversion process. Add the symbol to defconfig.
Signed-off-by: Paweł Anikiel pan@semihalf.com Reviewed-by: Simon Glass sjg@chromium.org --- configs/socfpga_chameleonv3_defconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/configs/socfpga_chameleonv3_defconfig b/configs/socfpga_chameleonv3_defconfig index 5d08fd282b..41231e2382 100644 --- a/configs/socfpga_chameleonv3_defconfig +++ b/configs/socfpga_chameleonv3_defconfig @@ -5,6 +5,7 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x4400 CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_chameleonv3_480_2" CONFIG_SPL_TEXT_BASE=0xFFE00000 +CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_DRIVERS_MISC=y CONFIG_TARGET_SOCFPGA_CHAMELEONV3=y CONFIG_SPL_FS_EXT4=y
On 2/21/23 16:17, Paweł Anikiel wrote:
These changes add the third chameleon variation and make it easier to deploy images to different boards.
v2 changes:
- rename chameleonv3.dts to .dtsi
- add missing CONFIG_SPL_MAX_SIZE symbol
Paweł Anikiel (6): socfpga: chameleonv3: Enable ext4 in SPL socfpga: chameleonv3: Move environment to a text file arm: dts: chameleonv3: Override chameleonv3 bitstream names arm: dts: chameleonv3: Rename chameleonv3.dts to .dtsi arm: dts: chameleonv3: Add 270-2 variant chameleonv3: Convert CONFIG_SPL_MAX_SIZE to Kconfig
arch/arm/dts/Makefile | 1 + ...eleonv3.dts => socfpga_arria10_chameleonv3.dtsi} | 0 .../socfpga_arria10_chameleonv3_270_2-u-boot.dtsi | 12 ++++++++++++ arch/arm/dts/socfpga_arria10_chameleonv3_270_2.dts | 5 +++++ .../socfpga_arria10_chameleonv3_270_3-u-boot.dtsi | 4 ++++ arch/arm/dts/socfpga_arria10_chameleonv3_270_3.dts | 2 +- .../socfpga_arria10_chameleonv3_480_2-u-boot.dtsi | 4 ++++ arch/arm/dts/socfpga_arria10_chameleonv3_480_2.dts | 2 +- board/google/chameleonv3/environment.txt | 13 +++++++++++++ configs/socfpga_chameleonv3_defconfig | 2 ++ include/configs/socfpga_chameleonv3.h | 9 ++++----- 11 files changed, 47 insertions(+), 7 deletions(-) rename arch/arm/dts/{socfpga_arria10_chameleonv3.dts => socfpga_arria10_chameleonv3.dtsi} (100%) create mode 100644 arch/arm/dts/socfpga_arria10_chameleonv3_270_2-u-boot.dtsi create mode 100644 arch/arm/dts/socfpga_arria10_chameleonv3_270_2.dts create mode 100644 board/google/chameleonv3/environment.txt
Applied all, thanks.
Please just keep an eye on this and let me know if this doesn't land in mainline in like a week or so. Sorry for the delay.
participants (2)
-
Marek Vasut -
Paweł Anikiel