[U-Boot] [PATCH 1/3] mx23: Operate DDR voltage supply at 2.5V
From: Fabio Estevam fabio.estevam@freescale.com
After the recent fixes in the mx23 DDR setup, it is safe to operate DDR voltage at the recommended 2.5V voltage level again.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com --- arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c index 41fb803..4ed197b 100644 --- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c +++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c @@ -247,7 +247,7 @@ static void mx23_mem_setup_vddmem(void) struct mxs_power_regs *power_regs = (struct mxs_power_regs *)MXS_POWER_BASE;
- writel((0x12 << POWER_VDDMEMCTRL_TRG_OFFSET) | + writel((0x10 << POWER_VDDMEMCTRL_TRG_OFFSET) | POWER_VDDMEMCTRL_ENABLE_ILIMIT | POWER_VDDMEMCTRL_ENABLE_LINREG | POWER_VDDMEMCTRL_PULLDOWN_ACTIVE, @@ -255,7 +255,7 @@ static void mx23_mem_setup_vddmem(void)
early_delay(10000);
- writel((0x12 << POWER_VDDMEMCTRL_TRG_OFFSET) | + writel((0x10 << POWER_VDDMEMCTRL_TRG_OFFSET) | POWER_VDDMEMCTRL_ENABLE_LINREG, &power_regs->hw_power_vddmemctrl); }
From: Fabio Estevam fabio.estevam@freescale.com
mx23 SSP pad registers do not contain voltage selection bit, so just remove it.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com --- board/freescale/mx23evk/spl_boot.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/freescale/mx23evk/spl_boot.c b/board/freescale/mx23evk/spl_boot.c index 8da992b..6be8c8d 100644 --- a/board/freescale/mx23evk/spl_boot.c +++ b/board/freescale/mx23evk/spl_boot.c @@ -25,7 +25,7 @@ #include <asm/arch/imx-regs.h> #include <asm/arch/sys_proto.h>
-#define MUX_CONFIG_SSP1 (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP) +#define MUX_CONFIG_SSP1 (MXS_PAD_8MA | MXS_PAD_PULLUP) #define MUX_CONFIG_EMI (MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_PULLUP)
const iomux_cfg_t iomux_setup[] = {
Dear Fabio Estevam,
From: Fabio Estevam fabio.estevam@freescale.com
mx23 SSP pad registers do not contain voltage selection bit, so just remove it.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com
None of them do, so you can wipe those altogether for all the #defines, no ?
Best regards, Marek Vasut
On Sun, May 5, 2013 at 11:20 PM, Marek Vasut marex@denx.de wrote:
Dear Fabio Estevam,
From: Fabio Estevam fabio.estevam@freescale.com
mx23 SSP pad registers do not contain voltage selection bit, so just remove it.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com
None of them do, so you can wipe those altogether for all the #defines, no ?
Sorry, I cannot understand this comment.
Dear Fabio Estevam,
On Sun, May 5, 2013 at 11:20 PM, Marek Vasut marex@denx.de wrote:
Dear Fabio Estevam,
From: Fabio Estevam fabio.estevam@freescale.com
mx23 SSP pad registers do not contain voltage selection bit, so just remove it.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com
None of them do, so you can wipe those altogether for all the #defines, no ?
Sorry, I cannot understand this comment.
None of the MX23 pins contain voltage selection bit, you can just remove them all.
Best regards, Marek Vasut
On Sun, May 5, 2013 at 11:29 PM, Marek Vasut marex@denx.de wrote:
None of the MX23 pins contain voltage selection bit, you can just remove them all.
The mx23 EMI pins do have voltage select bit.
I just removed the voltage select bit from SSP pins.
What is wrong with this patch, please?
Dear Fabio Estevam,
On Sun, May 5, 2013 at 11:29 PM, Marek Vasut marex@denx.de wrote:
None of the MX23 pins contain voltage selection bit, you can just remove them all.
The mx23 EMI pins do have voltage select bit.
I just removed the voltage select bit from SSP pins.
What is wrong with this patch, please?
Ah uh ... 4:37 am here, forget my rambling, sorry, my fault, good night.
Best regards, Marek Vasut
On 06/05/2013 03:52, Fabio Estevam wrote:
From: Fabio Estevam fabio.estevam@freescale.com
mx23 SSP pad registers do not contain voltage selection bit, so just remove it.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com
Applied to u-boot-imx, thanks.
Best regards, Stefano Babic
From: Fabio Estevam fabio.estevam@freescale.com
mx23 SSP pad registers do not contain voltage selection bit, so just remove it.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com --- board/olimex/mx23_olinuxino/spl_boot.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/olimex/mx23_olinuxino/spl_boot.c b/board/olimex/mx23_olinuxino/spl_boot.c index 3755f29..6ba8c86 100644 --- a/board/olimex/mx23_olinuxino/spl_boot.c +++ b/board/olimex/mx23_olinuxino/spl_boot.c @@ -30,7 +30,7 @@ #include <asm/arch/sys_proto.h>
#define MUX_CONFIG_EMI (MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_PULLUP) -#define MUX_CONFIG_SSP (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP) +#define MUX_CONFIG_SSP (MXS_PAD_8MA | MXS_PAD_PULLUP)
const iomux_cfg_t iomux_setup[] = { /* DUART */
Dear Fabio Estevam,
From: Fabio Estevam fabio.estevam@freescale.com
mx23 SSP pad registers do not contain voltage selection bit, so just remove it.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com
I see ... I'd say just squash this and 2/3 .
Best regards, Marek Vasut
On 06/05/2013 03:52, Fabio Estevam wrote:
From: Fabio Estevam fabio.estevam@freescale.com
mx23 SSP pad registers do not contain voltage selection bit, so just remove it.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com
Applied to u-boot-imx, thanks.
Best regards, Stefano Babic
Dear Fabio Estevam,
From: Fabio Estevam fabio.estevam@freescale.com
After the recent fixes in the mx23 DDR setup, it is safe to operate DDR voltage at the recommended 2.5V voltage level again.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com
Is this a tripple revert ?
Stefano, you can apply this before applying the patches I complained weren't applied a few hours ago, it'll prevent merge conflict. Esp. this [PATCH] arm: mx23: Fix VDDMEM misconfiguration
arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c index 41fb803..4ed197b 100644 --- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c +++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c @@ -247,7 +247,7 @@ static void mx23_mem_setup_vddmem(void) struct mxs_power_regs *power_regs = (struct mxs_power_regs *)MXS_POWER_BASE;
- writel((0x12 << POWER_VDDMEMCTRL_TRG_OFFSET) |
- writel((0x10 << POWER_VDDMEMCTRL_TRG_OFFSET) | POWER_VDDMEMCTRL_ENABLE_ILIMIT | POWER_VDDMEMCTRL_ENABLE_LINREG | POWER_VDDMEMCTRL_PULLDOWN_ACTIVE,
@@ -255,7 +255,7 @@ static void mx23_mem_setup_vddmem(void)
early_delay(10000);
- writel((0x12 << POWER_VDDMEMCTRL_TRG_OFFSET) |
- writel((0x10 << POWER_VDDMEMCTRL_TRG_OFFSET) | POWER_VDDMEMCTRL_ENABLE_LINREG, &power_regs->hw_power_vddmemctrl);
}
Best regards, Marek Vasut
On 06/05/2013 03:52, Fabio Estevam wrote:
From: Fabio Estevam fabio.estevam@freescale.com
After the recent fixes in the mx23 DDR setup, it is safe to operate DDR voltage at the recommended 2.5V voltage level again.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com
Applied to u-boot-imx, thanks.
Best regards, Stefano Babic
participants (3)
-
Fabio Estevam -
Marek Vasut -
Stefano Babic