Wolfgang Denk wrote:

In message 3FFDFC1D.200@esteem.com you wrote:

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We have a single flash chip on our board that will be either 4MB or 8MB. Due to the way that the 405EP boots up I thought that the smallest I could ever get U-Boot's binary image was two megs. However, when I

You maust be doing something very strange.

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compile and link it it turns out to be 256K. Is this correct or am I mistaken on the minimal size of U-Boot for a 405EP based board?

U-Boot easily fits in 170...240 kB.

You did not ptovide any details,

I apologise.

so I can only speculate that you put the U-Boot start address somewhere in lower flash memory. Remember that the 405 uses 0xFFFFFFFC as reset address, so if you put U-Boot at 0xFF000000 the binary image will have to cover all the range from 0xFF000000 to 0xFFFFFFFF (= 16 MB) even if only 200 kB are actually used. Just put U-Boot to a high address in flash, something like 0xFFFC0000

Best regards,

Wolfgang Denk

As you stated, the reset vector is at 0xFFFFFFFC . Unfortunatly uppon reset the EBC0_B0CR address is set to 0xFFE00000 and the size is set to 2MB . This puts our reset vector right in the middle of our 4MB flash chip. We are using a bottom boot block flash part and I was hoping to use the smaller sectors for the environment. Our main goal right now is the verification of the hardware so efficiency of flash usage is not a priority ( Fortunatly our kernel and ram disk will fit in the remaining 2MB though this will probably change in the future). I placed U-boot at the beginning of the flash address space just to get things done.

Although I am certain that U-boot actual code consumes only about 200K to 256K, with how I defined it my binary image should be 2MB. My problem is my binary image is only 256K in size and not the 2MB I was expecting.

Sorry for not being more specific.

More misc. details from board specific header file.

#define FLASH_BASE0_PRELIM 0xFF800000 /* FLASH bank #0 */

/*----------------------------------------------------------------------- * Start addresses for the final memory configuration * (Set up by the startup code) * Please note that CFG_SDRAM_BASE _must_ start at 0 */ #define CFG_SDRAM_BASE 0x00000000 #define CFG_MAX_SDRAM_SIZE 0x04000000 #define CFG_FLASH_BASE 0xFF800000 #define CFG_MONITOR_BASE CFG_FLASH_BASE #define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Monitor */ #define CFG_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc() */

PS. I remember a few years ago someone in the PPC-Boot mailing list said something about a split PPC-Boot image. Would this be possible in U-Boot? Seeing that no matter what we do U-Boot is going to occupy a sector in the middle of our flash memory map it would allow us to use some of the space wasted.

Thanks in advance

Conn Clark