This board uses setup_i2c() in SPL. The setup_i2c() function internally calls gpio_request(), which in turn internally calls strdup(). The strdup() requires a running mallocator, so this patch makes the mallocator available.

Signed-off-by: Marek Vasut marex@denx.de Cc: Igor Grinberg grinberg@compulab.co.il Cc: Nikita Kiryanov nikita@compulab.co.il Cc: Sean Cross xobs@kosagi.com Cc: Simon Glass sjg@chromium.org Cc: Stefano Babic sbabic@denx.de Cc: Tim Harvey tharvey@gateworks.com --- include/configs/gw_ventana.h | 1 + 1 file changed, 1 insertion(+)

diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 620f950..4f137fc 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -39,6 +39,7 @@

/* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) +#define CONFIG_SYS_MALLOC_F_LEN (1 << 10)

/* Init Functions */ #define CONFIG_BOARD_EARLY_INIT_F

This board uses setup_i2c() in SPL. The setup_i2c() function internally calls gpio_request(), which in turn internally calls strdup(). The strdup() requires a running mallocator, so this patch makes the mallocator available.

Signed-off-by: Marek Vasut marex@denx.de Cc: Igor Grinberg grinberg@compulab.co.il Cc: Nikita Kiryanov nikita@compulab.co.il Cc: Sean Cross xobs@kosagi.com Cc: Simon Glass sjg@chromium.org Cc: Stefano Babic sbabic@denx.de Cc: Tim Harvey tharvey@gateworks.com --- include/configs/novena.h | 1 + 1 file changed, 1 insertion(+)

diff --git a/include/configs/novena.h b/include/configs/novena.h index 879141a..0f3621a 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -115,6 +115,7 @@ #define CONFIG_SYS_MEMTEST_END 0x20000000

#define CONFIG_SYS_MALLOC_LEN (64 * 1024 * 1024) +#define CONFIG_SYS_MALLOC_F_LEN (1 << 10)

/* SPL */ #define CONFIG_SPL_FAT_SUPPORT

Just zap multiple spaces and replace them with tabs properly.

Signed-off-by: Marek Vasut marex@denx.de Cc: Igor Grinberg grinberg@compulab.co.il Cc: Nikita Kiryanov nikita@compulab.co.il Cc: Sean Cross xobs@kosagi.com Cc: Simon Glass sjg@chromium.org Cc: Stefano Babic sbabic@denx.de Cc: Tim Harvey tharvey@gateworks.com --- board/kosagi/novena/novena.c | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-)

diff --git a/board/kosagi/novena/novena.c b/board/kosagi/novena/novena.c index 6add9e5..e303a57 100644 --- a/board/kosagi/novena/novena.c +++ b/board/kosagi/novena/novena.c @@ -172,19 +172,19 @@ struct display_info_t const displays[] = { .detect = detect_hdmi, .enable = enable_hdmi, .mode = { - .name = "HDMI", - .refresh = 60, - .xres = 1024, - .yres = 768, - .pixclock = 15385, - .left_margin = 220, - .right_margin = 40, - .upper_margin = 21, - .lower_margin = 7, - .hsync_len = 60, - .vsync_len = 10, - .sync = FB_SYNC_EXT, - .vmode = FB_VMODE_NONINTERLACED + .name = "HDMI", + .refresh = 60, + .xres = 1024, + .yres = 768, + .pixclock = 15385, + .left_margin = 220, + .right_margin = 40, + .upper_margin = 21, + .lower_margin = 7, + .hsync_len = 60, + .vsync_len = 10, + .sync = FB_SYNC_EXT, + .vmode = FB_VMODE_NONINTERLACED } } };

Sequence like the following is completely useless and results from an errorneous ordering of the statements during development. Zap it. #ifdef FOO #define FOO

Signed-off-by: Marek Vasut marex@denx.de Cc: Igor Grinberg grinberg@compulab.co.il Cc: Nikita Kiryanov nikita@compulab.co.il Cc: Sean Cross xobs@kosagi.com Cc: Simon Glass sjg@chromium.org Cc: Stefano Babic sbabic@denx.de Cc: Tim Harvey tharvey@gateworks.com --- include/configs/novena.h | 1 - 1 file changed, 1 deletion(-)

diff --git a/include/configs/novena.h b/include/configs/novena.h index 0f3621a..4924cbf 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -226,7 +226,6 @@

/* Video output */ #ifdef CONFIG_VIDEO -#define CONFIG_VIDEO #define CONFIG_VIDEO_IPUV3 #define CONFIG_CFB_CONSOLE #define CONFIG_VGA_AS_SINGLE_DEVICE

Pull the definitions of GPIOs into a separate header file, so that they can be used across all source files.

Signed-off-by: Marek Vasut marex@denx.de Cc: Igor Grinberg grinberg@compulab.co.il Cc: Nikita Kiryanov nikita@compulab.co.il Cc: Sean Cross xobs@kosagi.com Cc: Simon Glass sjg@chromium.org Cc: Stefano Babic sbabic@denx.de Cc: Tim Harvey tharvey@gateworks.com --- board/kosagi/novena/novena.c | 6 ++---- board/kosagi/novena/novena.h | 23 +++++++++++++++++++++++ board/kosagi/novena/novena_spl.c | 10 ++-------- 3 files changed, 27 insertions(+), 12 deletions(-) create mode 100644 board/kosagi/novena/novena.h

diff --git a/board/kosagi/novena/novena.c b/board/kosagi/novena/novena.c index e303a57..5493e07 100644 --- a/board/kosagi/novena/novena.c +++ b/board/kosagi/novena/novena.c @@ -36,11 +36,9 @@ #include <power/pfuze100_pmic.h> #include <stdio_dev.h>

-DECLARE_GLOBAL_DATA_PTR; +#include "novena.h"

-#define NOVENA_BUTTON_GPIO IMX_GPIO_NR(4, 14) -#define NOVENA_SD_WP IMX_GPIO_NR(1, 2) -#define NOVENA_SD_CD IMX_GPIO_NR(1, 4) +DECLARE_GLOBAL_DATA_PTR;

/* * GPIO button diff --git a/board/kosagi/novena/novena.h b/board/kosagi/novena/novena.h new file mode 100644 index 0000000..6613ad4 --- /dev/null +++ b/board/kosagi/novena/novena.h @@ -0,0 +1,23 @@ +/* + * Novena board support + * + * Copyright (C) 2014 Marek Vasut marex@denx.de + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __BOARD_KOSAGI_NOVENA_NOVENA_H__ +#define __BOARD_KOSAGI_NOVENA_NOVENA_H__ + +#define NOVENA_AUDIO_PWRON IMX_GPIO_NR(5, 17) +#define NOVENA_BUTTON_GPIO IMX_GPIO_NR(4, 14) +#define NOVENA_FPGA_RESET_N_GPIO IMX_GPIO_NR(5, 7) +#define NOVENA_HDMI_GHOST_HPD IMX_GPIO_NR(5, 4) +#define NOVENA_PCIE_DISABLE_GPIO IMX_GPIO_NR(2, 16) +#define NOVENA_PCIE_POWER_ON_GPIO IMX_GPIO_NR(7, 12) +#define NOVENA_PCIE_RESET_GPIO IMX_GPIO_NR(3, 29) +#define NOVENA_PCIE_WAKE_UP_GPIO IMX_GPIO_NR(3, 22) +#define NOVENA_SD_CD IMX_GPIO_NR(1, 4) +#define NOVENA_SD_WP IMX_GPIO_NR(1, 2) + +#endif /* __BOARD_KOSAGI_NOVENA_NOVENA_H__ */ diff --git a/board/kosagi/novena/novena_spl.c b/board/kosagi/novena/novena_spl.c index c07735a..5ebc59b 100644 --- a/board/kosagi/novena/novena_spl.c +++ b/board/kosagi/novena/novena_spl.c @@ -25,6 +25,8 @@

#include <asm/arch/mx6-ddr.h>

+#include "novena.h" + DECLARE_GLOBAL_DATA_PTR;

#define UART_PAD_CTRL \ @@ -68,14 +70,6 @@ DECLARE_GLOBAL_DATA_PTR;

#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)

-#define NOVENA_AUDIO_PWRON IMX_GPIO_NR(5, 17) -#define NOVENA_FPGA_RESET_N_GPIO IMX_GPIO_NR(5, 7) -#define NOVENA_HDMI_GHOST_HPD IMX_GPIO_NR(5, 4) -#define NOVENA_PCIE_RESET_GPIO IMX_GPIO_NR(3, 29) -#define NOVENA_PCIE_POWER_ON_GPIO IMX_GPIO_NR(7, 12) -#define NOVENA_PCIE_WAKE_UP_GPIO IMX_GPIO_NR(3, 22) -#define NOVENA_PCIE_DISABLE_GPIO IMX_GPIO_NR(2, 16) - /* * Audio */

Pull all of the video handling into a separate file, since a lot more code will be added and such code would polute the board file.

Signed-off-by: Marek Vasut marex@denx.de Cc: Igor Grinberg grinberg@compulab.co.il Cc: Nikita Kiryanov nikita@compulab.co.il Cc: Sean Cross xobs@kosagi.com Cc: Simon Glass sjg@chromium.org Cc: Stefano Babic sbabic@denx.de Cc: Tim Harvey tharvey@gateworks.com --- board/kosagi/novena/Makefile | 1 + board/kosagi/novena/novena.c | 79 +-------------------------------- board/kosagi/novena/novena.h | 2 + board/kosagi/novena/video.c | 102 +++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 106 insertions(+), 78 deletions(-) create mode 100644 board/kosagi/novena/video.c

diff --git a/board/kosagi/novena/Makefile b/board/kosagi/novena/Makefile index 6fba177..6893b63 100644 --- a/board/kosagi/novena/Makefile +++ b/board/kosagi/novena/Makefile @@ -8,4 +8,5 @@ ifdef CONFIG_SPL_BUILD obj-y := novena_spl.o else obj-y := novena.o +obj-$(CONFIG_VIDEO_IPUV3) += video.o endif diff --git a/board/kosagi/novena/novena.c b/board/kosagi/novena/novena.c index 5493e07..e7a6adb 100644 --- a/board/kosagi/novena/novena.c +++ b/board/kosagi/novena/novena.c @@ -152,87 +152,10 @@ int board_mmc_init(bd_t *bis) } #endif

-/* - * Video over HDMI - */ -#if defined(CONFIG_VIDEO_IPUV3) -static void enable_hdmi(struct display_info_t const *dev) -{ - imx_enable_hdmi_phy(); -} - -struct display_info_t const displays[] = { - { - /* HDMI Output */ - .bus = -1, - .addr = 0, - .pixfmt = IPU_PIX_FMT_RGB24, - .detect = detect_hdmi, - .enable = enable_hdmi, - .mode = { - .name = "HDMI", - .refresh = 60, - .xres = 1024, - .yres = 768, - .pixclock = 15385, - .left_margin = 220, - .right_margin = 40, - .upper_margin = 21, - .lower_margin = 7, - .hsync_len = 60, - .vsync_len = 10, - .sync = FB_SYNC_EXT, - .vmode = FB_VMODE_NONINTERLACED - } - } -}; - -size_t display_count = ARRAY_SIZE(displays); - -static void setup_display(void) -{ - struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; - struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; - - enable_ipu_clock(); - imx_setup_hdmi(); - - /* Turn on LDB0,IPU,IPU DI0 clocks */ - setbits_le32(&mxc_ccm->CCGR3, MXC_CCM_CCGR3_LDB_DI0_MASK); - - /* set LDB0, LDB1 clk select to 011/011 */ - clrsetbits_le32(&mxc_ccm->cs2cdr, - MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK | - MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_MASK, - (3 << MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET) | - (3 << MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET)); - - setbits_le32(&mxc_ccm->cscmr2, MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV); - - setbits_le32(&mxc_ccm->chsccdr, CHSCCDR_CLK_SEL_LDB_DI0 << - MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET); - - writel(IOMUXC_GPR2_BGREF_RRMODE_EXTERNAL_RES | - IOMUXC_GPR2_DI1_VS_POLARITY_ACTIVE_HIGH | - IOMUXC_GPR2_DI0_VS_POLARITY_ACTIVE_LOW | - IOMUXC_GPR2_BIT_MAPPING_CH1_SPWG | - IOMUXC_GPR2_DATA_WIDTH_CH1_18BIT | - IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG | - IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT | - IOMUXC_GPR2_LVDS_CH1_MODE_DISABLED | - IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0, - &iomux->gpr[2]); - - clrsetbits_le32(&iomux->gpr[3], IOMUXC_GPR3_LVDS0_MUX_CTL_MASK, - IOMUXC_GPR3_MUX_SRC_IPU1_DI0 << - IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET); -} -#endif - int board_early_init_f(void) { #if defined(CONFIG_VIDEO_IPUV3) - setup_display(); + setup_display_clock(); #endif

return 0; diff --git a/board/kosagi/novena/novena.h b/board/kosagi/novena/novena.h index 6613ad4..244004d 100644 --- a/board/kosagi/novena/novena.h +++ b/board/kosagi/novena/novena.h @@ -20,4 +20,6 @@ #define NOVENA_SD_CD IMX_GPIO_NR(1, 4) #define NOVENA_SD_WP IMX_GPIO_NR(1, 2)

+void setup_display_clock(void); + #endif /* __BOARD_KOSAGI_NOVENA_NOVENA_H__ */ diff --git a/board/kosagi/novena/video.c b/board/kosagi/novena/video.c new file mode 100644 index 0000000..fdcd100 --- /dev/null +++ b/board/kosagi/novena/video.c @@ -0,0 +1,102 @@ +/* + * Novena video output support + * + * Copyright (C) 2014 Marek Vasut marex@denx.de + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/errno.h> +#include <asm/gpio.h> +#include <asm/io.h> +#include <asm/arch/clock.h> +#include <asm/arch/crm_regs.h> +#include <asm/arch/imx-regs.h> +#include <asm/arch/iomux.h> +#include <asm/arch/mxc_hdmi.h> +#include <asm/arch/sys_proto.h> +#include <asm/imx-common/iomux-v3.h> +#include <asm/imx-common/mxc_i2c.h> +#include <asm/imx-common/video.h> +#include <i2c.h> +#include <input.h> +#include <ipu_pixfmt.h> +#include <linux/fb.h> +#include <linux/input.h> +#include <malloc.h> +#include <stdio_dev.h> + +#include "novena.h" + +static void enable_hdmi(struct display_info_t const *dev) +{ + imx_enable_hdmi_phy(); +} + +struct display_info_t const displays[] = { + { + /* HDMI Output */ + .bus = -1, + .addr = 0, + .pixfmt = IPU_PIX_FMT_RGB24, + .detect = detect_hdmi, + .enable = enable_hdmi, + .mode = { + .name = "HDMI", + .refresh = 60, + .xres = 1024, + .yres = 768, + .pixclock = 15384, + .left_margin = 220, + .right_margin = 40, + .upper_margin = 21, + .lower_margin = 7, + .hsync_len = 60, + .vsync_len = 10, + .sync = FB_SYNC_EXT, + .vmode = FB_VMODE_NONINTERLACED + }, + }, +}; + +size_t display_count = ARRAY_SIZE(displays); + +void setup_display_clock(void) +{ + struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; + + enable_ipu_clock(); + imx_setup_hdmi(); + + /* Turn on LDB0,IPU,IPU DI0 clocks */ + setbits_le32(&mxc_ccm->CCGR3, MXC_CCM_CCGR3_LDB_DI0_MASK); + + /* set LDB0, LDB1 clk select to 011/011 */ + clrsetbits_le32(&mxc_ccm->cs2cdr, + MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK | + MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_MASK, + (3 << MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET) | + (3 << MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET)); + + setbits_le32(&mxc_ccm->cscmr2, MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV); + + setbits_le32(&mxc_ccm->chsccdr, CHSCCDR_CLK_SEL_LDB_DI0 << + MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET); + + writel(IOMUXC_GPR2_BGREF_RRMODE_EXTERNAL_RES | + IOMUXC_GPR2_DI1_VS_POLARITY_ACTIVE_HIGH | + IOMUXC_GPR2_DI0_VS_POLARITY_ACTIVE_LOW | + IOMUXC_GPR2_BIT_MAPPING_CH1_SPWG | + IOMUXC_GPR2_DATA_WIDTH_CH1_18BIT | + IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG | + IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT | + IOMUXC_GPR2_LVDS_CH1_MODE_DISABLED | + IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0, + &iomux->gpr[2]); + + clrsetbits_le32(&iomux->gpr[3], IOMUXC_GPR3_LVDS0_MUX_CTL_MASK, + IOMUXC_GPR3_MUX_SRC_IPU1_DI0 << + IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET); +}

Repair the register configuration and add proper support for the display attached to both LVDS channels.

Signed-off-by: Marek Vasut marex@denx.de Cc: Igor Grinberg grinberg@compulab.co.il Cc: Nikita Kiryanov nikita@compulab.co.il Cc: Sean Cross xobs@kosagi.com Cc: Simon Glass sjg@chromium.org Cc: Stefano Babic sbabic@denx.de Cc: Tim Harvey tharvey@gateworks.com --- board/kosagi/novena/novena.c | 8 + board/kosagi/novena/novena.h | 8 + board/kosagi/novena/novena_spl.c | 7 + board/kosagi/novena/video.c | 400 ++++++++++++++++++++++++++++++++++++--- include/configs/novena.h | 1 + 5 files changed, 401 insertions(+), 23 deletions(-)

diff --git a/board/kosagi/novena/novena.c b/board/kosagi/novena/novena.c index e7a6adb..69f5be3 100644 --- a/board/kosagi/novena/novena.c +++ b/board/kosagi/novena/novena.c @@ -173,6 +173,14 @@ int board_init(void) return 0; }

+int board_late_init(void) +{ +#if defined(CONFIG_VIDEO_IPUV3) + setup_display_lvds(); +#endif + return 0; +} + int checkboard(void) { puts("Board: Novena 4x\n"); diff --git a/board/kosagi/novena/novena.h b/board/kosagi/novena/novena.h index 244004d..8f11583 100644 --- a/board/kosagi/novena/novena.h +++ b/board/kosagi/novena/novena.h @@ -10,9 +10,12 @@ #define __BOARD_KOSAGI_NOVENA_NOVENA_H__

#define NOVENA_AUDIO_PWRON IMX_GPIO_NR(5, 17) +#define NOVENA_BACKLIGHT_PWM_GPIO IMX_GPIO_NR(4, 29) +#define NOVENA_BACKLIGHT_PWR_GPIO IMX_GPIO_NR(4, 15) #define NOVENA_BUTTON_GPIO IMX_GPIO_NR(4, 14) #define NOVENA_FPGA_RESET_N_GPIO IMX_GPIO_NR(5, 7) #define NOVENA_HDMI_GHOST_HPD IMX_GPIO_NR(5, 4) +#define NOVENA_ITE6251_PWR_GPIO IMX_GPIO_NR(5, 28) #define NOVENA_PCIE_DISABLE_GPIO IMX_GPIO_NR(2, 16) #define NOVENA_PCIE_POWER_ON_GPIO IMX_GPIO_NR(7, 12) #define NOVENA_PCIE_RESET_GPIO IMX_GPIO_NR(3, 29) @@ -20,6 +23,11 @@ #define NOVENA_SD_CD IMX_GPIO_NR(1, 4) #define NOVENA_SD_WP IMX_GPIO_NR(1, 2)

+#define NOVENA_IT6251_I2C_BUS 2 +#define NOVENA_IT6251_CHIPADDR 0x5c +#define NOVENA_IT6251_LVDSADDR 0x5e + void setup_display_clock(void); +void setup_display_lvds(void);

#endif /* __BOARD_KOSAGI_NOVENA_NOVENA_H__ */ diff --git a/board/kosagi/novena/novena_spl.c b/board/kosagi/novena/novena_spl.c index 5ebc59b..b1688e0 100644 --- a/board/kosagi/novena/novena_spl.c +++ b/board/kosagi/novena/novena_spl.c @@ -386,6 +386,13 @@ static void novena_spl_setup_iomux_uart(void) static iomux_v3_cfg_t hdmi_pads[] = { /* "Ghost HPD" pin */ MX6_PAD_EIM_A24__GPIO5_IO04 | MUX_PAD_CTRL(NO_PAD_CTRL), + + /* LCD_PWR_CTL */ + MX6_PAD_CSI0_DAT10__GPIO5_IO28 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* LCD_BL_ON */ + MX6_PAD_KEY_ROW4__GPIO4_IO15 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* GPIO_PWM1 */ + MX6_PAD_DISP0_DAT8__GPIO4_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL), };

static void novena_spl_setup_iomux_video(void) diff --git a/board/kosagi/novena/video.c b/board/kosagi/novena/video.c index fdcd100..6e9fd7d 100644 --- a/board/kosagi/novena/video.c +++ b/board/kosagi/novena/video.c @@ -1,6 +1,10 @@ /* * Novena video output support * + * IT6251 code based on code Copyright (C) 2014 Sean Cross + * from https://github.com/xobs/novena-linux.git commit + * 3d85836ee1377d445531928361809612aa0a18db + * * Copyright (C) 2014 Marek Vasut marex@denx.de * * SPDX-License-Identifier: GPL-2.0+ @@ -29,11 +33,275 @@

#include "novena.h"

+#define IT6251_VENDOR_ID_LOW 0x00 +#define IT6251_VENDOR_ID_HIGH 0x01 +#define IT6251_DEVICE_ID_LOW 0x02 +#define IT6251_DEVICE_ID_HIGH 0x03 +#define IT6251_SYSTEM_STATUS 0x0d +#define IT6251_SYSTEM_STATUS_RINTSTATUS (1 << 0) +#define IT6251_SYSTEM_STATUS_RHPDSTATUS (1 << 1) +#define IT6251_SYSTEM_STATUS_RVIDEOSTABLE (1 << 2) +#define IT6251_SYSTEM_STATUS_RPLL_IOLOCK (1 << 3) +#define IT6251_SYSTEM_STATUS_RPLL_XPLOCK (1 << 4) +#define IT6251_SYSTEM_STATUS_RPLL_SPLOCK (1 << 5) +#define IT6251_SYSTEM_STATUS_RAUXFREQ_LOCK (1 << 6) +#define IT6251_REF_STATE 0x0e +#define IT6251_REF_STATE_MAIN_LINK_DISABLED (1 << 0) +#define IT6251_REF_STATE_AUX_CHANNEL_READ (1 << 1) +#define IT6251_REF_STATE_CR_PATTERN (1 << 2) +#define IT6251_REF_STATE_EQ_PATTERN (1 << 3) +#define IT6251_REF_STATE_NORMAL_OPERATION (1 << 4) +#define IT6251_REF_STATE_MUTED (1 << 5) + +#define IT6251_REG_PCLK_CNT_LOW 0x57 +#define IT6251_REG_PCLK_CNT_HIGH 0x58 + +#define IT6521_RETRY_MAX 20 + +static int it6251_is_stable(void) +{ + const unsigned int caddr = NOVENA_IT6251_CHIPADDR; + const unsigned int laddr = NOVENA_IT6251_LVDSADDR; + int status; + int clkcnt; + int rpclkcnt; + int refstate; + + rpclkcnt = (i2c_reg_read(caddr, 0x13) & 0xff) | + ((i2c_reg_read(caddr, 0x14) << 8) & 0x0f00); + debug("RPCLKCnt: %d\n", rpclkcnt); + + status = i2c_reg_read(caddr, IT6251_SYSTEM_STATUS); + debug("System status: 0x%02x\n", status); + + clkcnt = (i2c_reg_read(laddr, IT6251_REG_PCLK_CNT_LOW) & 0xff) | + ((i2c_reg_read(laddr, IT6251_REG_PCLK_CNT_HIGH) << 8) & 0x0f00); + debug("Clock: 0x%02x\n", clkcnt); + + refstate = i2c_reg_read(laddr, IT6251_REF_STATE); + debug("Ref Link State: 0x%02x\n", refstate); + + if ((refstate & 0x1f) != 0) + return 0; + + /* If video is muted, that's a failure */ + if (refstate & IT6251_REF_STATE_MUTED) + return 0; + + if (!(status & IT6251_SYSTEM_STATUS_RVIDEOSTABLE)) + return 0; + + return 1; +} + +static int it6251_ready(void) +{ + const unsigned int caddr = NOVENA_IT6251_CHIPADDR; + + /* Test if the IT6251 came out of reset by reading ID regs. */ + if (i2c_reg_read(caddr, IT6251_VENDOR_ID_LOW) != 0x15) + return 0; + if (i2c_reg_read(caddr, IT6251_VENDOR_ID_HIGH) != 0xca) + return 0; + if (i2c_reg_read(caddr, IT6251_DEVICE_ID_LOW) != 0x51) + return 0; + if (i2c_reg_read(caddr, IT6251_DEVICE_ID_HIGH) != 0x62) + return 0; + + return 1; +} + +static void it6251_program_regs(void) +{ + const unsigned int caddr = NOVENA_IT6251_CHIPADDR; + const unsigned int laddr = NOVENA_IT6251_LVDSADDR; + + i2c_reg_write(caddr, 0x05, 0x00); + mdelay(1); + + /* set LVDSRX address, and enable */ + i2c_reg_write(caddr, 0xfd, 0xbc); + i2c_reg_write(caddr, 0xfe, 0x01); + + /* + * LVDSRX + */ + /* This write always fails, because the chip goes into reset */ + /* reset LVDSRX */ + i2c_reg_write(laddr, 0x05, 0xff); + i2c_reg_write(laddr, 0x05, 0x00); + + /* reset LVDSRX PLL */ + i2c_reg_write(laddr, 0x3b, 0x42); + i2c_reg_write(laddr, 0x3b, 0x43); + + /* something with SSC PLL */ + i2c_reg_write(laddr, 0x3c, 0x08); + /* don't swap links, but writing reserved registers */ + i2c_reg_write(laddr, 0x0b, 0x88); + + /* JEIDA, 8-bit depth 0x11, orig 0x42 */ + i2c_reg_write(laddr, 0x2c, 0x01); + /* "reserved" */ + i2c_reg_write(laddr, 0x32, 0x04); + /* "reserved" */ + i2c_reg_write(laddr, 0x35, 0xe0); + /* "reserved" + clock delay */ + i2c_reg_write(laddr, 0x2b, 0x24); + + /* reset LVDSRX pix clock */ + i2c_reg_write(laddr, 0x05, 0x02); + i2c_reg_write(laddr, 0x05, 0x00); + + /* + * DPTX + */ + /* set for two lane mode, normal op, no swapping, no downspread */ + i2c_reg_write(caddr, 0x16, 0x02); + + /* some AUX channel EDID magic */ + i2c_reg_write(caddr, 0x23, 0x40); + + /* power down lanes 3-0 */ + i2c_reg_write(caddr, 0x5c, 0xf3); + + /* enable DP scrambling, change EQ CR phase */ + i2c_reg_write(caddr, 0x5f, 0x06); + + /* color mode RGB, pclk/2 */ + i2c_reg_write(caddr, 0x60, 0x02); + /* dual pixel input mode, no EO swap, no RGB swap */ + i2c_reg_write(caddr, 0x61, 0x04); + /* M444B24 video format */ + i2c_reg_write(caddr, 0x62, 0x01); + + // vesa range / not interlace / vsync high / hsync high + i2c_reg_write(caddr, 0xa0, 0x0F); + + /* hpd event timer set to 1.6-ish ms */ + i2c_reg_write(caddr, 0xc9, 0xf5); + + /* more reserved magic */ + i2c_reg_write(caddr, 0xca, 0x4d); + i2c_reg_write(caddr, 0xcb, 0x37); + + /* enhanced framing mode, auto video fifo reset, video mute disable */ + i2c_reg_write(caddr, 0xd3, 0x03); + + /* "vidstmp" and some reserved stuff */ + i2c_reg_write(caddr, 0xd4, 0x45); + + /* queue number -- reserved */ + i2c_reg_write(caddr, 0xe7, 0xa0); + /* info frame packets and reserved */ + i2c_reg_write(caddr, 0xe8, 0x33); + /* more AVI stuff */ + i2c_reg_write(caddr, 0xec, 0x00); + + /* select PC master reg for aux channel? */ + i2c_reg_write(caddr, 0x23, 0x42); + + /* send PC request commands */ + i2c_reg_write(caddr, 0x24, 0x00); + i2c_reg_write(caddr, 0x25, 0x00); + i2c_reg_write(caddr, 0x26, 0x00); + + /* native aux read */ + i2c_reg_write(caddr, 0x2b, 0x00); + /* back to internal */ + i2c_reg_write(caddr, 0x23, 0x40); + + /* voltage swing level 3 */ + i2c_reg_write(caddr, 0x19, 0xff); + /* pre-emphasis level 3 */ + i2c_reg_write(caddr, 0x1a, 0xff); + + /* start link training */ + i2c_reg_write(caddr, 0x17, 0x01); +} + +static int it6251_init(void) +{ + const unsigned int caddr = NOVENA_IT6251_CHIPADDR; + int reg; + int tries, retries = 0; + + for (retries = 0; retries < IT6521_RETRY_MAX; retries++) { + + /* Program the chip. */ + it6251_program_regs(); + + /* Wait for video stable. */ + for (tries = 0; tries < 100; tries++) { + reg = i2c_reg_read(caddr, 0x17); + /* Test Link CFG, STS, LCS read done. */ + if ((reg & 0xe0) != 0xe0) { + /* Not yet, wait a bit more. */ + mdelay(2); + continue; + } + + /* Test if the video input is stable. */ + if (it6251_is_stable()) + return 0; + } + /* + * If we couldn't stabilize, requeue and try again, + * because it means that the LVDS channel isn't + * stable yet. + */ + printf("Display didn't stabilize.\n"); + printf("This may be because the LVDS port is still in powersave mode.\n"); + mdelay(50); + } + + return -EINVAL; +} + static void enable_hdmi(struct display_info_t const *dev) { imx_enable_hdmi_phy(); }

+static int lvds_enabled; + +static void enable_lvds(struct display_info_t const *dev) +{ + if (lvds_enabled) + return; + + /* ITE IT6251 power enable. */ + gpio_direction_output(NOVENA_ITE6251_PWR_GPIO, 0); + mdelay(10); + gpio_direction_output(NOVENA_ITE6251_PWR_GPIO, 1); + mdelay(20); + lvds_enabled = 1; +} + +static int detect_lvds(struct display_info_t const *dev) +{ + int ret, loops = 250; + + enable_lvds(dev); + + ret = i2c_set_bus_num(NOVENA_IT6251_I2C_BUS); + if (ret) { + puts("Cannot select IT6251 I2C bus.\n"); + return 0; + } + + /* Wait up-to ~250 mS for the LVDS to come up. */ + while (--loops) { + ret = it6251_ready(); + if (ret) + return ret; + + mdelay(1); + } + + return 0; +} + struct display_info_t const displays[] = { { /* HDMI Output */ @@ -57,46 +325,132 @@ struct display_info_t const displays[] = { .sync = FB_SYNC_EXT, .vmode = FB_VMODE_NONINTERLACED }, + }, { + /* LVDS Output: N133HSE-EA1 Rev. C1 */ + .bus = -1, + .pixfmt = IPU_PIX_FMT_RGB24, + .detect = detect_lvds, + .enable = enable_lvds, + .mode = { + .name = "Chimei-FHD", + .refresh = 60, + .xres = 1920, + .yres = 1080, + .pixclock = 15384, + .left_margin = 148, + .right_margin = 88, + .upper_margin = 36, + .lower_margin = 4, + .hsync_len = 44, + .vsync_len = 5, + .sync = FB_SYNC_HOR_HIGH_ACT | + FB_SYNC_VERT_HIGH_ACT | + FB_SYNC_EXT, + .vmode = FB_VMODE_NONINTERLACED, + }, }, };

size_t display_count = ARRAY_SIZE(displays);

+static void enable_vpll(void) +{ + struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + int timeout = 100000; + + setbits_le32(&ccm->analog_pll_video, BM_ANADIG_PLL_VIDEO_POWERDOWN); + + clrsetbits_le32(&ccm->analog_pll_video, + BM_ANADIG_PLL_VIDEO_DIV_SELECT | + BM_ANADIG_PLL_VIDEO_POST_DIV_SELECT, + BF_ANADIG_PLL_VIDEO_DIV_SELECT(37) | + BF_ANADIG_PLL_VIDEO_POST_DIV_SELECT(1)); + + writel(BF_ANADIG_PLL_VIDEO_NUM_A(11), &ccm->analog_pll_video_num); + writel(BF_ANADIG_PLL_VIDEO_DENOM_B(12), &ccm->analog_pll_video_denom); + + clrbits_le32(&ccm->analog_pll_video, BM_ANADIG_PLL_VIDEO_POWERDOWN); + + while (timeout--) + if (readl(&ccm->analog_pll_video) & BM_ANADIG_PLL_VIDEO_LOCK) + break; + if (timeout < 0) + printf("Warning: video pll lock timeout!\n"); + + clrsetbits_le32(&ccm->analog_pll_video, + BM_ANADIG_PLL_VIDEO_BYPASS, + BM_ANADIG_PLL_VIDEO_ENABLE); +} + void setup_display_clock(void) { struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;

enable_ipu_clock(); + enable_vpll(); imx_setup_hdmi();

- /* Turn on LDB0,IPU,IPU DI0 clocks */ + /* Turn on IPU LDB DI0 clocks */ setbits_le32(&mxc_ccm->CCGR3, MXC_CCM_CCGR3_LDB_DI0_MASK);

- /* set LDB0, LDB1 clk select to 011/011 */ + /* Switch LDB DI0 to PLL5 (Video PLL) */ clrsetbits_le32(&mxc_ccm->cs2cdr, - MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK | - MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_MASK, - (3 << MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET) | - (3 << MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET)); - - setbits_le32(&mxc_ccm->cscmr2, MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV); - - setbits_le32(&mxc_ccm->chsccdr, CHSCCDR_CLK_SEL_LDB_DI0 << - MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET); - - writel(IOMUXC_GPR2_BGREF_RRMODE_EXTERNAL_RES | - IOMUXC_GPR2_DI1_VS_POLARITY_ACTIVE_HIGH | - IOMUXC_GPR2_DI0_VS_POLARITY_ACTIVE_LOW | - IOMUXC_GPR2_BIT_MAPPING_CH1_SPWG | - IOMUXC_GPR2_DATA_WIDTH_CH1_18BIT | - IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG | - IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT | - IOMUXC_GPR2_LVDS_CH1_MODE_DISABLED | + MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK, + (0 << MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET)); + + /* LDB clock div by 3.5 */ + clrbits_le32(&mxc_ccm->cscmr2, MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV); + + /* DI0 clock derived from ldb_di0_clk */ + clrsetbits_le32(&mxc_ccm->chsccdr, + MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_MASK, + (CHSCCDR_CLK_SEL_LDB_DI0 << + MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET) + ); + + /* Enable both LVDS channels, both connected to DI0. */ + writel(IOMUXC_GPR2_DI0_VS_POLARITY_ACTIVE_HIGH | + IOMUXC_GPR2_BIT_MAPPING_CH1_JEIDA | + IOMUXC_GPR2_DATA_WIDTH_CH1_24BIT | + IOMUXC_GPR2_BIT_MAPPING_CH0_JEIDA | + IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT | + IOMUXC_GPR2_SPLIT_MODE_EN_MASK | + IOMUXC_GPR2_LVDS_CH1_MODE_ENABLED_DI0 | IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0, &iomux->gpr[2]);

- clrsetbits_le32(&iomux->gpr[3], IOMUXC_GPR3_LVDS0_MUX_CTL_MASK, - IOMUXC_GPR3_MUX_SRC_IPU1_DI0 << - IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET); + clrsetbits_le32(&iomux->gpr[3], + IOMUXC_GPR3_LVDS0_MUX_CTL_MASK | + IOMUXC_GPR3_LVDS1_MUX_CTL_MASK, + (IOMUXC_GPR3_MUX_SRC_IPU1_DI0 << + IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET) | + (IOMUXC_GPR3_MUX_SRC_IPU1_DI0 << + IOMUXC_GPR3_LVDS1_MUX_CTL_OFFSET) + ); +} + +void setup_display_lvds(void) +{ + int ret; + + ret = i2c_set_bus_num(NOVENA_IT6251_I2C_BUS); + if (ret) { + puts("Cannot select LVDS-to-eDP I2C bus.\n"); + return; + } + + /* The IT6251 should be ready now, if it's not, it's not connected. */ + ret = it6251_ready(); + if (!ret) + return; + + /* Init the LVDS-to-eDP chip and if it succeeded, enable backlight. */ + ret = it6251_init(); + if (!ret) { + /* Backlight power enable. */ + gpio_direction_output(NOVENA_BACKLIGHT_PWR_GPIO, 1); + /* PWM backlight pin, always on for full brightness. */ + gpio_direction_output(NOVENA_BACKLIGHT_PWM_GPIO, 1); + } } diff --git a/include/configs/novena.h b/include/configs/novena.h index 4924cbf..ea75d2c 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -12,6 +12,7 @@ /* System configurations */ #define CONFIG_MX6 #define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_LATE_INIT #define CONFIG_MISC_INIT_R #define CONFIG_DISPLAY_BOARDINFO #define CONFIG_DISPLAY_CPUINFO

2014-12-16 14:09 GMT+01:00 Marek Vasut marex@denx.de:

The malloc() calls are unnecessary, just allocate the stuff on stack. While at it, reorder the code a little, so that only one variable is used for the text, use snprintf() instead of sprintf() and use %01d as a formatting string to avoid any possible overflows.

Signed-off-by: Marek Vasut marex@denx.de Cc: Igor Grinberg grinberg@compulab.co.il Cc: Nikita Kiryanov nikita@compulab.co.il Cc: Sean Cross xobs@kosagi.com Cc: Simon Glass sjg@chromium.org Cc: Stefano Babic sbabic@denx.de Cc: Tim Harvey tharvey@gateworks.com

---

arch/arm/imx-common/i2c-mxv7.c | 24 ++++++++---------------- 1 file changed, 8 insertions(+), 16 deletions(-)

diff --git a/arch/arm/imx-common/i2c-mxv7.c b/arch/arm/imx-common/i2c-mxv7.c index 34f5387..1a632e7 100644 --- a/arch/arm/imx-common/i2c-mxv7.c +++ b/arch/arm/imx-common/i2c-mxv7.c @@ -73,26 +73,21 @@ static void * const i2c_bases[] = { int setup_i2c(unsigned i2c_index, int speed, int slave_addr, struct i2c_pads_info *p) {

•   char *name1, *name2;
  

•   char name[9];
    int ret;
  
    if (i2c_index >= ARRAY_SIZE(i2c_bases))
            return -EINVAL;
  
  

•   name1 = malloc(9);
  

•   name2 = malloc(9);
  

•   if (!name1 || !name2)
  

•           return -ENOMEM;
  

•   sprintf(name1, "i2c_sda%d", i2c_index);
  

•   sprintf(name2, "i2c_scl%d", i2c_index);
  

•   ret = gpio_request(p->sda.gp, name1);
  

•   snprintf(name, sizeof(name), "i2c_sda%01d", i2c_index);
  

•   ret = gpio_request(p->sda.gp, name);
    if (ret)
  

•           goto err_req1;
  

•           return ret;
  
  

•   ret = gpio_request(p->scl.gp, name2);
  

•   snprintf(name, sizeof(name), "i2c_scl%01d", i2c_index);
  

•   ret = gpio_request(p->scl.gp, name);
    if (ret)
  

•           goto err_req2;
  

•           goto err_req;
  
    /* Enable i2c clock */
    ret = enable_i2c_clk(1, i2c_index);
  

@@ -112,11 +107,8 @@ int setup_i2c(unsigned i2c_index, int speed, int slave_addr, err_idle: err_clk: gpio_free(p->scl.gp); -err_req2: +err_req: gpio_free(p->sda.gp); -err_req1:

•   free(name1);
  

•   free(name2);
  
    return ret;
  

}

2.1.3

Reviewed-by: Christian Gmeiner christian.gmeiner@gmail.com