Dear "Ciummo, Larry (DS-1)",

please keep the mailing list on Cc:.

In message F4BA0E7CACFBAC4384DC92F2D5AAB507B1165B@DSGBURGMAIL001.gburg.drs-ds.master you wrote:

Stephan:

I'm not Stephan.

Out board really isn't a Canyonlands, but a 460GT based board with a lot of custom hardware and mfg/bringup diagnostics code added. Certainly porting to a newer uboot is possible, but would require a lot of work.

I expected something like this. This is the penalty you have to pay for not pushing your changes into mainline as soon as they are ready.

I'd also like to wait until the AMCC folks get the DDR2 auto cal timing code in the main stream - I ported that myself and it took about a day to get it working, and I still haven't found a way to save the DDR2 timing data somewhere to avoid the long boot process to determine them each time.

Are you aware of any such activities? I don't remember any related postings. The last posting from AMCC/APM appears to be from early December 2010, and I cannot find any DDR initialization related postings from them before that either.

I would not hold my breath waiting for any cod updates from that side.

If you have any ideas on that let me know.

Well, with an out-of-tree port you are basicly on your own. We don't know that code, so the community cannot help you with it.

Best regards,

Wolfgang Denk