From: Minghuan Lian Minghuan.Lian@freescale.com

BRDCFG1_EMI1_SEL_MASK has been changed to 0x78, which contains selection bits and connected status bit. So the Corresponding mux value of RGMII is changed to BRDCFG1_EMI1_SEL_RGMII | BRDCFG1_EMI1_EN.

Signed-off-by: Minghuan Lian Minghuan.Lian@freescale.com Signed-off-by: Shaohui Xie Shaohui.Xie@freescale.com --- board/freescale/corenet_ds/eth_hydra.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/board/freescale/corenet_ds/eth_hydra.c b/board/freescale/corenet_ds/eth_hydra.c index 35825c4..9d8ca9e 100644 --- a/board/freescale/corenet_ds/eth_hydra.c +++ b/board/freescale/corenet_ds/eth_hydra.c @@ -250,11 +250,12 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr, return; }

- if (mux == BRDCFG1_EMI1_SEL_RGMII) { + if (mux == (BRDCFG1_EMI1_SEL_RGMII | BRDCFG1_EMI1_EN)) { /* RGMII */ /* The RGMII PHY is identified by the MAC connected to it */ sprintf(phy, "phy_rgmii_%u", port == FM1_DTSEC4 ? 0 : 1); fdt_set_phy_handle(fdt, compat, addr, phy); + return; }

/* If it's not RGMII or XGMII, it must be SGMII */