[PATCH V3] ARM: dts: stm32: Add KS8851-16MLL ethernet on FMC2
Add DT entries, Kconfig entries and board-specific entries to configure FMC2 bus and make KS8851-16MLL on that bus accessible to U-Boot.
Signed-off-by: Marek Vasut marex@denx.de Cc: Patrick Delaunay patrick.delaunay@st.com Cc: Patrice Chotard patrice.chotard@st.com --- V2: Configure FMC2 nCS4 for SRAM as well V3: Adjust the register macros --- arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi | 68 ++++++++++++++++++++++ board/dhelectronics/dh_stm32mp1/board.c | 28 +++++++++ configs/stm32mp15_dhcom_basic_defconfig | 1 + 3 files changed, 97 insertions(+)
diff --git a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi index 6c952a57ee..eba3588540 100644 --- a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi +++ b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi @@ -37,6 +37,12 @@ default-state = "on"; }; }; + + /* This is actually on FMC2, but we do not have bus driver for that */ + ksz8851: ks8851mll@64000000 { + compatible = "micrel,ks8851-mll"; + reg = <0x64000000 0x20000>; + }; };
&i2c4 { @@ -50,6 +56,68 @@ }; };
+&pinctrl { + /* These should bound to FMC2 bus driver, but we do not have one */ + pinctrl-0 = <&fmc_pins_b>; + pinctrl-1 = <&fmc_sleep_pins_b>; + pinctrl-names = "default", "sleep"; + + fmc_pins_b: fmc-0 { + pins1 { + pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */ + <STM32_PINMUX('D', 5, AF12)>, /* FMC_NWE */ + <STM32_PINMUX('B', 7, AF12)>, /* FMC_NL */ + <STM32_PINMUX('D', 14, AF12)>, /* FMC_D0 */ + <STM32_PINMUX('D', 15, AF12)>, /* FMC_D1 */ + <STM32_PINMUX('D', 0, AF12)>, /* FMC_D2 */ + <STM32_PINMUX('D', 1, AF12)>, /* FMC_D3 */ + <STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */ + <STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */ + <STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */ + <STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */ + <STM32_PINMUX('E', 11, AF12)>, /* FMC_D8 */ + <STM32_PINMUX('E', 12, AF12)>, /* FMC_D9 */ + <STM32_PINMUX('E', 13, AF12)>, /* FMC_D10 */ + <STM32_PINMUX('E', 14, AF12)>, /* FMC_D11 */ + <STM32_PINMUX('E', 15, AF12)>, /* FMC_D12 */ + <STM32_PINMUX('D', 8, AF12)>, /* FMC_D13 */ + <STM32_PINMUX('D', 9, AF12)>, /* FMC_D14 */ + <STM32_PINMUX('D', 10, AF12)>, /* FMC_D15 */ + <STM32_PINMUX('G', 9, AF12)>, /* FMC_NE2_FMC_NCE */ + <STM32_PINMUX('G', 12, AF12)>; /* FMC_NE4 */ + bias-disable; + drive-push-pull; + slew-rate = <3>; + }; + }; + + fmc_sleep_pins_b: fmc-sleep-0 { + pins { + pinmux = <STM32_PINMUX('D', 4, ANALOG)>, /* FMC_NOE */ + <STM32_PINMUX('D', 5, ANALOG)>, /* FMC_NWE */ + <STM32_PINMUX('B', 7, ANALOG)>, /* FMC_NL */ + <STM32_PINMUX('D', 14, ANALOG)>, /* FMC_D0 */ + <STM32_PINMUX('D', 15, ANALOG)>, /* FMC_D1 */ + <STM32_PINMUX('D', 0, ANALOG)>, /* FMC_D2 */ + <STM32_PINMUX('D', 1, ANALOG)>, /* FMC_D3 */ + <STM32_PINMUX('E', 7, ANALOG)>, /* FMC_D4 */ + <STM32_PINMUX('E', 8, ANALOG)>, /* FMC_D5 */ + <STM32_PINMUX('E', 9, ANALOG)>, /* FMC_D6 */ + <STM32_PINMUX('E', 10, ANALOG)>, /* FMC_D7 */ + <STM32_PINMUX('E', 11, ANALOG)>, /* FMC_D8 */ + <STM32_PINMUX('E', 12, ANALOG)>, /* FMC_D9 */ + <STM32_PINMUX('E', 13, ANALOG)>, /* FMC_D10 */ + <STM32_PINMUX('E', 14, ANALOG)>, /* FMC_D11 */ + <STM32_PINMUX('E', 15, ANALOG)>, /* FMC_D12 */ + <STM32_PINMUX('D', 8, ANALOG)>, /* FMC_D13 */ + <STM32_PINMUX('D', 9, ANALOG)>, /* FMC_D14 */ + <STM32_PINMUX('D', 10, ANALOG)>, /* FMC_D15 */ + <STM32_PINMUX('G', 9, ANALOG)>, /* FMC_NE2_FMC_NCE */ + <STM32_PINMUX('G', 12, ANALOG)>; /* FMC_NE4 */ + }; + }; +}; + &pmic { u-boot,dm-pre-reloc; }; diff --git a/board/dhelectronics/dh_stm32mp1/board.c b/board/dhelectronics/dh_stm32mp1/board.c index b663696983..be55242799 100644 --- a/board/dhelectronics/dh_stm32mp1/board.c +++ b/board/dhelectronics/dh_stm32mp1/board.c @@ -376,6 +376,32 @@ static void sysconf_init(void) #endif }
+static void board_init_fmc2(void) +{ +#define STM32_FMC2_BCR1 0x0 +#define STM32_FMC2_BTR1 0x4 +#define STM32_FMC2_BWTR1 0x104 +#define STM32_FMC2_BCR(x) ((x) * 0x8 + STM32_FMC2_BCR1) +#define STM32_FMC2_BTR(x) ((x) * 0x8 + STM32_FMC2_BTR1) +#define STM32_FMC2_BWTR(x) ((x) * 0x8 + STM32_FMC2_BWTR1) + +#define RCC_MP_AHB6RSTCLRR 0x218 +#define RCC_MP_AHB6ENSETR 0x19c + + /* Set up FMC2 bus for KS8851-16MLL and X11 SRAM */ + writel(BIT(12), STM32_RCC_BASE + RCC_MP_AHB6RSTCLRR); + writel(BIT(12), STM32_RCC_BASE + RCC_MP_AHB6ENSETR); + + /* KS8851-16MLL */ + writel(0x000010db, STM32_FMC2_BASE + STM32_FMC2_BCR(1)); + writel(0xc0022222, STM32_FMC2_BASE + STM32_FMC2_BTR(1)); + /* AS7C34098 SRAM on X11 */ + writel(0x000010db, STM32_FMC2_BASE + STM32_FMC2_BCR(3)); + writel(0xc0022222, STM32_FMC2_BASE + STM32_FMC2_BTR(3)); + + setbits_le32(STM32_FMC2_BASE + STM32_FMC2_BCR1, BIT(31)); +} + /* board dependent setup after realloc */ int board_init(void) { @@ -399,6 +425,8 @@ int board_init(void)
sysconf_init();
+ board_init_fmc2(); + if (CONFIG_IS_ENABLED(CONFIG_LED)) led_default_state();
diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig index 921dea242a..683f15e7d5 100644 --- a/configs/stm32mp15_dhcom_basic_defconfig +++ b/configs/stm32mp15_dhcom_basic_defconfig @@ -93,6 +93,7 @@ CONFIG_SPI_FLASH_MTD=y CONFIG_SPL_SPI_FLASH_MTD=y CONFIG_DM_ETH=y CONFIG_DWC_ETH_QOS=y +CONFIG_KS8851_MLL=y CONFIG_PHY=y CONFIG_PHY_STM32_USBPHYC=y CONFIG_PINCONF=y
Hi Marek
You have forgotten to take into account some of my previous remarks on V2
On 3/26/20 4:58 PM, Marek Vasut wrote:
Add DT entries, Kconfig entries and board-specific entries to configure FMC2 bus and make KS8851-16MLL on that bus accessible to U-Boot.
Signed-off-by: Marek Vasut marex@denx.de Cc: Patrick Delaunay patrick.delaunay@st.com Cc: Patrice Chotard patrice.chotard@st.com
V2: Configure FMC2 nCS4 for SRAM as well V3: Adjust the register macros
arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi | 68 ++++++++++++++++++++++ board/dhelectronics/dh_stm32mp1/board.c | 28 +++++++++ configs/stm32mp15_dhcom_basic_defconfig | 1 + 3 files changed, 97 insertions(+)
diff --git a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi index 6c952a57ee..eba3588540 100644 --- a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi +++ b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi @@ -37,6 +37,12 @@ default-state = "on"; }; };
- /* This is actually on FMC2, but we do not have bus driver for that */
- ksz8851: ks8851mll@64000000 {
compatible = "micrel,ks8851-mll";reg = <0x64000000 0x20000>;- };
};
&i2c4 { @@ -50,6 +56,68 @@ }; };
+&pinctrl {
- /* These should bound to FMC2 bus driver, but we do not have one */
- pinctrl-0 = <&fmc_pins_b>;
- pinctrl-1 = <&fmc_sleep_pins_b>;
- pinctrl-names = "default", "sleep";
- fmc_pins_b: fmc-0 {
pins1 {pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */<STM32_PINMUX('D', 5, AF12)>, /* FMC_NWE */<STM32_PINMUX('B', 7, AF12)>, /* FMC_NL */<STM32_PINMUX('D', 14, AF12)>, /* FMC_D0 */<STM32_PINMUX('D', 15, AF12)>, /* FMC_D1 */<STM32_PINMUX('D', 0, AF12)>, /* FMC_D2 */<STM32_PINMUX('D', 1, AF12)>, /* FMC_D3 */<STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */<STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */<STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */<STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */<STM32_PINMUX('E', 11, AF12)>, /* FMC_D8 */<STM32_PINMUX('E', 12, AF12)>, /* FMC_D9 */<STM32_PINMUX('E', 13, AF12)>, /* FMC_D10 */<STM32_PINMUX('E', 14, AF12)>, /* FMC_D11 */<STM32_PINMUX('E', 15, AF12)>, /* FMC_D12 */<STM32_PINMUX('D', 8, AF12)>, /* FMC_D13 */<STM32_PINMUX('D', 9, AF12)>, /* FMC_D14 */<STM32_PINMUX('D', 10, AF12)>, /* FMC_D15 */<STM32_PINMUX('G', 9, AF12)>, /* FMC_NE2_FMC_NCE */<STM32_PINMUX('G', 12, AF12)>; /* FMC_NE4 */bias-disable;drive-push-pull;slew-rate = <3>;};- };
- fmc_sleep_pins_b: fmc-sleep-0 {
pins {pinmux = <STM32_PINMUX('D', 4, ANALOG)>, /* FMC_NOE */<STM32_PINMUX('D', 5, ANALOG)>, /* FMC_NWE */<STM32_PINMUX('B', 7, ANALOG)>, /* FMC_NL */<STM32_PINMUX('D', 14, ANALOG)>, /* FMC_D0 */<STM32_PINMUX('D', 15, ANALOG)>, /* FMC_D1 */<STM32_PINMUX('D', 0, ANALOG)>, /* FMC_D2 */<STM32_PINMUX('D', 1, ANALOG)>, /* FMC_D3 */<STM32_PINMUX('E', 7, ANALOG)>, /* FMC_D4 */<STM32_PINMUX('E', 8, ANALOG)>, /* FMC_D5 */<STM32_PINMUX('E', 9, ANALOG)>, /* FMC_D6 */<STM32_PINMUX('E', 10, ANALOG)>, /* FMC_D7 */<STM32_PINMUX('E', 11, ANALOG)>, /* FMC_D8 */<STM32_PINMUX('E', 12, ANALOG)>, /* FMC_D9 */<STM32_PINMUX('E', 13, ANALOG)>, /* FMC_D10 */<STM32_PINMUX('E', 14, ANALOG)>, /* FMC_D11 */<STM32_PINMUX('E', 15, ANALOG)>, /* FMC_D12 */<STM32_PINMUX('D', 8, ANALOG)>, /* FMC_D13 */<STM32_PINMUX('D', 9, ANALOG)>, /* FMC_D14 */<STM32_PINMUX('D', 10, ANALOG)>, /* FMC_D15 */<STM32_PINMUX('G', 9, ANALOG)>, /* FMC_NE2_FMC_NCE */<STM32_PINMUX('G', 12, ANALOG)>; /* FMC_NE4 */};- };
+};
&pmic { u-boot,dm-pre-reloc; }; diff --git a/board/dhelectronics/dh_stm32mp1/board.c b/board/dhelectronics/dh_stm32mp1/board.c index b663696983..be55242799 100644 --- a/board/dhelectronics/dh_stm32mp1/board.c +++ b/board/dhelectronics/dh_stm32mp1/board.c @@ -376,6 +376,32 @@ static void sysconf_init(void) #endif }
+static void board_init_fmc2(void) +{ +#define STM32_FMC2_BCR1 0x0 +#define STM32_FMC2_BTR1 0x4 +#define STM32_FMC2_BWTR1 0x104 +#define STM32_FMC2_BCR(x) ((x) * 0x8 + STM32_FMC2_BCR1) +#define STM32_FMC2_BTR(x) ((x) * 0x8 + STM32_FMC2_BTR1) +#define STM32_FMC2_BWTR(x) ((x) * 0x8 + STM32_FMC2_BWTR1)
All these defines can be put in ./arch/arm/mach-stm32mp/include/mach/stm32.h
+#define RCC_MP_AHB6RSTCLRR 0x218 +#define RCC_MP_AHB6ENSETR 0x19c
- /* Set up FMC2 bus for KS8851-16MLL and X11 SRAM */
- writel(BIT(12), STM32_RCC_BASE + RCC_MP_AHB6RSTCLRR);
- writel(BIT(12), STM32_RCC_BASE + RCC_MP_AHB6ENSETR);
Add a define for AHB6RSTCLRR and AHB6ENSETR BIT(12)
- /* KS8851-16MLL */
- writel(0x000010db, STM32_FMC2_BASE + STM32_FMC2_BCR(1));
- writel(0xc0022222, STM32_FMC2_BASE + STM32_FMC2_BTR(1));
- /* AS7C34098 SRAM on X11 */
- writel(0x000010db, STM32_FMC2_BASE + STM32_FMC2_BCR(3));
- writel(0xc0022222, STM32_FMC2_BASE + STM32_FMC2_BTR(3));
Avoid to put hardcoded value, it difficult to see what is done, add defines.
- setbits_le32(STM32_FMC2_BASE + STM32_FMC2_BCR1, BIT(31));
Add a define for FMC2_BCR1 BIT(31) , it will be easier to understand what is done
thanks
Patrice
+}
/* board dependent setup after realloc */ int board_init(void) { @@ -399,6 +425,8 @@ int board_init(void)
sysconf_init();
- board_init_fmc2();
- if (CONFIG_IS_ENABLED(CONFIG_LED)) led_default_state();
diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig index 921dea242a..683f15e7d5 100644 --- a/configs/stm32mp15_dhcom_basic_defconfig +++ b/configs/stm32mp15_dhcom_basic_defconfig @@ -93,6 +93,7 @@ CONFIG_SPI_FLASH_MTD=y CONFIG_SPL_SPI_FLASH_MTD=y CONFIG_DM_ETH=y CONFIG_DWC_ETH_QOS=y +CONFIG_KS8851_MLL=y CONFIG_PHY=y CONFIG_PHY_STM32_USBPHYC=y CONFIG_PINCONF=y
On 3/27/20 9:55 AM, Patrice CHOTARD wrote:
Hi Marek
Hi,
[...]
diff --git a/board/dhelectronics/dh_stm32mp1/board.c b/board/dhelectronics/dh_stm32mp1/board.c index b663696983..be55242799 100644 --- a/board/dhelectronics/dh_stm32mp1/board.c +++ b/board/dhelectronics/dh_stm32mp1/board.c @@ -376,6 +376,32 @@ static void sysconf_init(void) #endif }
+static void board_init_fmc2(void) +{ +#define STM32_FMC2_BCR1 0x0 +#define STM32_FMC2_BTR1 0x4 +#define STM32_FMC2_BWTR1 0x104 +#define STM32_FMC2_BCR(x) ((x) * 0x8 + STM32_FMC2_BCR1) +#define STM32_FMC2_BTR(x) ((x) * 0x8 + STM32_FMC2_BTR1) +#define STM32_FMC2_BWTR(x) ((x) * 0x8 + STM32_FMC2_BWTR1)
All these defines can be put in ./arch/arm/mach-stm32mp/include/mach/stm32.h
No, we need a driver for FMC2, that's where they should go. This is a stopgap solution.
+#define RCC_MP_AHB6RSTCLRR 0x218 +#define RCC_MP_AHB6ENSETR 0x19c
- /* Set up FMC2 bus for KS8851-16MLL and X11 SRAM */
- writel(BIT(12), STM32_RCC_BASE + RCC_MP_AHB6RSTCLRR);
- writel(BIT(12), STM32_RCC_BASE + RCC_MP_AHB6ENSETR);
Add a define for AHB6RSTCLRR and AHB6ENSETR BIT(12)
Maybe you should fix board/stm32mp1 and arch/arm/mach-stm32mp to do the same ? :)
- /* KS8851-16MLL */
- writel(0x000010db, STM32_FMC2_BASE + STM32_FMC2_BCR(1));
- writel(0xc0022222, STM32_FMC2_BASE + STM32_FMC2_BTR(1));
- /* AS7C34098 SRAM on X11 */
- writel(0x000010db, STM32_FMC2_BASE + STM32_FMC2_BCR(3));
- writel(0xc0022222, STM32_FMC2_BASE + STM32_FMC2_BTR(3));
Avoid to put hardcoded value, it difficult to see what is done, add defines.
- setbits_le32(STM32_FMC2_BASE + STM32_FMC2_BCR1, BIT(31));
Add a define for FMC2_BCR1 BIT(31) , it will be easier to understand what is done
OK
Hi Marek,
From: Marek Vasut marex@denx.de Sent: jeudi 26 mars 2020 16:58
Add DT entries, Kconfig entries and board-specific entries to configure FMC2 bus and make KS8851-16MLL on that bus accessible to U-Boot.
Signed-off-by: Marek Vasut marex@denx.de Cc: Patrick Delaunay patrick.delaunay@st.com Cc: Patrice Chotard patrice.chotard@st.com
V2: Configure FMC2 nCS4 for SRAM as well V3: Adjust the register macros
arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi | 68 ++++++++++++++++++++++ board/dhelectronics/dh_stm32mp1/board.c | 28 +++++++++ configs/stm32mp15_dhcom_basic_defconfig | 1 + 3 files changed, 97 insertions(+)
diff --git a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi index 6c952a57ee..eba3588540 100644 --- a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi +++ b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi @@ -37,6 +37,12 @@ default-state = "on"; }; };
- /* This is actually on FMC2, but we do not have bus driver for that */
- ksz8851: ks8851mll@64000000 {
compatible = "micrel,ks8851-mll";reg = <0x64000000 0x20000>;- };
};
&i2c4 { @@ -50,6 +56,68 @@ }; };
+&pinctrl {
- /* These should bound to FMC2 bus driver, but we do not have one */
As temporarily solution (waiting final solution and real FMC2 bus driver) can you define a NO_OP in board device associated to existing compatible = "st,stm32mp15-fmc2"
- pinctrl-0 = <&fmc_pins_b>;
- pinctrl-1 = <&fmc_sleep_pins_b>;
- pinctrl-names = "default", "sleep";
- fmc_pins_b: fmc-0 {
pins1 {
[...]
};- };
- fmc_sleep_pins_b: fmc-sleep-0 {
pins {
[...]
};- };
+};
&pmic { u-boot,dm-pre-reloc; };
For example
&fmc { pinctrl-names = "default", "sleep"; pinctrl-0 = <& fmc_pins_b>; pinctrl-1 = <& fmc_sleep_pins_b>; status = "okay"; #address-cells = <1>; #size-cells = <0>; };
static const struct udevice_id stm32_fmc2_bus_ids[] = { {.compatible = "st,stm32mp15-fmc2}, { } };
U_BOOT_DRIVER(stm32_fmc2_bus) = { .name = "stm32mp15-fmc2-ids", .id = UCLASS_NOP, .of_match = stm32_fmc2_bus_ids, .bind = stm32_fmc2_bus, };
diff --git a/board/dhelectronics/dh_stm32mp1/board.c b/board/dhelectronics/dh_stm32mp1/board.c index b663696983..be55242799 100644 --- a/board/dhelectronics/dh_stm32mp1/board.c +++ b/board/dhelectronics/dh_stm32mp1/board.c @@ -376,6 +376,32 @@ static void sysconf_init(void) #endif }
+static void board_init_fmc2(void) +{
Can you use device-tree information (to avoid hardcoded address STM32_FMC2_BASE).
For me, the address should be used only when the information are not available in device tree or before the device tree availability (in pre-reloc phasis)
ofnode = ofnode_by_compatible(ofnode_null(), "st,stm32mp15-fmc2"); fmc2_addr = ofnode_get_addr(node);
or use NOP device as proposed previously.
PS: it is a preliminary step/temporarily solution, waiting FMC2 the bus driver availability.
+#define STM32_FMC2_BCR1 0x0 +#define STM32_FMC2_BTR1 0x4 +#define STM32_FMC2_BWTR1 0x104 +#define STM32_FMC2_BCR(x) ((x) * 0x8 + STM32_FMC2_BCR1) +#define STM32_FMC2_BTR(x) ((x) * 0x8 + STM32_FMC2_BTR1) +#define STM32_FMC2_BWTR(x) ((x) * 0x8 + STM32_FMC2_BWTR1)
+#define RCC_MP_AHB6RSTCLRR 0x218 +#define RCC_MP_AHB6ENSETR 0x19c
- /* Set up FMC2 bus for KS8851-16MLL and X11 SRAM */
- writel(BIT(12), STM32_RCC_BASE + RCC_MP_AHB6RSTCLRR);
- writel(BIT(12), STM32_RCC_BASE + RCC_MP_AHB6ENSETR);
Use clk and reset driver model and DT, for example:
struct clk clk; struct reset_ctl reset;
clk_get_by_index_nodev(ofnode, 0, &clk ; clk_get_by_index_nodev(ofnode, 0, &reset);
- /* KS8851-16MLL */
- writel(0x000010db, STM32_FMC2_BASE + STM32_FMC2_BCR(1));
- writel(0xc0022222, STM32_FMC2_BASE + STM32_FMC2_BTR(1));
- /* AS7C34098 SRAM on X11 */
- writel(0x000010db, STM32_FMC2_BASE + STM32_FMC2_BCR(3));
- writel(0xc0022222, STM32_FMC2_BASE + STM32_FMC2_BTR(3));
- setbits_le32(STM32_FMC2_BASE + STM32_FMC2_BCR1, BIT(31)); }
/* board dependent setup after realloc */ int board_init(void) { @@ -399,6 +425,8 @@ int board_init(void)
sysconf_init();
- board_init_fmc2();
- if (CONFIG_IS_ENABLED(CONFIG_LED)) led_default_state();
diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig index 921dea242a..683f15e7d5 100644 --- a/configs/stm32mp15_dhcom_basic_defconfig +++ b/configs/stm32mp15_dhcom_basic_defconfig @@ -93,6 +93,7 @@ CONFIG_SPI_FLASH_MTD=y CONFIG_SPL_SPI_FLASH_MTD=y CONFIG_DM_ETH=y CONFIG_DWC_ETH_QOS=y +CONFIG_KS8851_MLL=y CONFIG_PHY=y CONFIG_PHY_STM32_USBPHYC=y CONFIG_PINCONF=y -- 2.25.1
Regards
Patrick
On 4/1/20 3:30 PM, Patrick DELAUNAY wrote:
Hi Marek,
Hi,
[...]
+&pinctrl {
- /* These should bound to FMC2 bus driver, but we do not have one */
As temporarily solution (waiting final solution and real FMC2 bus driver) can you define a NO_OP in board device associated to existing compatible = "st,stm32mp15-fmc2"
NO_OP ?
- pinctrl-0 = <&fmc_pins_b>;
- pinctrl-1 = <&fmc_sleep_pins_b>;
- pinctrl-names = "default", "sleep";
- fmc_pins_b: fmc-0 {
pins1 {[...]
};- };
- fmc_sleep_pins_b: fmc-sleep-0 {
pins {[...]
};- };
+};
&pmic { u-boot,dm-pre-reloc; };
For example
&fmc { pinctrl-names = "default", "sleep"; pinctrl-0 = <& fmc_pins_b>; pinctrl-1 = <& fmc_sleep_pins_b>; status = "okay"; #address-cells = <1>; #size-cells = <0>; };
static const struct udevice_id stm32_fmc2_bus_ids[] = { {.compatible = "st,stm32mp15-fmc2}, { } };
U_BOOT_DRIVER(stm32_fmc2_bus) = { .name = "stm32mp15-fmc2-ids", .id = UCLASS_NOP, .of_match = stm32_fmc2_bus_ids, .bind = stm32_fmc2_bus, };
That looks like a hack, it would collide with the actual FMC2 driver and it seems the FMC2 DT compatible string is not even stable yet (cfr the Linux patches). So I am reluctant to do anything like depending on the FMC DT bindings thus far.
diff --git a/board/dhelectronics/dh_stm32mp1/board.c b/board/dhelectronics/dh_stm32mp1/board.c index b663696983..be55242799 100644 --- a/board/dhelectronics/dh_stm32mp1/board.c +++ b/board/dhelectronics/dh_stm32mp1/board.c @@ -376,6 +376,32 @@ static void sysconf_init(void) #endif }
+static void board_init_fmc2(void) +{
Can you use device-tree information (to avoid hardcoded address STM32_FMC2_BASE).
For me, the address should be used only when the information are not available in device tree or before the device tree availability (in pre-reloc phasis)
ofnode = ofnode_by_compatible(ofnode_null(), "st,stm32mp15-fmc2"); fmc2_addr = ofnode_get_addr(node);
or use NOP device as proposed previously.
PS: it is a preliminary step/temporarily solution, waiting FMC2 the bus driver availability.
Or, I can just use the address directly, which means no DT traversal, so simpler code and faster boot time.
+#define STM32_FMC2_BCR1 0x0 +#define STM32_FMC2_BTR1 0x4 +#define STM32_FMC2_BWTR1 0x104 +#define STM32_FMC2_BCR(x) ((x) * 0x8 + STM32_FMC2_BCR1) +#define STM32_FMC2_BTR(x) ((x) * 0x8 + STM32_FMC2_BTR1) +#define STM32_FMC2_BWTR(x) ((x) * 0x8 + STM32_FMC2_BWTR1)
+#define RCC_MP_AHB6RSTCLRR 0x218 +#define RCC_MP_AHB6ENSETR 0x19c
- /* Set up FMC2 bus for KS8851-16MLL and X11 SRAM */
- writel(BIT(12), STM32_RCC_BASE + RCC_MP_AHB6RSTCLRR);
- writel(BIT(12), STM32_RCC_BASE + RCC_MP_AHB6ENSETR);
Use clk and reset driver model and DT, for example:
struct clk clk; struct reset_ctl reset;
clk_get_by_index_nodev(ofnode, 0, &clk ; clk_get_by_index_nodev(ofnode, 0, &reset);
This very much looks like I can just write the entire bus driver by now, instead of just writing these few registers in a real simple way, until the bus driver exists.
But since the bindings aren't stable, I am not very inclined to do that.
[...]
Dear Marek,
From: Marek Vasut marex@denx.de Sent: jeudi 9 avril 2020 13:27
On 4/1/20 3:30 PM, Patrick DELAUNAY wrote:
Hi Marek,
Hi,
[...]
+&pinctrl {
- /* These should bound to FMC2 bus driver, but we do not have one */
As temporarily solution (waiting final solution and real FMC2 bus driver) can you define a NO_OP in board device associated to existing compatible = "st,stm32mp15-fmc2"
NO_OP ?
Sorry, UCLASS_NOP
After debate with Christophe, I agree that i sis other complicated for temporarily solution.
- pinctrl-0 = <&fmc_pins_b>;
- pinctrl-1 = <&fmc_sleep_pins_b>;
- pinctrl-names = "default", "sleep";
- fmc_pins_b: fmc-0 {
pins1 {[...]
};- };
- fmc_sleep_pins_b: fmc-sleep-0 {
pins {[...]
};- };
+};
&pmic { u-boot,dm-pre-reloc; };
For example
&fmc { pinctrl-names = "default", "sleep"; pinctrl-0 = <& fmc_pins_b>; pinctrl-1 = <& fmc_sleep_pins_b>; status = "okay"; #address-cells = <1>; #size-cells = <0>; };
static const struct udevice_id stm32_fmc2_bus_ids[] = { {.compatible = "st,stm32mp15-fmc2}, { } };
U_BOOT_DRIVER(stm32_fmc2_bus) = { .name = "stm32mp15-fmc2-ids", .id = UCLASS_NOP, .of_match = stm32_fmc2_bus_ids, .bind = stm32_fmc2_bus, };
That looks like a hack, it would collide with the actual FMC2 driver and it seems the FMC2 DT compatible string is not even stable yet (cfr the Linux patches). So I am reluctant to do anything like depending on the FMC DT bindings thus far.
You are aligned with Christophe, he push me to accept your temporarily solution.
[...]
Use clk and reset driver model and DT, for example:
struct clk clk; struct reset_ctl reset;
clk_get_by_index_nodev(ofnode, 0, &clk ; clk_get_by_index_nodev(ofnode, 0, &reset);
This very much looks like I can just write the entire bus driver by now, instead of just writing these few registers in a real simple way, until the bus driver exists.
But since the bindings aren't stable, I am not very inclined to do that.
I am convinced now (thanks to Christophe) to keep it simple as it is a temporarily solution.
Reviewed-by: Patrick Delaunay patrick.delaunay@st.com
Thanks
Patrick
[...]
On 4/9/20 7:38 PM, Patrick DELAUNAY wrote: Hi,
[...]
That looks like a hack, it would collide with the actual FMC2 driver and it seems the FMC2 DT compatible string is not even stable yet (cfr the Linux patches). So I am reluctant to do anything like depending on the FMC DT bindings thus far.
You are aligned with Christophe, he push me to accept your temporarily solution.
Great, thanks.
I had a look into writing the bus driver in the meantime, but it's not as simple as I originally anticipated. So, I'll wait until the Linux DT bindings stabilize and revisit it then.
Thanks
On 4/10/20 8:11 PM, Marek Vasut wrote:
On 4/9/20 7:38 PM, Patrick DELAUNAY wrote: Hi,
[...]
That looks like a hack, it would collide with the actual FMC2 driver and it seems the FMC2 DT compatible string is not even stable yet (cfr the Linux patches). So I am reluctant to do anything like depending on the FMC DT bindings thus far.
You are aligned with Christophe, he push me to accept your temporarily solution.
Great, thanks.
I had a look into writing the bus driver in the meantime, but it's not as simple as I originally anticipated. So, I'll wait until the Linux DT bindings stabilize and revisit it then.
Thanks
Hi Marek,
I have already prepared a set of patches to add the full FMC2 support in U-Boot based on kernel drivers. I am currently waiting for the bindings and the drivers being reviewed on kernel side.
Regards, Christophe Kerello.
On 4/14/20 9:23 AM, Christophe Kerello wrote:
On 4/10/20 8:11 PM, Marek Vasut wrote:
On 4/9/20 7:38 PM, Patrick DELAUNAY wrote: Hi,
[...]
That looks like a hack, it would collide with the actual FMC2 driver and it seems the FMC2 DT compatible string is not even stable yet (cfr the Linux patches). So I am reluctant to do anything like depending on the FMC DT bindings thus far.
You are aligned with Christophe, he push me to accept your temporarily solution.
Great, thanks.
I had a look into writing the bus driver in the meantime, but it's not as simple as I originally anticipated. So, I'll wait until the Linux DT bindings stabilize and revisit it then.
Thanks
Hi Marek,
I have already prepared a set of patches to add the full FMC2 support in U-Boot based on kernel drivers. I am currently waiting for the bindings and the drivers being reviewed on kernel side.
Great, thanks.
I'll switch to that one once it's upstream, but I don't see a reason to block this patch until then.
On 4/14/20 1:56 PM, Marek Vasut wrote:
On 4/14/20 9:23 AM, Christophe Kerello wrote:
On 4/10/20 8:11 PM, Marek Vasut wrote:
On 4/9/20 7:38 PM, Patrick DELAUNAY wrote: Hi,
[...]
That looks like a hack, it would collide with the actual FMC2 driver and it seems the FMC2 DT compatible string is not even stable yet (cfr the Linux patches). So I am reluctant to do anything like depending on the FMC DT bindings thus far.
You are aligned with Christophe, he push me to accept your temporarily solution.
Great, thanks.
I had a look into writing the bus driver in the meantime, but it's not as simple as I originally anticipated. So, I'll wait until the Linux DT bindings stabilize and revisit it then.
Thanks
Hi Marek,
I have already prepared a set of patches to add the full FMC2 support in U-Boot based on kernel drivers. I am currently waiting for the bindings and the drivers being reviewed on kernel side.
Great, thanks.
I'll switch to that one once it's upstream, but I don't see a reason to block this patch until then.
Hi Marek,
Yes, we are aligned. We are not going to block this patch.
Regards, Christophe Kerello.
On 4/14/20 2:16 PM, Christophe Kerello wrote:
On 4/14/20 1:56 PM, Marek Vasut wrote:
On 4/14/20 9:23 AM, Christophe Kerello wrote:
On 4/10/20 8:11 PM, Marek Vasut wrote:
On 4/9/20 7:38 PM, Patrick DELAUNAY wrote: Hi,
[...]
That looks like a hack, it would collide with the actual FMC2 driver and it seems the FMC2 DT compatible string is not even stable yet (cfr the Linux patches). So I am reluctant to do anything like depending on the FMC DT bindings thus far.
You are aligned with Christophe, he push me to accept your temporarily solution.
Great, thanks.
I had a look into writing the bus driver in the meantime, but it's not as simple as I originally anticipated. So, I'll wait until the Linux DT bindings stabilize and revisit it then.
Thanks
Hi Marek,
I have already prepared a set of patches to add the full FMC2 support in U-Boot based on kernel drivers. I am currently waiting for the bindings and the drivers being reviewed on kernel side.
Great, thanks.
I'll switch to that one once it's upstream, but I don't see a reason to block this patch until then.
Hi Marek,
Yes, we are aligned. We are not going to block this patch.
Great, thanks.
participants (4)
-
Christophe Kerello -
Marek Vasut -
Patrice CHOTARD -
Patrick DELAUNAY