[PATCH 0/2] Currently it is possible to select the P2SB driver without selecting the
P2SB uclass, which can't work. Fix this by adding a "depends on" in Kconfig.
While at it, correct the meaning of P2SB (according to Intel's documentation P2SB stands for "Primary to Sideband Bridge").
Wolfgang Wallner (2): drivers: p2sb: replace Primary-to-Sideband Bus with Primary to Sideband Bridge x86: p2sb: make P2SB driver depend on P2SB uclass
arch/x86/Kconfig | 1 + drivers/misc/Kconfig | 8 ++++---- 2 files changed, 5 insertions(+), 4 deletions(-)
In Intel's documentation the term P2SB stands for "Primary to Sideband Bridge".
Signed-off-by: Wolfgang Wallner wolfgang.wallner@br-automation.com ---
drivers/misc/Kconfig | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 6bb5bc77e9..b6b8510e40 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -243,10 +243,10 @@ config NUVOTON_NCT6102D in the Nuvoton Super IO chips on X86 platforms.
config P2SB - bool "Intel Primary-to-Sideband Bus" + bool "Intel Primary to Sideband Bridge" depends on X86 || SANDBOX help - This enables support for the Intel Primary-to-Sideband bus, + This enables support for the Intel Primary to Sideband Bridge, abbreviated to P2SB. The P2SB is used to access various peripherals such as eSPI, GPIO, through memory-mapped I/O in a large chunk of PCI space. The space is segmented into different channels and peripherals @@ -259,7 +259,7 @@ config SPL_P2SB bool "Intel Primary-to-Sideband Bus in SPL" depends on SPL && (X86 || SANDBOX) help - The Primary-to-Sideband bus is used to access various peripherals + The Primary to Sideband Bridge is used to access various peripherals through memory-mapped I/O in a large chunk of PCI space. The space is segmented into different channels and peripherals are accessed by device-specific means within those channels. Devices should be added @@ -269,7 +269,7 @@ config TPL_P2SB bool "Intel Primary-to-Sideband Bus in TPL" depends on TPL && (X86 || SANDBOX) help - The Primary-to-Sideband bus is used to access various peripherals + The Primary to Sideband Bridge is used to access various peripherals through memory-mapped I/O in a large chunk of PCI space. The space is segmented into different channels and peripherals are accessed by device-specific means within those channels. Devices should be added
On Wed, 1 Jul 2020 at 03:00, Wolfgang Wallner wolfgang.wallner@br-automation.com wrote:
In Intel's documentation the term P2SB stands for "Primary to Sideband Bridge".
Signed-off-by: Wolfgang Wallner wolfgang.wallner@br-automation.com
drivers/misc/Kconfig | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)
Reviewed-by: Simon Glass sjg@chromium.org
Currently it is possible to select the P2SB driver without selecting the P2SB uclass, which can't work. Fix this by adding a "depends on" in Kconfig.
Signed-off-by: Wolfgang Wallner wolfgang.wallner@br-automation.com
---
arch/x86/Kconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index c8eae24c07..27295ef384 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -717,6 +717,7 @@ config HAVE_ITSS
config HAVE_P2SB bool "Enable P2SB" + depends on P2SB help Select this to include the driver for the Primary to Sideband Bridge (P2SB) which is found on several Intel
participants (2)
-
Simon Glass -
Wolfgang Wallner