I have an issue with i2c-1 bus speed not being calculated correctly on MPC8377.

arch/powerpc/cpu/mpc83xx/speed.c lines 320+ are :

#if defined(CONFIG_MPC834x) i2c1_clk = tsec2_clk; #elif defined(CONFIG_MPC8360) i2c1_clk = csb_clk; #elif defined(CONFIG_MPC832x) i2c1_clk = enc_clk; #elif defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) i2c1_clk = enc_clk; #elif defined(CONFIG_FSL_ESDHC) i2c1_clk = sdhc_clk; #endif

I don't have CONFIG_FSL_ESDHC set ... we're running SPI. i2c1_clk doesn't get set.

According to the manual the i2c-1 clock source is somewhat ambiguous (MPC8379RM p.211) :

a. I2C1 clock is tied to SDHCCM b. I2C1 clock is tied to ENCCM

I have CSB=333MHz and ENCCM=3 resulting in 111MHz i2c1 clock.

Would it be appropriate to add

#elif defined(CONFIG_MPC837x) i2c1_clk = enc_clk;

before the final #endif ?

BTW: Does anybody know which clock setting (SDHCCM or ENCCM) has priority ?