Use a default RCW of protocol 0x66. A PBI configure file which uses CPC as 256KB SRAM. It can be used by PBL tool on T1040 to build a pbl boot image.

Signed-off-by: Prabhakar Kushwaha prabhakar@freescale.com --- Based upon git://git.denx.de/u-boot-mpc85xx.git branch next

board/freescale/t1040qds/t1040_pbi.cfg | 27 +++++++++++++++++++++++++++ board/freescale/t1040qds/t1040_rcw.cfg | 7 +++++++ include/configs/T1040QDS.h | 2 ++ 3 files changed, 36 insertions(+) create mode 100644 board/freescale/t1040qds/t1040_pbi.cfg create mode 100644 board/freescale/t1040qds/t1040_rcw.cfg

diff --git a/board/freescale/t1040qds/t1040_pbi.cfg b/board/freescale/t1040qds/t1040_pbi.cfg new file mode 100644 index 0000000..624398a --- /dev/null +++ b/board/freescale/t1040qds/t1040_pbi.cfg @@ -0,0 +1,27 @@ +#PBI commands +#Initialize CPC1 +09010000 00200400 +09138000 00000000 +091380c0 00000100 +#Configure CPC1 as 512KB SRAM +09010100 00000000 +09010104 fffc0007 +09010f00 08000000 +09010000 80000000 +#Configure LAW for CPC1 +09000cf0 00000000 +09000cf4 fffc0000 +09000cf8 81000011 +#Configure alternate space +09000010 00000000 +09000014 ff000000 +09000018 81000000 +#Configure SPI controller +09110000 80000403 +09110020 2d170008 +09110024 00100008 +09110028 00100008 +0911002c 00100008 +#Flush PBL data +09138000 00000000 +091380c0 00000000 diff --git a/board/freescale/t1040qds/t1040_rcw.cfg b/board/freescale/t1040qds/t1040_rcw.cfg new file mode 100644 index 0000000..0d0dfa5 --- /dev/null +++ b/board/freescale/t1040qds/t1040_rcw.cfg @@ -0,0 +1,7 @@ +#PBL preamble and RCW header +aa55aa55 010e0100 +# serdes protocol 0x66 +0a10000c 0c000000 00000000 00000000 +66000002 00000000 fc027000 01000000 +00000000 00000000 00000000 00030810 +00000000 03fc500f 00000000 00000000 diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index 2738242..7c6bec8 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -32,6 +32,8 @@ #ifdef CONFIG_RAMBOOT_PBL #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc +#define CONFIG_PBLPBI_CONFIG $(SRCTREE)/board/freescale/t1040qds/t1040_pbi.cfg +#define CONFIG_PBLRCW_CONFIG $(SRCTREE)/board/freescale/t1040qds/t1040_rcw.cfg #endif

/* High Level Configuration Options */