[PATCH v5 00/21] Fixes for Rockchip NFC driver part 1

This serie contains fixes for the Rockchip NFC driver, which was ported to U-boot and merged with little review and testing it seems. Part 1 aims at passing the probe function without errors. Extended with tree wide function cleanup needed for 64bit DT parsing.
Fixed are: 64bit FDT parsing compatible string removal add missing layout structure add missing flash_node pointer add missing chip ID
Changed V5: sort patch order add more fixes with pointer functions add debug text fixes test with binman for ARM only due to limited resources
Changed V4: fix cast and divider in syscon-uclass.c
Changed V3: use dev_read_addr_ptr fix oobfree
TODO: Time consuming binman test for other SoC types then ARM. Help with testing appreciated.
Johan Jonker (20): mtd: nand: raw: rockchip_nfc: use dev_read_addr_ptr mtd: nand: raw: rockchip_nfc: remove the compatible string "rockchip,rk3308-nfc" mtd: nand: raw: rockchip_nfc: add layout structure mtd: nand: raw: rockchip_nfc: add flash_node to chip structure mtd: nand: raw: rockchip_nfc: fix oobfree offset and description rockchip: adc: rockchip-saradc: use dev_read_addr_ptr rockchip: timer: dw-apb-timer: convert dev_read_addr output to phys_addr_t include: dm: ofnode: fix headers core: remap: convert regmap_init_mem_plat() input to phys_addr_t core: fdtaddr: add devfdt_get_addr_size_index_ptr function core: read: add dev_read_addr_index_ptr function spi: spi-aspeed-smc: use devfdt_get_addr_index_ptr drivers: use dev_read_addr_index_ptr when cast to pointer drivers: use dev_read_addr_ptr when cast to pointer drivers: use devfdt_get_addr_size_index_ptr when cast to pointer drivers: use devfdt_get_addr_index_ptr when cast to pointer drivers: use devfdt_get_addr_ptr when cast to pointer drivers: fix debug string with fdt_addr_t input arm: stm32mp: spl: fix function with fdt_addr_t input include: fdtdec: decouple fdt_addr_t and phys_addr_t size
Paweł Jarosz (1): mtd: nand: add support for the Sandisk SDTNQGAMA chip
Kconfig | 8 ++ arch/arm/mach-mvebu/cpu.c | 2 +- arch/arm/mach-mvebu/system-controller.c | 4 +- arch/arm/mach-stm32mp/spl.c | 6 +- doc/develop/driver-model/livetree.rst | 4 +- drivers/adc/rockchip-saradc.c | 4 +- drivers/ata/dwc_ahsata.c | 2 +- drivers/cache/cache-l2x0.c | 2 +- drivers/cache/cache-v5l2.c | 2 +- drivers/clk/at91/sama7g5.c | 2 +- drivers/clk/at91/sckc.c | 2 +- drivers/clk/clk-hsdk-cgu.c | 4 +- drivers/clk/ti/clk-ctrl.c | 9 ++- drivers/core/fdtaddr.c | 8 ++ drivers/core/read.c | 7 ++ drivers/core/regmap.c | 2 +- drivers/core/syscon-uclass.c | 4 +- drivers/ddr/altera/sdram_gen5.c | 2 +- drivers/gpio/mscc_sgpio.c | 2 +- drivers/gpio/tegra_gpio.c | 4 +- drivers/gpio/xilinx_gpio.c | 2 +- drivers/i2c/i2c-cdns.c | 2 +- drivers/i2c/tegra_i2c.c | 4 +- drivers/mmc/am654_sdhci.c | 2 +- drivers/mmc/davinci_mmc.c | 2 +- drivers/mmc/piton_mmc.c | 2 +- drivers/mmc/tegra_mmc.c | 2 +- drivers/mmc/xenon_sdhci.c | 2 +- drivers/mmc/zynq_sdhci.c | 6 +- drivers/mtd/nand/raw/arasan_nfc.c | 2 +- drivers/mtd/nand/raw/cortina_nand.c | 6 +- drivers/mtd/nand/raw/mxic_nand.c | 2 +- drivers/mtd/nand/raw/nand_ids.c | 3 + drivers/mtd/nand/raw/rockchip_nfc.c | 78 +++++++------------ drivers/mtd/nand/raw/tegra_nand.c | 2 +- drivers/mtd/nand/raw/zynq_nand.c | 2 +- drivers/net/dm9000x.c | 2 +- drivers/net/dwmac_meson8b.c | 4 +- drivers/net/mvmdio.c | 2 +- drivers/net/mvpp2.c | 24 +++--- drivers/net/qe/dm_qe_uec_phy.c | 2 +- drivers/pci/pci-aardvark.c | 4 +- drivers/pci/pcie_dw_meson.c | 4 +- drivers/pci/pcie_dw_mvebu.c | 10 +-- drivers/pci/pcie_dw_rockchip.c | 4 +- drivers/pci/pcie_imx.c | 4 +- drivers/pci/pcie_layerscape_ep.c | 4 +- drivers/phy/allwinner/phy-sun50i-usb3.c | 6 +- drivers/phy/marvell/comphy_core.c | 12 +-- drivers/phy/phy-stm32-usbphyc.c | 4 +- drivers/phy/qcom/phy-qcom-usb-hs-28nm.c | 4 +- drivers/phy/qcom/phy-qcom-usb-ss.c | 4 +- .../phy/rockchip/phy-rockchip-snps-pcie3.c | 4 +- drivers/phy/rockchip/phy-rockchip-typec.c | 6 +- drivers/pwm/tegra_pwm.c | 2 +- drivers/ram/rockchip/sdram_rk3066.c | 2 +- drivers/ram/rockchip/sdram_rk3188.c | 2 +- drivers/ram/rockchip/sdram_rk322x.c | 2 +- drivers/ram/rockchip/sdram_rk3288.c | 2 +- drivers/ram/rockchip/sdram_rk3328.c | 2 +- drivers/ram/rockchip/sdram_rk3399.c | 2 +- drivers/serial/serial_zynq.c | 6 +- drivers/spi/cadence_qspi.c | 5 +- drivers/spi/mpc8xxx_spi.c | 2 +- drivers/spi/mscc_bb_spi.c | 2 +- drivers/spi/mtk_snor.c | 2 +- drivers/spi/mtk_spim.c | 2 +- drivers/spi/sh_qspi.c | 2 +- drivers/spi/spi-aspeed-smc.c | 13 ++-- drivers/spi/spi-mxic.c | 2 +- drivers/spi/xilinx_spi.c | 2 +- drivers/timer/dw-apb-timer.c | 4 +- drivers/ufs/ufs.c | 2 +- drivers/usb/host/ehci-tegra.c | 2 +- drivers/usb/musb-new/ti-musb.c | 2 +- drivers/video/dw_mipi_dsi.c | 4 +- drivers/video/rockchip/rk_vop.c | 2 +- drivers/video/stm32/stm32_dsi.c | 4 +- drivers/video/stm32/stm32_ltdc.c | 4 +- drivers/video/tegra124/display.c | 2 +- drivers/video/tegra124/sor.c | 6 +- drivers/video/ti/tilcdc.c | 4 +- drivers/watchdog/cdns_wdt.c | 6 +- drivers/watchdog/sbsa_gwdt.c | 12 +-- drivers/watchdog/sp805_wdt.c | 6 +- drivers/watchdog/xilinx_tb_wdt.c | 6 +- include/dm/fdtaddr.h | 17 +++- include/dm/ofnode.h | 16 ++-- include/fdtdec.h | 13 +++- include/regmap.h | 2 +- include/syscon.h | 13 ++-- 91 files changed, 252 insertions(+), 230 deletions(-)
-- 2.20.1

The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU can expext 64-bit data from the device tree parser, so use dev_read_addr_ptr in the rockchip_nfc.c file.
Signed-off-by: Johan Jonker jbx6244@gmail.com Reviewed-by: Michael Trimarchi michael@amarulasolutions.com --- drivers/mtd/nand/raw/rockchip_nfc.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/mtd/nand/raw/rockchip_nfc.c b/drivers/mtd/nand/raw/rockchip_nfc.c index d016d255..5d444133 100644 --- a/drivers/mtd/nand/raw/rockchip_nfc.c +++ b/drivers/mtd/nand/raw/rockchip_nfc.c @@ -1180,9 +1180,9 @@ static int rk_nfc_probe(struct udevice *dev) nfc->cfg = (void *)dev_get_driver_data(dev); nfc->dev = dev;
- nfc->regs = (void *)dev_read_addr(dev); - if (IS_ERR(nfc->regs)) { - ret = PTR_ERR(nfc->regs); + nfc->regs = dev_read_addr_ptr(dev); + if (!nfc->regs) { + ret = -ENODATA; goto release_nfc; }
-- 2.20.1

The compatible string for rk3308 has as fallback string "rockchip,rv1108-nfc". As there is no logic in probe priority between the SoC orientated string and the fall back, so remove the compatible string "rockchip,rk3308-nfc" from the driver.
Signed-off-by: Johan Jonker jbx6244@gmail.com Reviewed-by: Kever Yang kever.yang@rock-chips.com Reviewed-by: Michael Trimarchi michael@amarulasolutions.com --- drivers/mtd/nand/raw/rockchip_nfc.c | 4 ---- 1 file changed, 4 deletions(-)
diff --git a/drivers/mtd/nand/raw/rockchip_nfc.c b/drivers/mtd/nand/raw/rockchip_nfc.c index 5d444133..a8ec6bfc 100644 --- a/drivers/mtd/nand/raw/rockchip_nfc.c +++ b/drivers/mtd/nand/raw/rockchip_nfc.c @@ -1165,10 +1165,6 @@ static const struct udevice_id rk_nfc_id_table[] = { .compatible = "rockchip,rv1108-nfc", .data = (unsigned long)&nfc_v8_cfg }, - { - .compatible = "rockchip,rk3308-nfc", - .data = (unsigned long)&nfc_v8_cfg - }, { /* sentinel */ } };
-- 2.20.1

The MTD framework in U-boot is not identical for drivers ported from Linux. The rockchip_nfc driver was ported with OOB ops functions while the framework expects a layout structure per chip. Fix by adding a structure with OOB data and remove unused functions.
Signed-off-by: Johan Jonker jbx6244@gmail.com Reviewed-by: Kever Yang kever.yang@rock-chips.com Reviewed-by: Michael Trimarchi michael@amarulasolutions.com --- drivers/mtd/nand/raw/rockchip_nfc.c | 61 ++++++++++------------------- 1 file changed, 20 insertions(+), 41 deletions(-)
diff --git a/drivers/mtd/nand/raw/rockchip_nfc.c b/drivers/mtd/nand/raw/rockchip_nfc.c index a8ec6bfc..ab13e52c 100644 --- a/drivers/mtd/nand/raw/rockchip_nfc.c +++ b/drivers/mtd/nand/raw/rockchip_nfc.c @@ -814,47 +814,9 @@ static void rk_nfc_disable_clks(struct rk_nfc *nfc) clk_disable_unprepare(nfc->ahb_clk); }
-static int rk_nfc_ooblayout_free(struct mtd_info *mtd, int section, - struct mtd_oob_region *oob_region) -{ - struct nand_chip *chip = mtd_to_nand(mtd); - struct rk_nfc_nand_chip *rknand = rk_nfc_to_rknand(chip); - - if (section) - return -ERANGE; - - /* - * The beginning of the OOB area stores the reserved data for the NFC, - * the size of the reserved data is NFC_SYS_DATA_SIZE bytes. - */ - oob_region->length = rknand->metadata_size - NFC_SYS_DATA_SIZE - 2; - oob_region->offset = NFC_SYS_DATA_SIZE + 2; - - return 0; -} - -static int rk_nfc_ooblayout_ecc(struct mtd_info *mtd, int section, - struct mtd_oob_region *oob_region) -{ - struct nand_chip *chip = mtd_to_nand(mtd); - struct rk_nfc_nand_chip *rknand = rk_nfc_to_rknand(chip); - - if (section) - return -ERANGE; - - oob_region->length = mtd->oobsize - rknand->metadata_size; - oob_region->offset = rknand->metadata_size; - - return 0; -} - -static const struct mtd_ooblayout_ops rk_nfc_ooblayout_ops = { - .rfree = rk_nfc_ooblayout_free, - .ecc = rk_nfc_ooblayout_ecc, -}; - static int rk_nfc_ecc_init(struct rk_nfc *nfc, struct nand_chip *chip) { + struct rk_nfc_nand_chip *rknand = rk_nfc_to_rknand(chip); const u8 *strengths = nfc->cfg->ecc_strengths; struct mtd_info *mtd = nand_to_mtd(chip); struct nand_ecc_ctrl *ecc = &chip->ecc; @@ -892,6 +854,21 @@ static int rk_nfc_ecc_init(struct rk_nfc *nfc, struct nand_chip *chip) ecc->steps = mtd->writesize / ecc->size; ecc->bytes = DIV_ROUND_UP(ecc->strength * fls(8 * chip->ecc.size), 8);
+ if (ecc->bytes * ecc->steps > mtd->oobsize - rknand->metadata_size) + return -EINVAL; + + ecc->layout = kzalloc(sizeof(*ecc->layout), GFP_KERNEL); + if (!ecc->layout) + return -ENOMEM; + + ecc->layout->eccbytes = ecc->bytes * ecc->steps; + + for (i = 0; i < ecc->layout->eccbytes; i++) + ecc->layout->eccpos[i] = rknand->metadata_size + i; + + ecc->layout->oobfree[0].length = rknand->metadata_size - NFC_SYS_DATA_SIZE - 2; + ecc->layout->oobfree[0].offset = NFC_SYS_DATA_SIZE + 2; + return 0; }
@@ -969,7 +946,6 @@ static int rk_nfc_nand_chip_init(ofnode node, struct rk_nfc *nfc, int devnum) chip->bbt_options = NAND_BBT_USE_FLASH | NAND_BBT_NO_OOB; chip->options |= NAND_NO_SUBPAGE_WRITE | NAND_USE_BOUNCE_BUFFER;
- mtd_set_ooblayout(mtd, &rk_nfc_ooblayout_ops); rk_nfc_hw_init(nfc); ret = nand_scan_ident(mtd, nsels, NULL); if (ret) @@ -998,13 +974,16 @@ static int rk_nfc_nand_chip_init(ofnode node, struct rk_nfc *nfc, int devnum)
if (!nfc->page_buf) { nfc->page_buf = kzalloc(NFC_MAX_PAGE_SIZE, GFP_KERNEL); - if (!nfc->page_buf) + if (!nfc->page_buf) { + kfree(ecc->layout); return -ENOMEM; + } }
if (!nfc->oob_buf) { nfc->oob_buf = kzalloc(NFC_MAX_OOB_SIZE, GFP_KERNEL); if (!nfc->oob_buf) { + kfree(ecc->layout); kfree(nfc->page_buf); nfc->page_buf = NULL; return -ENOMEM; -- 2.20.1

Add flash_node to the rockchip_nfc driver chip structure in order to find the partitions in the add_mtd_partitions_of() function.
Signed-off-by: Johan Jonker jbx6244@gmail.com Reviewed-by: Kever Yang kever.yang@rock-chips.com Reviewed-by: Michael Trimarchi michael@amarulasolutions.com --- drivers/mtd/nand/raw/rockchip_nfc.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/mtd/nand/raw/rockchip_nfc.c b/drivers/mtd/nand/raw/rockchip_nfc.c index ab13e52c..ca5e7313 100644 --- a/drivers/mtd/nand/raw/rockchip_nfc.c +++ b/drivers/mtd/nand/raw/rockchip_nfc.c @@ -934,6 +934,7 @@ static int rk_nfc_nand_chip_init(ofnode node, struct rk_nfc *nfc, int devnum)
nand_set_controller_data(chip, nfc);
+ chip->flash_node = node; chip->chip_delay = NFC_RB_DELAY_US; chip->select_chip = rk_nfc_select_chip; chip->cmd_ctrl = rk_nfc_cmd; -- 2.20.1

The MTD framework reserves 1 or 2 bytes for the bad block marker depending on the bus size. The rockchip_nfc driver currently only supports a 8 bit bus, but reserves standard 2 bytes for the BBM. The first free OOB byte is therefore OOB2 at offset 2. Page address(PA) bytes are moved to the last 4 positions before ECC. Update the description for U-boot.
Signed-off-by: Johan Jonker jbx6244@gmail.com Reviewed-by: Kever Yang kever.yang@rock-chips.com --- drivers/mtd/nand/raw/rockchip_nfc.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/mtd/nand/raw/rockchip_nfc.c b/drivers/mtd/nand/raw/rockchip_nfc.c index ca5e7313..5ca7eeb8 100644 --- a/drivers/mtd/nand/raw/rockchip_nfc.c +++ b/drivers/mtd/nand/raw/rockchip_nfc.c @@ -487,10 +487,10 @@ static int rk_nfc_write_page_raw(struct mtd_info *mtd, * * BBM OOB1 OOB2 OOB3 |......| PA0 PA1 PA2 PA3 * - * The rk_nfc_ooblayout_free() function already has reserved - * these 4 bytes with: + * The oobfree structure already has reserved these 4 bytes + * together with 2 bytes for BBM by reducing it's length: * - * oob_region->offset = NFC_SYS_DATA_SIZE + 2; + * oobfree[0].length = rknand->metadata_size - NFC_SYS_DATA_SIZE - 2; */ if (!i) memcpy(rk_nfc_oob_ptr(chip, i), @@ -867,7 +867,7 @@ static int rk_nfc_ecc_init(struct rk_nfc *nfc, struct nand_chip *chip) ecc->layout->eccpos[i] = rknand->metadata_size + i;
ecc->layout->oobfree[0].length = rknand->metadata_size - NFC_SYS_DATA_SIZE - 2; - ecc->layout->oobfree[0].offset = NFC_SYS_DATA_SIZE + 2; + ecc->layout->oobfree[0].offset = 2;
return 0; } -- 2.20.1

Sandisk SDTNQGAMA is a 8GB size, 3.3V 8 bit chip with 16KB page size, 1KB write size and 40 bit ecc support
Signed-off-by: Paweł Jarosz paweljarosz3691@gmail.com Signed-off-by: Johan Jonker jbx6244@gmail.com Reviewed-by: Kever Yang kever.yang@rock-chips.com --- drivers/mtd/nand/raw/nand_ids.c | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/drivers/mtd/nand/raw/nand_ids.c b/drivers/mtd/nand/raw/nand_ids.c index d0cfacc6..22ea5e2f 100644 --- a/drivers/mtd/nand/raw/nand_ids.c +++ b/drivers/mtd/nand/raw/nand_ids.c @@ -48,6 +48,9 @@ struct nand_flash_dev nand_flash_ids[] = { {"TC58NVG6D2 64G 3.3V 8-bit", { .id = {0x98, 0xde, 0x94, 0x82, 0x76, 0x56, 0x04, 0x20} }, SZ_8K, SZ_8K, SZ_2M, 0, 8, 640, NAND_ECC_INFO(40, SZ_1K) }, + {"SDTNQGAMA 64G 3.3V 8-bit", + { .id = {0x45, 0xde, 0x94, 0x93, 0x76, 0x57} }, + SZ_16K, SZ_8K, SZ_4M, 0, 6, 1280, NAND_ECC_INFO(40, SZ_1K) }, {"SDTNRGAMA 64G 3.3V 8-bit", { .id = {0x45, 0xde, 0x94, 0x93, 0x76, 0x50} }, SZ_16K, SZ_8K, SZ_4M, 0, 6, 1280, NAND_ECC_INFO(40, SZ_1K) }, -- 2.20.1

The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU can expext 64-bit data from the device tree parser, so use dev_read_addr_ptr in the rockchip-saradc.c file.
Signed-off-by: Johan Jonker jbx6244@gmail.com Reviewed-by: Kever Yang kever.yang@rock-chips.com --- drivers/adc/rockchip-saradc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/adc/rockchip-saradc.c b/drivers/adc/rockchip-saradc.c index 760f8fe6..de9298a2 100644 --- a/drivers/adc/rockchip-saradc.c +++ b/drivers/adc/rockchip-saradc.c @@ -145,8 +145,8 @@ int rockchip_saradc_of_to_plat(struct udevice *dev) struct rockchip_saradc_data *data;
data = (struct rockchip_saradc_data *)dev_get_driver_data(dev); - priv->regs = (struct rockchip_saradc_regs *)dev_read_addr(dev); - if (priv->regs == (struct rockchip_saradc_regs *)FDT_ADDR_T_NONE) { + priv->regs = (struct rockchip_saradc_regs *)dev_read_addr_ptr(dev); + if (!priv->regs) { pr_err("Dev: %s - can't get address!", dev->name); return -ENODATA; } -- 2.20.1

The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU can expect 64-bit data from the device tree parser, so convert dev_read_addr output to phys_addr_t in the dw-apb-timer.c file.
Signed-off-by: Johan Jonker jbx6244@gmail.com Reviewed-by: Kever Yang kever.yang@rock-chips.com --- drivers/timer/dw-apb-timer.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/timer/dw-apb-timer.c b/drivers/timer/dw-apb-timer.c index 10f0a9f6..f55a3c54 100644 --- a/drivers/timer/dw-apb-timer.c +++ b/drivers/timer/dw-apb-timer.c @@ -23,7 +23,7 @@ #define DW_APB_CTRL 0x8
struct dw_apb_timer_priv { - fdt_addr_t regs; + phys_addr_t regs; struct reset_ctl_bulk resets; };
@@ -92,7 +92,7 @@ static int dw_apb_timer_of_to_plat(struct udevice *dev) if (CONFIG_IS_ENABLED(OF_REAL)) { struct dw_apb_timer_priv *priv = dev_get_priv(dev);
- priv->regs = dev_read_addr(dev); + priv->regs = (phys_addr_t)dev_read_addr(dev); }
return 0; -- 2.20.1

When fdt_addr_t and phys_addr_t are split it turns out that the header don't match the functions, so fix the headers.
Signed-off-by: Johan Jonker jbx6244@gmail.com Reviewed-by: Simon Glass sjg@chromium.org Reviewed-by: Kever Yang kever.yang@rock-chips.com --- include/dm/ofnode.h | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h index 3f6b0843..cd966f6a 100644 --- a/include/dm/ofnode.h +++ b/include/dm/ofnode.h @@ -678,8 +678,8 @@ int ofnode_read_size(ofnode node, const char *propname); * @size: Pointer to size of the address * Return: address, or FDT_ADDR_T_NONE if not present or invalid */ -phys_addr_t ofnode_get_addr_size_index(ofnode node, int index, - fdt_size_t *size); +fdt_addr_t ofnode_get_addr_size_index(ofnode node, int index, + fdt_size_t *size);
/** * ofnode_get_addr_size_index_notrans() - get an address/size from a node @@ -695,8 +695,8 @@ phys_addr_t ofnode_get_addr_size_index(ofnode node, int index, * @size: Pointer to size of the address * Return: address, or FDT_ADDR_T_NONE if not present or invalid */ -phys_addr_t ofnode_get_addr_size_index_notrans(ofnode node, int index, - fdt_size_t *size); +fdt_addr_t ofnode_get_addr_size_index_notrans(ofnode node, int index, + fdt_size_t *size);
/** * ofnode_get_addr_index() - get an address from a node @@ -707,7 +707,7 @@ phys_addr_t ofnode_get_addr_size_index_notrans(ofnode node, int index, * @index: Index of address to read (0 for first) * Return: address, or FDT_ADDR_T_NONE if not present or invalid */ -phys_addr_t ofnode_get_addr_index(ofnode node, int index); +fdt_addr_t ofnode_get_addr_index(ofnode node, int index);
/** * ofnode_get_addr() - get an address from a node @@ -717,7 +717,7 @@ phys_addr_t ofnode_get_addr_index(ofnode node, int index); * @node: node to read from * Return: address, or FDT_ADDR_T_NONE if not present or invalid */ -phys_addr_t ofnode_get_addr(ofnode node); +fdt_addr_t ofnode_get_addr(ofnode node);
/** * ofnode_get_size() - get size from a node @@ -1067,8 +1067,8 @@ const void *ofprop_get_property(const struct ofprop *prop, * @sizep: place to put size value (on success) * Return: address value, or FDT_ADDR_T_NONE on error */ -phys_addr_t ofnode_get_addr_size(ofnode node, const char *propname, - phys_size_t *sizep); +fdt_addr_t ofnode_get_addr_size(ofnode node, const char *propname, + fdt_size_t *sizep);
/** * ofnode_read_u8_array_ptr() - find an 8-bit array -- 2.20.1

The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU can expect 64-bit data from the device tree parser, so convert regmap_init_mem_plat() input to phys_addr_t in files that use this function. Also correct struct syscon_base_plat depending on CONFIG_PHYS_64BIT setting and fix ARRAY_SIZE divider.
Signed-off-by: Johan Jonker jbx6244@gmail.com Reviewed-by: Kever Yang kever.yang@rock-chips.com --- drivers/core/regmap.c | 2 +- drivers/core/syscon-uclass.c | 4 ++-- drivers/ram/rockchip/sdram_rk3066.c | 2 +- drivers/ram/rockchip/sdram_rk3188.c | 2 +- drivers/ram/rockchip/sdram_rk322x.c | 2 +- drivers/ram/rockchip/sdram_rk3288.c | 2 +- drivers/ram/rockchip/sdram_rk3328.c | 2 +- drivers/ram/rockchip/sdram_rk3399.c | 2 +- include/regmap.h | 2 +- include/syscon.h | 13 +++++++------ 10 files changed, 17 insertions(+), 16 deletions(-)
diff --git a/drivers/core/regmap.c b/drivers/core/regmap.c index e33bb9d7..37da64b2 100644 --- a/drivers/core/regmap.c +++ b/drivers/core/regmap.c @@ -79,7 +79,7 @@ static struct regmap *regmap_alloc(int count) }
#if CONFIG_IS_ENABLED(OF_PLATDATA) -int regmap_init_mem_plat(struct udevice *dev, fdt_val_t *reg, int count, +int regmap_init_mem_plat(struct udevice *dev, phys_addr_t *reg, int count, struct regmap **mapp) { struct regmap_range *range; diff --git a/drivers/core/syscon-uclass.c b/drivers/core/syscon-uclass.c index 25fdb66e..b557a24f 100644 --- a/drivers/core/syscon-uclass.c +++ b/drivers/core/syscon-uclass.c @@ -58,8 +58,8 @@ static int syscon_pre_probe(struct udevice *dev) #if CONFIG_IS_ENABLED(OF_PLATDATA) struct syscon_base_plat *plat = dev_get_plat(dev);
- return regmap_init_mem_plat(dev, plat->reg, ARRAY_SIZE(plat->reg), - &priv->regmap); + return regmap_init_mem_plat(dev, (phys_addr_t *)plat->reg, + ARRAY_SIZE(plat->reg) / 2, &priv->regmap); #else return regmap_init_mem(dev_ofnode(dev), &priv->regmap); #endif diff --git a/drivers/ram/rockchip/sdram_rk3066.c b/drivers/ram/rockchip/sdram_rk3066.c index a2425f22..9bb26b64 100644 --- a/drivers/ram/rockchip/sdram_rk3066.c +++ b/drivers/ram/rockchip/sdram_rk3066.c @@ -801,7 +801,7 @@ static int rk3066_dmc_conv_of_plat(struct udevice *dev) memcpy(&plat->base, of_plat->rockchip_sdram_params, sizeof(plat->base)); /* RK3066 supports dual-channel, set default channel num to 2. */ plat->num_channels = 1; - ret = regmap_init_mem_plat(dev, of_plat->reg, + ret = regmap_init_mem_plat(dev, (phys_addr_t *)of_plat->reg, ARRAY_SIZE(of_plat->reg) / 2, &plat->map); if (ret) return ret; diff --git a/drivers/ram/rockchip/sdram_rk3188.c b/drivers/ram/rockchip/sdram_rk3188.c index 272b1b2d..1838985c 100644 --- a/drivers/ram/rockchip/sdram_rk3188.c +++ b/drivers/ram/rockchip/sdram_rk3188.c @@ -867,7 +867,7 @@ static int conv_of_plat(struct udevice *dev) memcpy(&plat->base, of_plat->rockchip_sdram_params, sizeof(plat->base)); /* rk3188 supports dual-channel, set default channel num to 2 */ plat->num_channels = 1; - ret = regmap_init_mem_plat(dev, of_plat->reg, + ret = regmap_init_mem_plat(dev, (phys_addr_t *)of_plat->reg, ARRAY_SIZE(of_plat->reg) / 2, &plat->map); if (ret) return ret; diff --git a/drivers/ram/rockchip/sdram_rk322x.c b/drivers/ram/rockchip/sdram_rk322x.c index 1b204fb5..33599dc5 100644 --- a/drivers/ram/rockchip/sdram_rk322x.c +++ b/drivers/ram/rockchip/sdram_rk322x.c @@ -769,7 +769,7 @@ static int conv_of_plat(struct udevice *dev) memcpy(&plat->base, of_plat->rockchip_sdram_params, sizeof(plat->base));
plat->num_channels = 1; - ret = regmap_init_mem_plat(dev, of_plat->reg, + ret = regmap_init_mem_plat(dev, (phys_addr_t *)of_plat->reg, ARRAY_SIZE(of_plat->reg) / 2, &plat->map); if (ret) return ret; diff --git a/drivers/ram/rockchip/sdram_rk3288.c b/drivers/ram/rockchip/sdram_rk3288.c index 83778ad1..1a548da5 100644 --- a/drivers/ram/rockchip/sdram_rk3288.c +++ b/drivers/ram/rockchip/sdram_rk3288.c @@ -1029,7 +1029,7 @@ static int conv_of_plat(struct udevice *dev) memcpy(&plat->base, of_plat->rockchip_sdram_params, sizeof(plat->base)); /* Rk3288 supports dual-channel, set default channel num to 2 */ plat->num_channels = 2; - ret = regmap_init_mem_plat(dev, of_plat->reg, + ret = regmap_init_mem_plat(dev, (phys_addr_t *)of_plat->reg, ARRAY_SIZE(of_plat->reg) / 2, &plat->map); if (ret) return ret; diff --git a/drivers/ram/rockchip/sdram_rk3328.c b/drivers/ram/rockchip/sdram_rk3328.c index 184c93f7..41da7ca2 100644 --- a/drivers/ram/rockchip/sdram_rk3328.c +++ b/drivers/ram/rockchip/sdram_rk3328.c @@ -54,7 +54,7 @@ static int conv_of_plat(struct udevice *dev) struct dtd_rockchip_rk3328_dmc *dtplat = &plat->dtplat; int ret;
- ret = regmap_init_mem_plat(dev, dtplat->reg, + ret = regmap_init_mem_plat(dev, (phys_addr_t *)dtplat->reg, ARRAY_SIZE(dtplat->reg) / 2, &plat->map); if (ret) return ret; diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c index b1fea04e..e3f76fa4 100644 --- a/drivers/ram/rockchip/sdram_rk3399.c +++ b/drivers/ram/rockchip/sdram_rk3399.c @@ -3048,7 +3048,7 @@ static int conv_of_plat(struct udevice *dev) struct dtd_rockchip_rk3399_dmc *dtplat = &plat->dtplat; int ret;
- ret = regmap_init_mem_plat(dev, dtplat->reg, + ret = regmap_init_mem_plat(dev, (phys_addr_t *)dtplat->reg, ARRAY_SIZE(dtplat->reg) / 2, &plat->map); if (ret) return ret; diff --git a/include/regmap.h b/include/regmap.h index e81a3602..a274fb27 100644 --- a/include/regmap.h +++ b/include/regmap.h @@ -388,7 +388,7 @@ int regmap_init_mem(ofnode node, struct regmap **mapp); * Use regmap_uninit() to free it. * */ -int regmap_init_mem_plat(struct udevice *dev, fdt_val_t *reg, int count, +int regmap_init_mem_plat(struct udevice *dev, phys_addr_t *reg, int count, struct regmap **mapp);
int regmap_init_mem_index(ofnode node, struct regmap **mapp, int index); diff --git a/include/syscon.h b/include/syscon.h index f5e6cc1a..836ae07c 100644 --- a/include/syscon.h +++ b/include/syscon.h @@ -27,14 +27,15 @@ struct syscon_ops {
#if CONFIG_IS_ENABLED(OF_PLATDATA) /* - * We don't support 64-bit machines. If they are so resource-contrained that - * they need to use OF_PLATDATA, something is horribly wrong with the - * education of our hardware engineers. - * - * Update: 64-bit is now supported and we have an education crisis. + * Support for 64bit or 32bit fdt addresses + * depending on the physical SoC properties. */ struct syscon_base_plat { - fdt_val_t reg[2]; +#ifdef CONFIG_PHYS_64BIT + fdt64_t reg[2]; +#else + fdt32_t reg[2]; +#endif }; #endif
-- 2.20.1

Add devfdt_get_addr_size_index_ptr function with the same functionality as devfdt_get_addr_size_index, but instead a return pointer is given.
Suggested-by: Michael Nazzareno Trimarchi michael@amarulasolutions.com Signed-off-by: Johan Jonker jbx6244@gmail.com Reviewed-by: Michael Trimarchi michael@amarulasolutions.com ---
Changed V5: fix spelling use tabs --- drivers/core/fdtaddr.c | 8 ++++++++ include/dm/fdtaddr.h | 17 ++++++++++++++++- 2 files changed, 24 insertions(+), 1 deletion(-)
diff --git a/drivers/core/fdtaddr.c b/drivers/core/fdtaddr.c index 91bcd1a2..f5906ff9 100644 --- a/drivers/core/fdtaddr.c +++ b/drivers/core/fdtaddr.c @@ -122,6 +122,14 @@ fdt_addr_t devfdt_get_addr_size_index(const struct udevice *dev, int index, #endif }
+void *devfdt_get_addr_size_index_ptr(const struct udevice *dev, int index, + fdt_size_t *size) +{ + fdt_addr_t addr = devfdt_get_addr_size_index(dev, index, size); + + return (addr == FDT_ADDR_T_NONE) ? NULL : (void *)(uintptr_t)addr; +} + fdt_addr_t devfdt_get_addr_name(const struct udevice *dev, const char *name) { #if CONFIG_IS_ENABLED(OF_CONTROL) diff --git a/include/dm/fdtaddr.h b/include/dm/fdtaddr.h index c9d2b27b..dcdc1913 100644 --- a/include/dm/fdtaddr.h +++ b/include/dm/fdtaddr.h @@ -111,7 +111,7 @@ void *devfdt_get_addr_index_ptr(const struct udevice *dev, int index); * @dev: Pointer to a device * @index: the 'reg' property can hold a list of <addr, size> pairs * and @index is used to select which one is required - * @size: Pointer to size varible - this function returns the size + * @size: Pointer to size variable - this function returns the size * specified in the 'reg' property here * * Return: addr @@ -119,6 +119,21 @@ void *devfdt_get_addr_index_ptr(const struct udevice *dev, int index); fdt_addr_t devfdt_get_addr_size_index(const struct udevice *dev, int index, fdt_size_t *size);
+/** + * devfdt_get_addr_size_index_ptr() - Return indexed pointer to the address of the + * reg property of a device + * + * @dev: Pointer to a device + * @index: the 'reg' property can hold a list of <addr, size> pairs + * and @index is used to select which one is required + * @size: Pointer to size variable - this function returns the size + * specified in the 'reg' property here + * + * Return: Pointer to addr, or NULL if there is no such property + */ +void *devfdt_get_addr_size_index_ptr(const struct udevice *dev, int index, + fdt_size_t *size); + /** * devfdt_get_addr_name() - Get the reg property of a device, indexed by name * -- 2.20.1

Add dev_read_addr_index_ptr function with the same functionality as dev_read_addr_index, but instead a return pointer is given.
Signed-off-by: Johan Jonker jbx6244@gmail.com ---
Changed V5: new patch --- drivers/core/read.c | 7 +++++++ 1 file changed, 7 insertions(+)
diff --git a/drivers/core/read.c b/drivers/core/read.c index e0543bba..85c46913 100644 --- a/drivers/core/read.c +++ b/drivers/core/read.c @@ -131,6 +131,13 @@ fdt_addr_t dev_read_addr_index(const struct udevice *dev, int index) return devfdt_get_addr_index(dev, index); }
+void *dev_read_addr_index_ptr(const struct udevice *dev, int index) +{ + fdt_addr_t addr = dev_read_addr_index(dev, index); + + return (addr == FDT_ADDR_T_NONE) ? NULL : (void *)(uintptr_t)addr; +} + fdt_addr_t dev_read_addr_size_index(const struct udevice *dev, int index, fdt_size_t *size) { -- 2.20.1

Hi Johan,
On Tue, 28 Feb 2023 at 14:20, Johan Jonker jbx6244@gmail.com wrote:
Add dev_read_addr_index_ptr function with the same functionality as dev_read_addr_index, but instead a return pointer is given.
Signed-off-by: Johan Jonker jbx6244@gmail.com
Changed V5: new patch
drivers/core/read.c | 7 +++++++ 1 file changed, 7 insertions(+)
diff --git a/drivers/core/read.c b/drivers/core/read.c index e0543bba..85c46913 100644 --- a/drivers/core/read.c +++ b/drivers/core/read.c @@ -131,6 +131,13 @@ fdt_addr_t dev_read_addr_index(const struct udevice *dev, int index) return devfdt_get_addr_index(dev, index); }
+void *dev_read_addr_index_ptr(const struct udevice *dev, int index) +{
fdt_addr_t addr = dev_read_addr_index(dev, index);
return (addr == FDT_ADDR_T_NONE) ? NULL : (void *)(uintptr_t)addr;
Please use map_sysmem() rather than a cast, so it can be used on sandbox.
+}
fdt_addr_t dev_read_addr_size_index(const struct udevice *dev, int index, fdt_size_t *size) { -- 2.20.1
Regards, Simon

The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU can expect 64-bit data from the device tree parser, so use devfdt_get_addr_index_ptr and devfdt_get_addr_size_index_ptr function in the spi-aspeed-smc.c file. Also fix dev_dbg to be able to handle both sizes.
Signed-off-by: Johan Jonker jbx6244@gmail.com Reviewed-by: Michael Trimarchi michael@amarulasolutions.com --- drivers/spi/spi-aspeed-smc.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/drivers/spi/spi-aspeed-smc.c b/drivers/spi/spi-aspeed-smc.c index 4b6ea9f8..2be9280a 100644 --- a/drivers/spi/spi-aspeed-smc.c +++ b/drivers/spi/spi-aspeed-smc.c @@ -1125,15 +1125,14 @@ static int apseed_spi_of_to_plat(struct udevice *bus) int ret; struct clk hclk;
- priv->regs = (void __iomem *)devfdt_get_addr_index(bus, 0); - if ((u32)priv->regs == FDT_ADDR_T_NONE) { + priv->regs = devfdt_get_addr_index_ptr(bus, 0); + if (!priv->regs) { dev_err(bus, "wrong ctrl base\n"); return -ENODEV; }
- plat->ahb_base = - (void __iomem *)devfdt_get_addr_size_index(bus, 1, &plat->ahb_sz); - if ((u32)plat->ahb_base == FDT_ADDR_T_NONE) { + plat->ahb_base = devfdt_get_addr_size_index_ptr(bus, 1, &plat->ahb_sz); + if (!plat->ahb_base) { dev_err(bus, "wrong AHB base\n"); return -ENODEV; } @@ -1151,8 +1150,8 @@ static int apseed_spi_of_to_plat(struct udevice *bus) plat->hclk_rate = clk_get_rate(&hclk); clk_free(&hclk);
- dev_dbg(bus, "ctrl_base = 0x%x, ahb_base = 0x%p, size = 0x%lx\n", - (u32)priv->regs, plat->ahb_base, plat->ahb_sz); + dev_dbg(bus, "ctrl_base = 0x%x, ahb_base = 0x%p, size = 0x%llx\n", + (u32)priv->regs, plat->ahb_base, (fdt64_t)plat->ahb_sz); dev_dbg(bus, "hclk = %dMHz, max_cs = %d\n", plat->hclk_rate / 1000000, plat->max_cs);
-- 2.20.1

Hi Johan,
On Tue, 28 Feb 2023 at 14:20, Johan Jonker jbx6244@gmail.com wrote:
The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU can expect 64-bit data from the device tree parser,
Do you mean that 32-bit machines now use 64-bit values regardless? That does not sound very efficient.
so use devfdt_get_addr_index_ptr and devfdt_get_addr_size_index_ptr function in the spi-aspeed-smc.c file. Also fix dev_dbg to be able to handle both sizes.
Signed-off-by: Johan Jonker jbx6244@gmail.com Reviewed-by: Michael Trimarchi michael@amarulasolutions.com
drivers/spi/spi-aspeed-smc.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/drivers/spi/spi-aspeed-smc.c b/drivers/spi/spi-aspeed-smc.c index 4b6ea9f8..2be9280a 100644 --- a/drivers/spi/spi-aspeed-smc.c +++ b/drivers/spi/spi-aspeed-smc.c @@ -1125,15 +1125,14 @@ static int apseed_spi_of_to_plat(struct udevice *bus) int ret; struct clk hclk;
priv->regs = (void __iomem *)devfdt_get_addr_index(bus, 0);
if ((u32)priv->regs == FDT_ADDR_T_NONE) {
priv->regs = devfdt_get_addr_index_ptr(bus, 0);
if (!priv->regs) { dev_err(bus, "wrong ctrl base\n"); return -ENODEV;
-EINVAL (since there is a device and this is used internally by driver model)
}
plat->ahb_base =
(void __iomem *)devfdt_get_addr_size_index(bus, 1, &plat->ahb_sz);
if ((u32)plat->ahb_base == FDT_ADDR_T_NONE) {
plat->ahb_base = devfdt_get_addr_size_index_ptr(bus, 1, &plat->ahb_sz);
if (!plat->ahb_base) { dev_err(bus, "wrong AHB base\n"); return -ENODEV; }
@@ -1151,8 +1150,8 @@ static int apseed_spi_of_to_plat(struct udevice *bus) plat->hclk_rate = clk_get_rate(&hclk); clk_free(&hclk);
dev_dbg(bus, "ctrl_base = 0x%x, ahb_base = 0x%p, size = 0x%lx\n",
(u32)priv->regs, plat->ahb_base, plat->ahb_sz);
dev_dbg(bus, "ctrl_base = 0x%x, ahb_base = 0x%p, size = 0x%llx\n",
(u32)priv->regs, plat->ahb_base, (fdt64_t)plat->ahb_sz); dev_dbg(bus, "hclk = %dMHz, max_cs = %d\n", plat->hclk_rate / 1000000, plat->max_cs);
-- 2.20.1
Regards, Simon

The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU can expect 64-bit data from the device tree parser, so use dev_read_addr_index_ptr instead of the dev_read_addr_index function in the various files in the drivers directory that cast to a pointer.
Signed-off-by: Johan Jonker jbx6244@gmail.com Reviewed-by: Michael Trimarchi michael@amarulasolutions.com --- drivers/mtd/nand/raw/cortina_nand.c | 4 ++-- drivers/net/dm9000x.c | 2 +- drivers/net/dwmac_meson8b.c | 4 ++-- drivers/pci/pcie_dw_meson.c | 4 ++-- drivers/pci/pcie_dw_rockchip.c | 4 ++-- drivers/watchdog/sbsa_gwdt.c | 12 ++++++------ 6 files changed, 15 insertions(+), 15 deletions(-)
diff --git a/drivers/mtd/nand/raw/cortina_nand.c b/drivers/mtd/nand/raw/cortina_nand.c index 88798f23..b03f3821 100644 --- a/drivers/mtd/nand/raw/cortina_nand.c +++ b/drivers/mtd/nand/raw/cortina_nand.c @@ -1175,8 +1175,8 @@ static int fdt_decode_nand(struct udevice *dev, struct nand_drv *info) int ecc_strength;
info->reg = (struct nand_ctlr *)dev_read_addr(dev); - info->dma_glb = (struct dma_global *)dev_read_addr_index(dev, 1); - info->dma_nand = (struct dma_ssp *)dev_read_addr_index(dev, 2); + info->dma_glb = (struct dma_global *)dev_read_addr_index_ptr(dev, 1); + info->dma_nand = (struct dma_ssp *)dev_read_addr_index_ptr(dev, 2); info->config.enabled = dev_read_enabled(dev); ecc_strength = dev_read_u32_default(dev, "nand-ecc-strength", 16); info->flash_base = diff --git a/drivers/net/dm9000x.c b/drivers/net/dm9000x.c index b46bdeb2..5855f16b 100644 --- a/drivers/net/dm9000x.c +++ b/drivers/net/dm9000x.c @@ -651,7 +651,7 @@ static int dm9000_of_to_plat(struct udevice *dev)
pdata->iobase = dev_read_addr_index(dev, 0); db->base_io = (void __iomem *)pdata->iobase; - db->base_data = (void __iomem *)dev_read_addr_index(dev, 1); + db->base_data = (void __iomem *)dev_read_addr_index_ptr(dev, 1);
return 0; } diff --git a/drivers/net/dwmac_meson8b.c b/drivers/net/dwmac_meson8b.c index ddbaa87d..871171e1 100644 --- a/drivers/net/dwmac_meson8b.c +++ b/drivers/net/dwmac_meson8b.c @@ -41,8 +41,8 @@ static int dwmac_meson8b_of_to_plat(struct udevice *dev) { struct dwmac_meson8b_plat *pdata = dev_get_plat(dev);
- pdata->regs = (void *)dev_read_addr_index(dev, 1); - if ((fdt_addr_t)pdata->regs == FDT_ADDR_T_NONE) + pdata->regs = dev_read_addr_index_ptr(dev, 1); + if (!pdata->regs) return -EINVAL;
pdata->dwmac_setup = (void *)dev_get_driver_data(dev); diff --git a/drivers/pci/pcie_dw_meson.c b/drivers/pci/pcie_dw_meson.c index 07da9fa5..59567883 100644 --- a/drivers/pci/pcie_dw_meson.c +++ b/drivers/pci/pcie_dw_meson.c @@ -337,13 +337,13 @@ static int meson_pcie_parse_dt(struct udevice *dev) struct meson_pcie *priv = dev_get_priv(dev); int ret;
- priv->dw.dbi_base = (void *)dev_read_addr_index(dev, 0); + priv->dw.dbi_base = dev_read_addr_index_ptr(dev, 0); if (!priv->dw.dbi_base) return -ENODEV;
dev_dbg(dev, "ELBI address is 0x%p\n", priv->dw.dbi_base);
- priv->meson_cfg_base = (void *)dev_read_addr_index(dev, 1); + priv->meson_cfg_base = dev_read_addr_index_ptr(dev, 1); if (!priv->meson_cfg_base) return -ENODEV;
diff --git a/drivers/pci/pcie_dw_rockchip.c b/drivers/pci/pcie_dw_rockchip.c index 9322e735..2608106b 100644 --- a/drivers/pci/pcie_dw_rockchip.c +++ b/drivers/pci/pcie_dw_rockchip.c @@ -353,13 +353,13 @@ static int rockchip_pcie_parse_dt(struct udevice *dev) struct rk_pcie *priv = dev_get_priv(dev); int ret;
- priv->dw.dbi_base = (void *)dev_read_addr_index(dev, 0); + priv->dw.dbi_base = dev_read_addr_index_ptr(dev, 0); if (!priv->dw.dbi_base) return -ENODEV;
dev_dbg(dev, "DBI address is 0x%p\n", priv->dw.dbi_base);
- priv->apb_base = (void *)dev_read_addr_index(dev, 1); + priv->apb_base = dev_read_addr_index_ptr(dev, 1); if (!priv->apb_base) return -ENODEV;
diff --git a/drivers/watchdog/sbsa_gwdt.c b/drivers/watchdog/sbsa_gwdt.c index f43cd3fd..ef402898 100644 --- a/drivers/watchdog/sbsa_gwdt.c +++ b/drivers/watchdog/sbsa_gwdt.c @@ -98,13 +98,13 @@ static int sbsa_gwdt_of_to_plat(struct udevice *dev) { struct sbsa_gwdt_priv *priv = dev_get_priv(dev);
- priv->reg_control = (void __iomem *)dev_read_addr_index(dev, 0); - if (IS_ERR(priv->reg_control)) - return PTR_ERR(priv->reg_control); + priv->reg_control = (void __iomem *)dev_read_addr_index_ptr(dev, 0); + if (!priv->reg_control) + return -EINVAL;
- priv->reg_refresh = (void __iomem *)dev_read_addr_index(dev, 1); - if (IS_ERR(priv->reg_refresh)) - return PTR_ERR(priv->reg_refresh); + priv->reg_refresh = (void __iomem *)dev_read_addr_index_ptr(dev, 1); + if (!priv->reg_refresh) + return -EINVAL;
return 0; } -- 2.20.1

The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU can expect 64-bit data from the device tree parser, so use dev_read_addr_ptr instead of the dev_read_addr function in the various files in the drivers directory that cast to a pointer.
Signed-off-by: Johan Jonker jbx6244@gmail.com ---
Changed V2: rebase fix typo fix more files --- arch/arm/mach-mvebu/system-controller.c | 4 ++-- doc/develop/driver-model/livetree.rst | 2 +- drivers/ata/dwc_ahsata.c | 2 +- drivers/cache/cache-l2x0.c | 2 +- drivers/cache/cache-v5l2.c | 2 +- drivers/gpio/mscc_sgpio.c | 2 +- drivers/gpio/tegra_gpio.c | 4 ++-- drivers/gpio/xilinx_gpio.c | 2 +- drivers/i2c/i2c-cdns.c | 2 +- drivers/i2c/tegra_i2c.c | 4 ++-- drivers/mmc/am654_sdhci.c | 2 +- drivers/mmc/davinci_mmc.c | 2 +- drivers/mmc/piton_mmc.c | 2 +- drivers/mmc/tegra_mmc.c | 2 +- drivers/mmc/zynq_sdhci.c | 6 +++--- drivers/mtd/nand/raw/arasan_nfc.c | 2 +- drivers/mtd/nand/raw/cortina_nand.c | 2 +- drivers/mtd/nand/raw/mxic_nand.c | 2 +- drivers/mtd/nand/raw/tegra_nand.c | 2 +- drivers/mtd/nand/raw/zynq_nand.c | 2 +- drivers/net/mvmdio.c | 2 +- drivers/net/qe/dm_qe_uec_phy.c | 2 +- drivers/pci/pci-aardvark.c | 4 ++-- drivers/phy/allwinner/phy-sun50i-usb3.c | 6 +++--- drivers/phy/qcom/phy-qcom-usb-hs-28nm.c | 4 ++-- drivers/phy/qcom/phy-qcom-usb-ss.c | 4 ++-- drivers/phy/rockchip/phy-rockchip-snps-pcie3.c | 4 ++-- drivers/phy/rockchip/phy-rockchip-typec.c | 6 +++--- drivers/pwm/tegra_pwm.c | 2 +- drivers/serial/serial_zynq.c | 6 +++--- drivers/spi/mpc8xxx_spi.c | 2 +- drivers/spi/mscc_bb_spi.c | 2 +- drivers/spi/sh_qspi.c | 2 +- drivers/spi/spi-mxic.c | 2 +- drivers/spi/xilinx_spi.c | 2 +- drivers/ufs/ufs.c | 2 +- drivers/usb/host/ehci-tegra.c | 2 +- drivers/video/dw_mipi_dsi.c | 4 ++-- drivers/video/rockchip/rk_vop.c | 2 +- drivers/video/stm32/stm32_dsi.c | 4 ++-- drivers/video/stm32/stm32_ltdc.c | 4 ++-- drivers/video/tegra124/display.c | 2 +- drivers/video/tegra124/sor.c | 6 +++--- drivers/video/ti/tilcdc.c | 4 ++-- drivers/watchdog/cdns_wdt.c | 6 +++--- drivers/watchdog/sp805_wdt.c | 6 +++--- drivers/watchdog/xilinx_tb_wdt.c | 6 +++--- 47 files changed, 74 insertions(+), 74 deletions(-)
diff --git a/arch/arm/mach-mvebu/system-controller.c b/arch/arm/mach-mvebu/system-controller.c index e90aff0c..7cdde11c 100644 --- a/arch/arm/mach-mvebu/system-controller.c +++ b/arch/arm/mach-mvebu/system-controller.c @@ -71,8 +71,8 @@ static int mvebu_reset_of_to_plat(struct udevice *dev) { struct mvebu_reset_data *data = dev_get_priv(dev);
- data->base = (void *)dev_read_addr(dev); - if ((fdt_addr_t)data->base == FDT_ADDR_T_NONE) + data->base = dev_read_addr_ptr(dev); + if (!data->base) return -EINVAL;
return 0; diff --git a/doc/develop/driver-model/livetree.rst b/doc/develop/driver-model/livetree.rst index 579eef5c..e9149d73 100644 --- a/doc/develop/driver-model/livetree.rst +++ b/doc/develop/driver-model/livetree.rst @@ -103,7 +103,7 @@ The new code is:
struct udevice *bus;
- i2c_bus->regs = (struct i2c_ctlr *)dev_read_addr(dev); + i2c_bus->regs = (struct i2c_ctlr *)dev_read_addr_ptr(dev); plat->frequency = dev_read_u32_default(bus, "spi-max-frequency", 500000);
The dev_read_...() interface is more convenient and works with both the diff --git a/drivers/ata/dwc_ahsata.c b/drivers/ata/dwc_ahsata.c index 167b5a39..9ed7348b 100644 --- a/drivers/ata/dwc_ahsata.c +++ b/drivers/ata/dwc_ahsata.c @@ -912,7 +912,7 @@ int dwc_ahsata_probe(struct udevice *dev) #endif uc_priv->host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | ATA_FLAG_MMIO | ATA_FLAG_PIO_DMA | ATA_FLAG_NO_ATAPI; - uc_priv->mmio_base = (void __iomem *)dev_read_addr(dev); + uc_priv->mmio_base = (void __iomem *)dev_read_addr_ptr(dev);
/* initialize adapter */ ret = ahci_host_init(uc_priv); diff --git a/drivers/cache/cache-l2x0.c b/drivers/cache/cache-l2x0.c index a1556fbf..70b31899 100644 --- a/drivers/cache/cache-l2x0.c +++ b/drivers/cache/cache-l2x0.c @@ -13,7 +13,7 @@ static void l2c310_of_parse_and_init(struct udevice *dev) { u32 tag[3] = { 0, 0, 0 }; u32 saved_reg, prefetch; - struct pl310_regs *regs = (struct pl310_regs *)dev_read_addr(dev); + struct pl310_regs *regs = (struct pl310_regs *)dev_read_addr_ptr(dev);
/* Disable the L2 Cache */ clrbits_le32(®s->pl310_ctrl, L2X0_CTRL_EN); diff --git a/drivers/cache/cache-v5l2.c b/drivers/cache/cache-v5l2.c index eda07d3f..885eb4d8 100644 --- a/drivers/cache/cache-v5l2.c +++ b/drivers/cache/cache-v5l2.c @@ -119,7 +119,7 @@ static int v5l2_of_to_plat(struct udevice *dev) struct v5l2_plat *plat = dev_get_plat(dev); struct l2cache *regs;
- regs = (struct l2cache *)(uintptr_t)dev_read_addr(dev); + regs = (struct l2cache *)dev_read_addr_ptr(dev); plat->regs = regs;
plat->iprefetch = -EINVAL; diff --git a/drivers/gpio/mscc_sgpio.c b/drivers/gpio/mscc_sgpio.c index 1cbcc434..980f9f1e 100644 --- a/drivers/gpio/mscc_sgpio.c +++ b/drivers/gpio/mscc_sgpio.c @@ -232,7 +232,7 @@ static int mscc_sgpio_probe(struct udevice *dev) debug("probe: gpios = %d, bit-count = %d\n", uc_priv->gpio_count, priv->bitcount);
- priv->regs = (u32 __iomem *)dev_read_addr(dev); + priv->regs = (u32 __iomem *)dev_read_addr_ptr(dev); uc_priv->bank_name = "sgpio";
sgpio_clrsetbits(priv, REG_SIO_CONFIG, 0, diff --git a/drivers/gpio/tegra_gpio.c b/drivers/gpio/tegra_gpio.c index 4291e496..f7a41b39 100644 --- a/drivers/gpio/tegra_gpio.c +++ b/drivers/gpio/tegra_gpio.c @@ -339,8 +339,8 @@ static int gpio_tegra_bind(struct udevice *parent) if (len < 0) return len; bank_count = len / 3 / sizeof(u32); - ctlr = (struct gpio_ctlr *)dev_read_addr(parent); - if ((ulong)ctlr == FDT_ADDR_T_NONE) + ctlr = (struct gpio_ctlr *)dev_read_addr_ptr(parent); + if (!ctlr) return -EINVAL; } #endif diff --git a/drivers/gpio/xilinx_gpio.c b/drivers/gpio/xilinx_gpio.c index 510838d2..55ae0536 100644 --- a/drivers/gpio/xilinx_gpio.c +++ b/drivers/gpio/xilinx_gpio.c @@ -268,7 +268,7 @@ static int xilinx_gpio_of_to_plat(struct udevice *dev) struct xilinx_gpio_plat *plat = dev_get_plat(dev); int is_dual;
- plat->regs = (struct gpio_regs *)dev_read_addr(dev); + plat->regs = (struct gpio_regs *)dev_read_addr_ptr(dev);
plat->bank_max[0] = dev_read_u32_default(dev, "xlnx,gpio-width", 0); plat->bank_input[0] = dev_read_u32_default(dev, "xlnx,all-inputs", 0); diff --git a/drivers/i2c/i2c-cdns.c b/drivers/i2c/i2c-cdns.c index c1672ca1..574a8590 100644 --- a/drivers/i2c/i2c-cdns.c +++ b/drivers/i2c/i2c-cdns.c @@ -479,7 +479,7 @@ static int cdns_i2c_of_to_plat(struct udevice *dev) struct clk clk; int ret;
- i2c_bus->regs = (struct cdns_i2c_regs *)dev_read_addr(dev); + i2c_bus->regs = (struct cdns_i2c_regs *)dev_read_addr_ptr(dev); if (!i2c_bus->regs) return -ENOMEM;
diff --git a/drivers/i2c/tegra_i2c.c b/drivers/i2c/tegra_i2c.c index 2394e9d0..7e3a2da1 100644 --- a/drivers/i2c/tegra_i2c.c +++ b/drivers/i2c/tegra_i2c.c @@ -364,8 +364,8 @@ static int tegra_i2c_probe(struct udevice *dev)
i2c_bus->id = dev_seq(dev); i2c_bus->type = dev_get_driver_data(dev); - i2c_bus->regs = (struct i2c_ctlr *)dev_read_addr(dev); - if ((ulong)i2c_bus->regs == FDT_ADDR_T_NONE) { + i2c_bus->regs = (struct i2c_ctlr *)dev_read_addr_ptr(dev); + if (!i2c_bus->regs) { debug("%s: Cannot get regs address\n", __func__); return -EINVAL; } diff --git a/drivers/mmc/am654_sdhci.c b/drivers/mmc/am654_sdhci.c index 42a61343..fd667aea 100644 --- a/drivers/mmc/am654_sdhci.c +++ b/drivers/mmc/am654_sdhci.c @@ -584,7 +584,7 @@ static int am654_sdhci_of_to_plat(struct udevice *dev) int ret;
host->name = dev->name; - host->ioaddr = (void *)dev_read_addr(dev); + host->ioaddr = dev_read_addr_ptr(dev); plat->non_removable = dev_read_bool(dev, "non-removable");
if (plat->flags & DLL_PRESENT) { diff --git a/drivers/mmc/davinci_mmc.c b/drivers/mmc/davinci_mmc.c index 05ca3612..407289fa 100644 --- a/drivers/mmc/davinci_mmc.c +++ b/drivers/mmc/davinci_mmc.c @@ -506,7 +506,7 @@ static int davinci_mmc_of_to_plat(struct udevice *dev) struct davinci_mmc_plat *plat = dev_get_plat(dev); struct mmc_config *cfg = &plat->cfg;
- plat->reg_base = (struct davinci_mmc_regs *)dev_read_addr(dev); + plat->reg_base = (struct davinci_mmc_regs *)dev_read_addr_ptr(dev); cfg->f_min = 200000; cfg->f_max = 25000000; cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34, diff --git a/drivers/mmc/piton_mmc.c b/drivers/mmc/piton_mmc.c index 9f5da6d6..a330bbf8 100644 --- a/drivers/mmc/piton_mmc.c +++ b/drivers/mmc/piton_mmc.c @@ -74,7 +74,7 @@ static int piton_mmc_ofdata_to_platdata(struct udevice *dev) struct mmc *mmc; struct blk_desc *bdesc;
- priv->base_addr = (void *)dev_read_addr(dev); + priv->base_addr = dev_read_addr_ptr(dev); cfg = &plat->cfg; cfg->name = "PITON MMC"; cfg->host_caps = MMC_MODE_8BIT; diff --git a/drivers/mmc/tegra_mmc.c b/drivers/mmc/tegra_mmc.c index 760eca40..f76fee3e 100644 --- a/drivers/mmc/tegra_mmc.c +++ b/drivers/mmc/tegra_mmc.c @@ -708,7 +708,7 @@ static int tegra_mmc_probe(struct udevice *dev)
cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
- priv->reg = (void *)dev_read_addr(dev); + priv->reg = dev_read_addr_ptr(dev);
ret = reset_get_by_name(dev, "sdhci", &priv->reset_ctl); if (ret) { diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c index 91e309d2..6e22aef4 100644 --- a/drivers/mmc/zynq_sdhci.c +++ b/drivers/mmc/zynq_sdhci.c @@ -1195,9 +1195,9 @@ static int arasan_sdhci_of_to_plat(struct udevice *dev) arasan_dt_parse_clk_phases(dev); #endif
- priv->host->ioaddr = (void *)dev_read_addr(dev); - if (IS_ERR(priv->host->ioaddr)) - return PTR_ERR(priv->host->ioaddr); + priv->host->ioaddr = dev_read_addr_ptr(dev); + if (!priv->host->ioaddr) + return -EINVAL;
priv->bank = dev_read_u32_default(dev, "xlnx,mio-bank", 0); priv->no_1p8 = dev_read_bool(dev, "no-1-8-v"); diff --git a/drivers/mtd/nand/raw/arasan_nfc.c b/drivers/mtd/nand/raw/arasan_nfc.c index 4621bfb0..03faa961 100644 --- a/drivers/mtd/nand/raw/arasan_nfc.c +++ b/drivers/mtd/nand/raw/arasan_nfc.c @@ -1232,7 +1232,7 @@ static int arasan_probe(struct udevice *dev) struct mtd_info *mtd; int err = -1;
- info->reg = (struct nand_regs *)dev_read_addr(dev); + info->reg = (struct nand_regs *)dev_read_addr_ptr(dev); mtd = nand_to_mtd(nand_chip); nand_set_controller_data(nand_chip, &arasan->nand_ctrl);
diff --git a/drivers/mtd/nand/raw/cortina_nand.c b/drivers/mtd/nand/raw/cortina_nand.c index b03f3821..8095d2e1 100644 --- a/drivers/mtd/nand/raw/cortina_nand.c +++ b/drivers/mtd/nand/raw/cortina_nand.c @@ -1174,7 +1174,7 @@ static int fdt_decode_nand(struct udevice *dev, struct nand_drv *info) { int ecc_strength;
- info->reg = (struct nand_ctlr *)dev_read_addr(dev); + info->reg = (struct nand_ctlr *)dev_read_addr_ptr(dev); info->dma_glb = (struct dma_global *)dev_read_addr_index_ptr(dev, 1); info->dma_nand = (struct dma_ssp *)dev_read_addr_index_ptr(dev, 2); info->config.enabled = dev_read_enabled(dev); diff --git a/drivers/mtd/nand/raw/mxic_nand.c b/drivers/mtd/nand/raw/mxic_nand.c index e54df461..6abdc24b 100644 --- a/drivers/mtd/nand/raw/mxic_nand.c +++ b/drivers/mtd/nand/raw/mxic_nand.c @@ -538,7 +538,7 @@ static int mxic_nfc_probe(struct udevice *dev) ofnode child; int err;
- nfc->regs = (void *)dev_read_addr(dev); + nfc->regs = dev_read_addr_ptr(dev);
nfc->send_clk = devm_clk_get(dev, "send"); if (IS_ERR(nfc->send_clk)) diff --git a/drivers/mtd/nand/raw/tegra_nand.c b/drivers/mtd/nand/raw/tegra_nand.c index d2801d48..316f18bc 100644 --- a/drivers/mtd/nand/raw/tegra_nand.c +++ b/drivers/mtd/nand/raw/tegra_nand.c @@ -906,7 +906,7 @@ static int fdt_decode_nand(struct udevice *dev, struct fdt_nand *config) { int err;
- config->reg = (struct nand_ctlr *)dev_read_addr(dev); + config->reg = (struct nand_ctlr *)dev_read_addr_ptr(dev); config->enabled = dev_read_enabled(dev); config->width = dev_read_u32_default(dev, "nvidia,nand-width", 8); err = gpio_request_by_name(dev, "nvidia,wp-gpios", 0, &config->wp_gpio, diff --git a/drivers/mtd/nand/raw/zynq_nand.c b/drivers/mtd/nand/raw/zynq_nand.c index 14cb2ba7..b57785d9 100644 --- a/drivers/mtd/nand/raw/zynq_nand.c +++ b/drivers/mtd/nand/raw/zynq_nand.c @@ -1085,7 +1085,7 @@ static int zynq_nand_probe(struct udevice *dev) int ondie_ecc_enabled = 0; int is_16bit_bw;
- smc->reg = (struct zynq_nand_smc_regs *)dev_read_addr(dev); + smc->reg = (struct zynq_nand_smc_regs *)dev_read_addr_ptr(dev); of_nand = dev_read_subnode(dev, "nand-controller@0,0"); if (!ofnode_valid(of_nand)) { of_nand = dev_read_subnode(dev, "flash@e1000000"); diff --git a/drivers/net/mvmdio.c b/drivers/net/mvmdio.c index 6fb8a985..c0ebcdb1 100644 --- a/drivers/net/mvmdio.c +++ b/drivers/net/mvmdio.c @@ -208,7 +208,7 @@ static int mvmdio_probe(struct udevice *dev) { struct mvmdio_priv *priv = dev_get_priv(dev);
- priv->mdio_base = (void *)dev_read_addr(dev); + priv->mdio_base = dev_read_addr_ptr(dev); priv->type = (enum mvmdio_bus_type)dev_get_driver_data(dev);
return 0; diff --git a/drivers/net/qe/dm_qe_uec_phy.c b/drivers/net/qe/dm_qe_uec_phy.c index 038b8104..e1a8bf16 100644 --- a/drivers/net/qe/dm_qe_uec_phy.c +++ b/drivers/net/qe/dm_qe_uec_phy.c @@ -97,7 +97,7 @@ static int qe_uec_mdio_probe(struct udevice *dev) u32 num = 0; int ret = -ENODEV;
- priv->base = (struct ucc_mii_mng *)dev_read_addr(dev); + priv->base = (struct ucc_mii_mng *)dev_read_addr_ptr(dev); base = (fdt_size_t)priv->base;
/* diff --git a/drivers/pci/pci-aardvark.c b/drivers/pci/pci-aardvark.c index b0fc9caa..af0e55cd 100644 --- a/drivers/pci/pci-aardvark.c +++ b/drivers/pci/pci-aardvark.c @@ -983,8 +983,8 @@ static int pcie_advk_of_to_plat(struct udevice *dev) struct pcie_advk *pcie = dev_get_priv(dev);
/* Get the register base address */ - pcie->base = (void *)dev_read_addr(dev); - if ((fdt_addr_t)pcie->base == FDT_ADDR_T_NONE) + pcie->base = dev_read_addr_ptr(dev); + if (!pcie->base) return -EINVAL;
return 0; diff --git a/drivers/phy/allwinner/phy-sun50i-usb3.c b/drivers/phy/allwinner/phy-sun50i-usb3.c index e5a3d2d9..e88df8f9 100644 --- a/drivers/phy/allwinner/phy-sun50i-usb3.c +++ b/drivers/phy/allwinner/phy-sun50i-usb3.c @@ -149,9 +149,9 @@ static int sun50i_usb3_phy_probe(struct udevice *dev) return ret; }
- priv->regs = (void __iomem *)dev_read_addr(dev); - if (IS_ERR(priv->regs)) - return PTR_ERR(priv->regs); + priv->regs = (void __iomem *)dev_read_addr_ptr(dev); + if (!priv->regs) + return -EINVAL;
return 0; } diff --git a/drivers/phy/qcom/phy-qcom-usb-hs-28nm.c b/drivers/phy/qcom/phy-qcom-usb-hs-28nm.c index 14c3d839..05a9a2cf 100644 --- a/drivers/phy/qcom/phy-qcom-usb-hs-28nm.c +++ b/drivers/phy/qcom/phy-qcom-usb-hs-28nm.c @@ -184,8 +184,8 @@ static int hsphy_probe(struct udevice *dev) struct hsphy_priv *priv = dev_get_priv(dev); int ret;
- priv->base = (void *)dev_read_addr(dev); - if ((ulong)priv->base == FDT_ADDR_T_NONE) + priv->base = dev_read_addr_ptr(dev); + if (!priv->base) return -EINVAL;
ret = reset_get_by_name(dev, "phy", &priv->phy_rst); diff --git a/drivers/phy/qcom/phy-qcom-usb-ss.c b/drivers/phy/qcom/phy-qcom-usb-ss.c index 4e816879..1b03a3c4 100644 --- a/drivers/phy/qcom/phy-qcom-usb-ss.c +++ b/drivers/phy/qcom/phy-qcom-usb-ss.c @@ -115,8 +115,8 @@ static int ssphy_probe(struct udevice *dev) struct ssphy_priv *priv = dev_get_priv(dev); int ret;
- priv->base = (void *)dev_read_addr(dev); - if ((ulong)priv->base == FDT_ADDR_T_NONE) + priv->base = dev_read_addr_ptr(dev); + if (!priv->base) return -EINVAL;
ret = ssphy_clk_init(dev, priv); diff --git a/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c b/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c index 5ae41fbe..64cf00fd 100644 --- a/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c +++ b/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c @@ -93,8 +93,8 @@ static int rockchip_p3phy_probe(struct udevice *dev) struct udevice *syscon; int ret;
- priv->mmio = (void __iomem *)dev_read_addr(dev); - if ((fdt_addr_t)priv->mmio == FDT_ADDR_T_NONE) + priv->mmio = (void __iomem *)dev_read_addr_ptr(dev); + if (!priv->mmio) return -EINVAL;
ret = uclass_get_device_by_phandle(UCLASS_SYSCON, dev, diff --git a/drivers/phy/rockchip/phy-rockchip-typec.c b/drivers/phy/rockchip/phy-rockchip-typec.c index ca63b856..c4d4d4c7 100644 --- a/drivers/phy/rockchip/phy-rockchip-typec.c +++ b/drivers/phy/rockchip/phy-rockchip-typec.c @@ -674,9 +674,9 @@ static int rockchip_tcphy_probe(struct udevice *dev) unsigned int reg; int index, ret;
- priv->reg_base = (void __iomem *)dev_read_addr(dev); - if (IS_ERR(priv->reg_base)) - return PTR_ERR(priv->reg_base); + priv->reg_base = (void __iomem *)dev_read_addr_ptr(dev); + if (!priv->reg_base) + return -EINVAL;
ret = dev_read_u32_index(dev, "reg", 1, ®); if (ret) { diff --git a/drivers/pwm/tegra_pwm.c b/drivers/pwm/tegra_pwm.c index 95fc2645..29f0ba90 100644 --- a/drivers/pwm/tegra_pwm.c +++ b/drivers/pwm/tegra_pwm.c @@ -59,7 +59,7 @@ static int tegra_pwm_of_to_plat(struct udevice *dev) { struct tegra_pwm_priv *priv = dev_get_priv(dev);
- priv->regs = (struct pwm_ctlr *)dev_read_addr(dev); + priv->regs = (struct pwm_ctlr *)dev_read_addr_ptr(dev);
return 0; } diff --git a/drivers/serial/serial_zynq.c b/drivers/serial/serial_zynq.c index 9bb9b7d3..27e283c4 100644 --- a/drivers/serial/serial_zynq.c +++ b/drivers/serial/serial_zynq.c @@ -259,9 +259,9 @@ static int zynq_serial_of_to_plat(struct udevice *dev) { struct zynq_uart_plat *plat = dev_get_plat(dev);
- plat->regs = (struct uart_zynq *)dev_read_addr(dev); - if (IS_ERR(plat->regs)) - return PTR_ERR(plat->regs); + plat->regs = (struct uart_zynq *)dev_read_addr_ptr(dev); + if (!plat->regs) + return -EINVAL;
return 0; } diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c index 6869d60d..60b850f8 100644 --- a/drivers/spi/mpc8xxx_spi.c +++ b/drivers/spi/mpc8xxx_spi.c @@ -54,7 +54,7 @@ static int mpc8xxx_spi_of_to_plat(struct udevice *dev) struct clk clk; int ret;
- priv->spi = (spi8xxx_t *)dev_read_addr(dev); + priv->spi = (spi8xxx_t *)dev_read_addr_ptr(dev);
ret = gpio_request_list_by_name(dev, "gpios", priv->gpios, ARRAY_SIZE(priv->gpios), GPIOD_IS_OUT | GPIOD_ACTIVE_LOW); diff --git a/drivers/spi/mscc_bb_spi.c b/drivers/spi/mscc_bb_spi.c index 2a01ea06..5819af5e 100644 --- a/drivers/spi/mscc_bb_spi.c +++ b/drivers/spi/mscc_bb_spi.c @@ -217,7 +217,7 @@ static int mscc_bb_spi_probe(struct udevice *bus)
debug("%s: loaded, priv %p\n", __func__, priv);
- priv->regs = (void __iomem *)dev_read_addr(bus); + priv->regs = (void __iomem *)dev_read_addr_ptr(bus);
priv->deactivate_delay_us = dev_read_u32_default(bus, "spi-deactivate-delay", 0); diff --git a/drivers/spi/sh_qspi.c b/drivers/spi/sh_qspi.c index 861423be..d5f68704 100644 --- a/drivers/spi/sh_qspi.c +++ b/drivers/spi/sh_qspi.c @@ -334,7 +334,7 @@ static int sh_qspi_of_to_plat(struct udevice *dev) { struct sh_qspi_slave *plat = dev_get_plat(dev);
- plat->regs = (struct sh_qspi_regs *)dev_read_addr(dev); + plat->regs = (struct sh_qspi_regs *)dev_read_addr_ptr(dev);
return 0; } diff --git a/drivers/spi/spi-mxic.c b/drivers/spi/spi-mxic.c index 6aae9f79..f663b9dc 100644 --- a/drivers/spi/spi-mxic.c +++ b/drivers/spi/spi-mxic.c @@ -508,7 +508,7 @@ static int mxic_spi_probe(struct udevice *bus) { struct mxic_spi_priv *priv = dev_get_priv(bus);
- priv->regs = (void *)dev_read_addr(bus); + priv->regs = dev_read_addr_ptr(bus);
priv->send_clk = devm_clk_get(bus, "send_clk"); if (IS_ERR(priv->send_clk)) diff --git a/drivers/spi/xilinx_spi.c b/drivers/spi/xilinx_spi.c index 4e9115da..72ee9214 100644 --- a/drivers/spi/xilinx_spi.c +++ b/drivers/spi/xilinx_spi.c @@ -114,7 +114,7 @@ static int xilinx_spi_probe(struct udevice *bus) struct xilinx_spi_priv *priv = dev_get_priv(bus); struct xilinx_spi_regs *regs = priv->regs;
- priv->regs = (struct xilinx_spi_regs *)dev_read_addr(bus); + priv->regs = (struct xilinx_spi_regs *)dev_read_addr_ptr(bus);
priv->fifo_depth = dev_read_u32_default(bus, "fifo-size", 0);
diff --git a/drivers/ufs/ufs.c b/drivers/ufs/ufs.c index 13e730b8..8dd29edd 100644 --- a/drivers/ufs/ufs.c +++ b/drivers/ufs/ufs.c @@ -1880,7 +1880,7 @@ int ufshcd_probe(struct udevice *ufs_dev, struct ufs_hba_ops *hba_ops)
hba->dev = ufs_dev; hba->ops = hba_ops; - hba->mmio_base = (void *)dev_read_addr(ufs_dev); + hba->mmio_base = dev_read_addr_ptr(ufs_dev);
/* Set descriptor lengths to specification defaults */ ufshcd_def_desc_sizes(hba); diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c index 76562bd7..37be1652 100644 --- a/drivers/usb/host/ehci-tegra.c +++ b/drivers/usb/host/ehci-tegra.c @@ -723,7 +723,7 @@ static int fdt_decode_usb(struct udevice *dev, struct fdt_usb *config) { const char *phy, *mode;
- config->reg = (struct usb_ctlr *)dev_read_addr(dev); + config->reg = (struct usb_ctlr *)dev_read_addr_ptr(dev); debug("reg=%p\n", config->reg); mode = dev_read_string(dev, "dr_mode"); if (mode) { diff --git a/drivers/video/dw_mipi_dsi.c b/drivers/video/dw_mipi_dsi.c index 6d9c5a94..6146a0f0 100644 --- a/drivers/video/dw_mipi_dsi.c +++ b/drivers/video/dw_mipi_dsi.c @@ -800,8 +800,8 @@ static int dw_mipi_dsi_init(struct udevice *dev, dsi->dsi_host.ops = &dw_mipi_dsi_host_ops; device->host = &dsi->dsi_host;
- dsi->base = (void *)dev_read_addr(device->dev); - if ((fdt_addr_t)dsi->base == FDT_ADDR_T_NONE) { + dsi->base = dev_read_addr_ptr(device->dev); + if (!dsi->base) { dev_err(device->dev, "dsi dt register address error\n"); return -EINVAL; } diff --git a/drivers/video/rockchip/rk_vop.c b/drivers/video/rockchip/rk_vop.c index bc98ab68..246eb10c 100644 --- a/drivers/video/rockchip/rk_vop.c +++ b/drivers/video/rockchip/rk_vop.c @@ -446,7 +446,7 @@ int rk_vop_probe(struct udevice *dev) efi_add_memory_map(plat->base, plat->size, EFI_RESERVED_MEMORY_TYPE); #endif
- priv->regs = (struct rk3288_vop *)dev_read_addr(dev); + priv->regs = (struct rk3288_vop *)dev_read_addr_ptr(dev);
/* * Try all the ports until we find one that works. In practice this diff --git a/drivers/video/stm32/stm32_dsi.c b/drivers/video/stm32/stm32_dsi.c index e6347bb8..a7420fb2 100644 --- a/drivers/video/stm32/stm32_dsi.c +++ b/drivers/video/stm32/stm32_dsi.c @@ -427,8 +427,8 @@ static int stm32_dsi_probe(struct udevice *dev)
device->dev = dev;
- priv->base = (void *)dev_read_addr(dev); - if ((fdt_addr_t)priv->base == FDT_ADDR_T_NONE) { + priv->base = dev_read_addr_ptr(dev); + if (!priv->base) { dev_err(dev, "dsi dt register address error\n"); return -EINVAL; } diff --git a/drivers/video/stm32/stm32_ltdc.c b/drivers/video/stm32/stm32_ltdc.c index 58b6434a..f48badc5 100644 --- a/drivers/video/stm32/stm32_ltdc.c +++ b/drivers/video/stm32/stm32_ltdc.c @@ -507,8 +507,8 @@ static int stm32_ltdc_probe(struct udevice *dev) ulong rate; int ret;
- priv->regs = (void *)dev_read_addr(dev); - if ((fdt_addr_t)priv->regs == FDT_ADDR_T_NONE) { + priv->regs = dev_read_addr_ptr(dev); + if (!priv->regs) { dev_err(dev, "ltdc dt register address error\n"); return -EINVAL; } diff --git a/drivers/video/tegra124/display.c b/drivers/video/tegra124/display.c index 78ab3f99..e769b31b 100644 --- a/drivers/video/tegra124/display.c +++ b/drivers/video/tegra124/display.c @@ -361,7 +361,7 @@ static int display_init(struct udevice *dev, void *lcdbase, return ret; }
- dc_ctlr = (struct dc_ctlr *)dev_read_addr(dev); + dc_ctlr = (struct dc_ctlr *)dev_read_addr_ptr(dev); if (ofnode_decode_display_timing(dev_ofnode(dev), 0, timing)) { debug("%s: Failed to decode display timing\n", __func__); return -EINVAL; diff --git a/drivers/video/tegra124/sor.c b/drivers/video/tegra124/sor.c index ef1a2e6d..96854b7a 100644 --- a/drivers/video/tegra124/sor.c +++ b/drivers/video/tegra124/sor.c @@ -765,7 +765,7 @@ int tegra_dc_sor_attach(struct udevice *dc_dev, struct udevice *dev,
/* Use the first display controller */ debug("%s\n", __func__); - disp_ctrl = (struct dc_ctlr *)dev_read_addr(dc_dev); + disp_ctrl = (struct dc_ctlr *)dev_read_addr_ptr(dc_dev);
tegra_dc_sor_enable_dc(disp_ctrl); tegra_dc_sor_config_panel(sor, 0, link_cfg, timing); @@ -978,7 +978,7 @@ int tegra_dc_sor_detach(struct udevice *dc_dev, struct udevice *dev)
debug("%s\n", __func__); /* Use the first display controller */ - disp_ctrl = (struct dc_ctlr *)dev_read_addr(dev); + disp_ctrl = (struct dc_ctlr *)dev_read_addr_ptr(dev);
/* Sleep mode */ tegra_sor_writel(sor, SUPER_STATE1, SUPER_STATE1_ASY_HEAD_OP_SLEEP | @@ -1047,7 +1047,7 @@ static int tegra_sor_of_to_plat(struct udevice *dev) struct tegra_dc_sor_data *priv = dev_get_priv(dev); int ret;
- priv->base = (void *)dev_read_addr(dev); + priv->base = dev_read_addr_ptr(dev);
priv->pmc_base = (void *)syscon_get_first_range(TEGRA_SYSCON_PMC); if (IS_ERR(priv->pmc_base)) diff --git a/drivers/video/ti/tilcdc.c b/drivers/video/ti/tilcdc.c index 88043fc1..69bd78f2 100644 --- a/drivers/video/ti/tilcdc.c +++ b/drivers/video/ti/tilcdc.c @@ -387,8 +387,8 @@ static int tilcdc_of_to_plat(struct udevice *dev) { struct tilcdc_priv *priv = dev_get_priv(dev);
- priv->regs = (struct tilcdc_regs *)dev_read_addr(dev); - if ((fdt_addr_t)priv->regs == FDT_ADDR_T_NONE) { + priv->regs = (struct tilcdc_regs *)dev_read_addr_ptr(dev); + if (!priv->regs) { dev_err(dev, "failed to get base address\n"); return -EINVAL; } diff --git a/drivers/watchdog/cdns_wdt.c b/drivers/watchdog/cdns_wdt.c index 6dfdd31c..a6537c1a 100644 --- a/drivers/watchdog/cdns_wdt.c +++ b/drivers/watchdog/cdns_wdt.c @@ -271,9 +271,9 @@ static int cdns_wdt_of_to_plat(struct udevice *dev) { struct cdns_wdt_priv *priv = dev_get_priv(dev);
- priv->regs = (struct cdns_regs *)dev_read_addr(dev); - if (IS_ERR(priv->regs)) - return PTR_ERR(priv->regs); + priv->regs = (struct cdns_regs *)dev_read_addr_ptr(dev); + if (!priv->regs) + return -EINVAL;
priv->rst = dev_read_bool(dev, "reset-on-timeout");
diff --git a/drivers/watchdog/sp805_wdt.c b/drivers/watchdog/sp805_wdt.c index 0d6fb120..e4e0797c 100644 --- a/drivers/watchdog/sp805_wdt.c +++ b/drivers/watchdog/sp805_wdt.c @@ -116,9 +116,9 @@ static int sp805_wdt_of_to_plat(struct udevice *dev) struct sp805_wdt_priv *priv = dev_get_priv(dev); struct clk clk;
- priv->reg = (void __iomem *)dev_read_addr(dev); - if (IS_ERR(priv->reg)) - return PTR_ERR(priv->reg); + priv->reg = (void __iomem *)dev_read_addr_ptr(dev); + if (!priv->reg) + return -EINVAL;
if (!clk_get_by_index(dev, 0, &clk)) priv->clk_rate = clk_get_rate(&clk); diff --git a/drivers/watchdog/xilinx_tb_wdt.c b/drivers/watchdog/xilinx_tb_wdt.c index 1687a459..9dce5a99 100644 --- a/drivers/watchdog/xilinx_tb_wdt.c +++ b/drivers/watchdog/xilinx_tb_wdt.c @@ -94,9 +94,9 @@ static int xlnx_wdt_of_to_plat(struct udevice *dev) { struct xlnx_wdt_plat *plat = dev_get_plat(dev);
- plat->regs = (struct watchdog_regs *)dev_read_addr(dev); - if (IS_ERR(plat->regs)) - return PTR_ERR(plat->regs); + plat->regs = (struct watchdog_regs *)dev_read_addr_ptr(dev); + if (!plat->regs) + return -EINVAL;
plat->enable_once = dev_read_u32_default(dev, "xlnx,wdt-enable-once", 0); -- 2.20.1

On Tue, 28 Feb 2023 at 14:21, Johan Jonker jbx6244@gmail.com wrote:
The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU can expect 64-bit data from the device tree parser, so use dev_read_addr_ptr instead of the dev_read_addr function in the various files in the drivers directory that cast to a pointer.
Signed-off-by: Johan Jonker jbx6244@gmail.com
Changed V2: rebase fix typo fix more files
arch/arm/mach-mvebu/system-controller.c | 4 ++-- doc/develop/driver-model/livetree.rst | 2 +- drivers/ata/dwc_ahsata.c | 2 +- drivers/cache/cache-l2x0.c | 2 +- drivers/cache/cache-v5l2.c | 2 +- drivers/gpio/mscc_sgpio.c | 2 +- drivers/gpio/tegra_gpio.c | 4 ++-- drivers/gpio/xilinx_gpio.c | 2 +- drivers/i2c/i2c-cdns.c | 2 +- drivers/i2c/tegra_i2c.c | 4 ++-- drivers/mmc/am654_sdhci.c | 2 +- drivers/mmc/davinci_mmc.c | 2 +- drivers/mmc/piton_mmc.c | 2 +- drivers/mmc/tegra_mmc.c | 2 +- drivers/mmc/zynq_sdhci.c | 6 +++--- drivers/mtd/nand/raw/arasan_nfc.c | 2 +- drivers/mtd/nand/raw/cortina_nand.c | 2 +- drivers/mtd/nand/raw/mxic_nand.c | 2 +- drivers/mtd/nand/raw/tegra_nand.c | 2 +- drivers/mtd/nand/raw/zynq_nand.c | 2 +- drivers/net/mvmdio.c | 2 +- drivers/net/qe/dm_qe_uec_phy.c | 2 +- drivers/pci/pci-aardvark.c | 4 ++-- drivers/phy/allwinner/phy-sun50i-usb3.c | 6 +++--- drivers/phy/qcom/phy-qcom-usb-hs-28nm.c | 4 ++-- drivers/phy/qcom/phy-qcom-usb-ss.c | 4 ++-- drivers/phy/rockchip/phy-rockchip-snps-pcie3.c | 4 ++-- drivers/phy/rockchip/phy-rockchip-typec.c | 6 +++--- drivers/pwm/tegra_pwm.c | 2 +- drivers/serial/serial_zynq.c | 6 +++--- drivers/spi/mpc8xxx_spi.c | 2 +- drivers/spi/mscc_bb_spi.c | 2 +- drivers/spi/sh_qspi.c | 2 +- drivers/spi/spi-mxic.c | 2 +- drivers/spi/xilinx_spi.c | 2 +- drivers/ufs/ufs.c | 2 +- drivers/usb/host/ehci-tegra.c | 2 +- drivers/video/dw_mipi_dsi.c | 4 ++-- drivers/video/rockchip/rk_vop.c | 2 +- drivers/video/stm32/stm32_dsi.c | 4 ++-- drivers/video/stm32/stm32_ltdc.c | 4 ++-- drivers/video/tegra124/display.c | 2 +- drivers/video/tegra124/sor.c | 6 +++--- drivers/video/ti/tilcdc.c | 4 ++-- drivers/watchdog/cdns_wdt.c | 6 +++--- drivers/watchdog/sp805_wdt.c | 6 +++--- drivers/watchdog/xilinx_tb_wdt.c | 6 +++--- 47 files changed, 74 insertions(+), 74 deletions(-)
Reviewed-by: Simon Glass sjg@chromium.org
(you can drop the casts too)

The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU can expect 64-bit data from the device tree parser, so use devfdt_get_addr_size_index_ptr instead of the devfdt_get_addr_size_index function in the various files in the drivers directory that cast to a pointer.
Signed-off-by: Johan Jonker jbx6244@gmail.com Reviewed-by: Michael Trimarchi michael@amarulasolutions.com --- drivers/pci/pcie_dw_mvebu.c | 6 +++--- drivers/spi/cadence_qspi.c | 3 +-- 2 files changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/pci/pcie_dw_mvebu.c b/drivers/pci/pcie_dw_mvebu.c index a0b82c78..3b2ada54 100644 --- a/drivers/pci/pcie_dw_mvebu.c +++ b/drivers/pci/pcie_dw_mvebu.c @@ -569,9 +569,9 @@ static int pcie_dw_mvebu_of_to_plat(struct udevice *dev) return -EINVAL;
/* Get the config space base address and size */ - pcie->cfg_base = (void *)devfdt_get_addr_size_index(dev, 1, - &pcie->cfg_size); - if ((fdt_addr_t)pcie->cfg_base == FDT_ADDR_T_NONE) + pcie->cfg_base = devfdt_get_addr_size_index_ptr(dev, 1, + &pcie->cfg_size); + if (!pcie->cfg_base) return -EINVAL;
return 0; diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c index c7f10c50..6a52676a 100644 --- a/drivers/spi/cadence_qspi.c +++ b/drivers/spi/cadence_qspi.c @@ -384,8 +384,7 @@ static int cadence_spi_of_to_plat(struct udevice *bus) ofnode subnode;
plat->regbase = (void *)devfdt_get_addr_index(bus, 0); - plat->ahbbase = (void *)devfdt_get_addr_size_index(bus, 1, - &plat->ahbsize); + plat->ahbbase = devfdt_get_addr_size_index_ptr(bus, 1, &plat->ahbsize); plat->is_decoded_cs = dev_read_bool(bus, "cdns,is-decoded-cs"); plat->fifo_depth = dev_read_u32_default(bus, "cdns,fifo-depth", 128); plat->fifo_width = dev_read_u32_default(bus, "cdns,fifo-width", 4); -- 2.20.1

The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU can expect 64-bit data from the device tree parser, so use devfdt_get_addr_index_ptr instead of the devfdt_get_addr_index function in the various files in the drivers directory that cast to a pointer.
Signed-off-by: Johan Jonker jbx6244@gmail.com --- drivers/clk/clk-hsdk-cgu.c | 4 ++-- drivers/ddr/altera/sdram_gen5.c | 2 +- drivers/mmc/xenon_sdhci.c | 2 +- drivers/net/mvpp2.c | 24 ++++++++++++------------ drivers/pci/pcie_dw_mvebu.c | 4 ++-- drivers/pci/pcie_imx.c | 4 ++-- drivers/pci/pcie_layerscape_ep.c | 4 ++-- drivers/phy/marvell/comphy_core.c | 12 ++++++------ drivers/spi/cadence_qspi.c | 2 +- drivers/usb/musb-new/ti-musb.c | 2 +- 10 files changed, 30 insertions(+), 30 deletions(-)
diff --git a/drivers/clk/clk-hsdk-cgu.c b/drivers/clk/clk-hsdk-cgu.c index 26b0aa9a..cf3d0fd3 100644 --- a/drivers/clk/clk-hsdk-cgu.c +++ b/drivers/clk/clk-hsdk-cgu.c @@ -753,11 +753,11 @@ static int hsdk_cgu_clk_probe(struct udevice *dev) else hsdk_clk->map = hsdk_4xd_clk_map;
- hsdk_clk->cgu_regs = (void __iomem *)devfdt_get_addr_index(dev, 0); + hsdk_clk->cgu_regs = (void __iomem *)devfdt_get_addr_index_ptr(dev, 0); if (!hsdk_clk->cgu_regs) return -EINVAL;
- hsdk_clk->creg_regs = (void __iomem *)devfdt_get_addr_index(dev, 1); + hsdk_clk->creg_regs = (void __iomem *)devfdt_get_addr_index_ptr(dev, 1); if (!hsdk_clk->creg_regs) return -EINVAL;
diff --git a/drivers/ddr/altera/sdram_gen5.c b/drivers/ddr/altera/sdram_gen5.c index 8d3ce495..2cdfdd42 100644 --- a/drivers/ddr/altera/sdram_gen5.c +++ b/drivers/ddr/altera/sdram_gen5.c @@ -567,7 +567,7 @@ static int altera_gen5_sdram_of_to_plat(struct udevice *dev) { struct altera_gen5_sdram_plat *plat = dev_get_plat(dev);
- plat->sdr = (struct socfpga_sdr *)devfdt_get_addr_index(dev, 0); + plat->sdr = (struct socfpga_sdr *)devfdt_get_addr_index_ptr(dev, 0); if (!plat->sdr) return -ENODEV;
diff --git a/drivers/mmc/xenon_sdhci.c b/drivers/mmc/xenon_sdhci.c index 2f880509..16ac84a2 100644 --- a/drivers/mmc/xenon_sdhci.c +++ b/drivers/mmc/xenon_sdhci.c @@ -537,7 +537,7 @@ static int xenon_sdhci_of_to_plat(struct udevice *dev) host->ioaddr = dev_read_addr_ptr(dev);
if (device_is_compatible(dev, "marvell,armada-3700-sdhci")) - priv->pad_ctrl_reg = (void *)devfdt_get_addr_index(dev, 1); + priv->pad_ctrl_reg = devfdt_get_addr_index_ptr(dev, 1);
name = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "marvell,pad-type", NULL); diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c index 1bad50d3..76471901 100644 --- a/drivers/net/mvpp2.c +++ b/drivers/net/mvpp2.c @@ -5349,18 +5349,18 @@ static int mvpp2_base_probe(struct udevice *dev) }
/* Save base addresses for later use */ - priv->base = (void *)devfdt_get_addr_index(dev, 0); - if (IS_ERR(priv->base)) - return PTR_ERR(priv->base); + priv->base = devfdt_get_addr_index_ptr(dev, 0); + if (!priv->base) + return -EINVAL;
if (priv->hw_version == MVPP21) { - priv->lms_base = (void *)devfdt_get_addr_index(dev, 1); - if (IS_ERR(priv->lms_base)) - return PTR_ERR(priv->lms_base); + priv->lms_base = devfdt_get_addr_index_ptr(dev, 1); + if (!priv->lms_base) + return -EINVAL; } else { - priv->iface_base = (void *)devfdt_get_addr_index(dev, 1); - if (IS_ERR(priv->iface_base)) - return PTR_ERR(priv->iface_base); + priv->iface_base = devfdt_get_addr_index_ptr(dev, 1); + if (!priv->iface_base) + return -EINVAL;
/* Store common base addresses for all ports */ priv->mpcs_base = priv->iface_base + MVPP22_MPCS; @@ -5399,10 +5399,10 @@ static int mvpp2_probe(struct udevice *dev) if (priv->hw_version == MVPP21) { int priv_common_regs_num = 2;
- port->base = (void __iomem *)devfdt_get_addr_index( + port->base = (void __iomem *)devfdt_get_addr_index_ptr( dev->parent, priv_common_regs_num + port->id); - if (IS_ERR(port->base)) - return PTR_ERR(port->base); + if (!port->base) + return -EINVAL; } else { port->gop_id = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), "gop-port-id", -1); diff --git a/drivers/pci/pcie_dw_mvebu.c b/drivers/pci/pcie_dw_mvebu.c index 3b2ada54..c41f3f15 100644 --- a/drivers/pci/pcie_dw_mvebu.c +++ b/drivers/pci/pcie_dw_mvebu.c @@ -564,8 +564,8 @@ static int pcie_dw_mvebu_of_to_plat(struct udevice *dev) struct pcie_dw_mvebu *pcie = dev_get_priv(dev);
/* Get the controller base address */ - pcie->ctrl_base = (void *)devfdt_get_addr_index(dev, 0); - if ((fdt_addr_t)pcie->ctrl_base == FDT_ADDR_T_NONE) + pcie->ctrl_base = devfdt_get_addr_index_ptr(dev, 0); + if (!pcie->ctrl_base) return -EINVAL;
/* Get the config space base address and size */ diff --git a/drivers/pci/pcie_imx.c b/drivers/pci/pcie_imx.c index da484664..bf1ca5b6 100644 --- a/drivers/pci/pcie_imx.c +++ b/drivers/pci/pcie_imx.c @@ -751,8 +751,8 @@ static int imx_pcie_of_to_plat(struct udevice *dev) { struct imx_pcie_priv *priv = dev_get_priv(dev);
- priv->dbi_base = (void __iomem *)devfdt_get_addr_index(dev, 0); - priv->cfg_base = (void __iomem *)devfdt_get_addr_index(dev, 1); + priv->dbi_base = (void __iomem *)devfdt_get_addr_index_ptr(dev, 0); + priv->cfg_base = (void __iomem *)devfdt_get_addr_index_ptr(dev, 1); if (!priv->dbi_base || !priv->cfg_base) return -EINVAL;
diff --git a/drivers/pci/pcie_layerscape_ep.c b/drivers/pci/pcie_layerscape_ep.c index ff26a5cd..f4a0d1f2 100644 --- a/drivers/pci/pcie_layerscape_ep.c +++ b/drivers/pci/pcie_layerscape_ep.c @@ -250,11 +250,11 @@ static int ls_pcie_ep_probe(struct udevice *dev)
pcie_ep->pcie = pcie;
- pcie->dbi = (void __iomem *)devfdt_get_addr_index(dev, 0); + pcie->dbi = (void __iomem *)devfdt_get_addr_index_ptr(dev, 0); if (!pcie->dbi) return -ENOMEM;
- pcie->ctrl = (void __iomem *)devfdt_get_addr_index(dev, 1); + pcie->ctrl = (void __iomem *)devfdt_get_addr_index_ptr(dev, 1); if (!pcie->ctrl) return -ENOMEM;
diff --git a/drivers/phy/marvell/comphy_core.c b/drivers/phy/marvell/comphy_core.c index df2460db..7272dfb9 100644 --- a/drivers/phy/marvell/comphy_core.c +++ b/drivers/phy/marvell/comphy_core.c @@ -88,13 +88,13 @@ static int comphy_probe(struct udevice *dev) int res;
/* Save base addresses for later use */ - chip_cfg->comphy_base_addr = (void *)devfdt_get_addr_index(dev, 0); - if (IS_ERR(chip_cfg->comphy_base_addr)) - return PTR_ERR(chip_cfg->comphy_base_addr); + chip_cfg->comphy_base_addr = devfdt_get_addr_index_ptr(dev, 0); + if (!chip_cfg->comphy_base_addr) + return -EINVAL;
- chip_cfg->hpipe3_base_addr = (void *)devfdt_get_addr_index(dev, 1); - if (IS_ERR(chip_cfg->hpipe3_base_addr)) - return PTR_ERR(chip_cfg->hpipe3_base_addr); + chip_cfg->hpipe3_base_addr = devfdt_get_addr_index_ptr(dev, 1); + if (!chip_cfg->hpipe3_base_addr) + return -EINVAL;
if (device_is_compatible(dev, "marvell,comphy-a3700")) { chip_cfg->comphy_init_map = comphy_a3700_init_serdes_map; diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c index 6a52676a..92e80506 100644 --- a/drivers/spi/cadence_qspi.c +++ b/drivers/spi/cadence_qspi.c @@ -383,7 +383,7 @@ static int cadence_spi_of_to_plat(struct udevice *bus) struct cadence_spi_priv *priv = dev_get_priv(bus); ofnode subnode;
- plat->regbase = (void *)devfdt_get_addr_index(bus, 0); + plat->regbase = devfdt_get_addr_index_ptr(bus, 0); plat->ahbbase = devfdt_get_addr_size_index_ptr(bus, 1, &plat->ahbsize); plat->is_decoded_cs = dev_read_bool(bus, "cdns,is-decoded-cs"); plat->fifo_depth = dev_read_u32_default(bus, "cdns,fifo-depth", 128); diff --git a/drivers/usb/musb-new/ti-musb.c b/drivers/usb/musb-new/ti-musb.c index 91042935..3be3f93d 100644 --- a/drivers/usb/musb-new/ti-musb.c +++ b/drivers/usb/musb-new/ti-musb.c @@ -88,7 +88,7 @@ static int ti_musb_of_to_plat(struct udevice *dev) int usb_index; struct musb_hdrc_config *musb_config;
- plat->base = (void *)devfdt_get_addr_index(dev, 1); + plat->base = devfdt_get_addr_index_ptr(dev, 1);
phys = fdtdec_lookup_phandle(fdt, node, "phys"); ctrl_mod = fdtdec_lookup_phandle(fdt, phys, "ti,ctrl_mod"); -- 2.20.1

On Tue, 28 Feb 2023 at 14:21, Johan Jonker jbx6244@gmail.com wrote:
The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU can expect 64-bit data from the device tree parser, so use devfdt_get_addr_index_ptr instead of the devfdt_get_addr_index function in the various files in the drivers directory that cast to a pointer.
Signed-off-by: Johan Jonker jbx6244@gmail.com
drivers/clk/clk-hsdk-cgu.c | 4 ++-- drivers/ddr/altera/sdram_gen5.c | 2 +- drivers/mmc/xenon_sdhci.c | 2 +- drivers/net/mvpp2.c | 24 ++++++++++++------------ drivers/pci/pcie_dw_mvebu.c | 4 ++-- drivers/pci/pcie_imx.c | 4 ++-- drivers/pci/pcie_layerscape_ep.c | 4 ++-- drivers/phy/marvell/comphy_core.c | 12 ++++++------ drivers/spi/cadence_qspi.c | 2 +- drivers/usb/musb-new/ti-musb.c | 2 +- 10 files changed, 30 insertions(+), 30 deletions(-)
Reviewed-by: Simon Glass sjg@chromium.org

The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU can expect 64-bit data from the device tree parser, so use devfdt_get_addr_ptr instead of the devfdt_get_addr function in the various files in the drivers directory that cast to a pointer.
Signed-off-by: Johan Jonker jbx6244@gmail.com ---
Changed V5: new patch --- doc/develop/driver-model/livetree.rst | 2 +- drivers/clk/at91/sama7g5.c | 2 +- drivers/clk/at91/sckc.c | 2 +- drivers/spi/mtk_snor.c | 2 +- drivers/spi/mtk_spim.c | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/doc/develop/driver-model/livetree.rst b/doc/develop/driver-model/livetree.rst index e9149d73..07264660 100644 --- a/doc/develop/driver-model/livetree.rst +++ b/doc/develop/driver-model/livetree.rst @@ -94,7 +94,7 @@ For example, the old code may be like this: const void *blob = gd->fdt_blob; int node = dev_of_offset(bus);
- i2c_bus->regs = (struct i2c_ctlr *)devfdt_get_addr(dev); + i2c_bus->regs = (struct i2c_ctlr *)devfdt_get_addr_ptr(dev); plat->frequency = fdtdec_get_int(blob, node, "spi-max-frequency", 500000);
The new code is: diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c index d1ec3c82..d00016b3 100644 --- a/drivers/clk/at91/sama7g5.c +++ b/drivers/clk/at91/sama7g5.c @@ -1114,7 +1114,7 @@ static const struct pmc_clk_setup {
static int sama7g5_clk_probe(struct udevice *dev) { - void __iomem *base = (void *)devfdt_get_addr(dev); + void __iomem *base = (void __iomem *)devfdt_get_addr_ptr(dev); unsigned int *clkmuxallocs[SAMA7G5_MAX_MUX_ALLOCS]; unsigned int *muxallocs[SAMA7G5_MAX_MUX_ALLOCS]; const char *p[10]; diff --git a/drivers/clk/at91/sckc.c b/drivers/clk/at91/sckc.c index 34ce611a..4a0ae983 100644 --- a/drivers/clk/at91/sckc.c +++ b/drivers/clk/at91/sckc.c @@ -123,7 +123,7 @@ U_BOOT_DRIVER(at91_sam9x60_td_slck) = { static int at91_sam9x60_sckc_probe(struct udevice *dev) { struct sam9x60_sckc *sckc = dev_get_priv(dev); - void __iomem *base = (void *)devfdt_get_addr(dev); + void __iomem *base = (void __iomem *)devfdt_get_addr_ptr(dev); const char *slow_rc_osc, *slow_osc; const char *parents[2]; struct clk *clk, c; diff --git a/drivers/spi/mtk_snor.c b/drivers/spi/mtk_snor.c index 04f588a7..1dc55052 100644 --- a/drivers/spi/mtk_snor.c +++ b/drivers/spi/mtk_snor.c @@ -470,7 +470,7 @@ static int mtk_snor_probe(struct udevice *bus) int ret; u32 reg;
- priv->base = (void __iomem *)devfdt_get_addr(bus); + priv->base = (void __iomem *)devfdt_get_addr_ptr(bus); if (!priv->base) return -EINVAL;
diff --git a/drivers/spi/mtk_spim.c b/drivers/spi/mtk_spim.c index a7c0fc59..03275346 100644 --- a/drivers/spi/mtk_spim.c +++ b/drivers/spi/mtk_spim.c @@ -641,7 +641,7 @@ static int mtk_spim_probe(struct udevice *dev) struct mtk_spim_priv *priv = dev_get_priv(dev); int ret;
- priv->base = (void __iomem *)devfdt_get_addr(dev); + priv->base = (void __iomem *)devfdt_get_addr_ptr(dev); if (!priv->base) return -EINVAL;
-- 2.20.1

On Tue, 28 Feb 2023 at 14:21, Johan Jonker jbx6244@gmail.com wrote:
The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU can expect 64-bit data from the device tree parser, so use devfdt_get_addr_ptr instead of the devfdt_get_addr function in the various files in the drivers directory that cast to a pointer.
Signed-off-by: Johan Jonker jbx6244@gmail.com
Changed V5: new patch
doc/develop/driver-model/livetree.rst | 2 +- drivers/clk/at91/sama7g5.c | 2 +- drivers/clk/at91/sckc.c | 2 +- drivers/spi/mtk_snor.c | 2 +- drivers/spi/mtk_spim.c | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-)
Reviewed-by: Simon Glass sjg@chromium.org

The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU can expect 64-bit data from the device tree parser, so fix some debug strings with fdt_addr_t to be able to handle both sizes.
Signed-off-by: Johan Jonker jbx6244@gmail.com ---
Changed V5: new patch --- arch/arm/mach-mvebu/cpu.c | 2 +- drivers/clk/ti/clk-ctrl.c | 9 +++++---- drivers/phy/phy-stm32-usbphyc.c | 4 ++-- 3 files changed, 8 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c index 329d1369..f58689e1 100644 --- a/arch/arm/mach-mvebu/cpu.c +++ b/arch/arm/mach-mvebu/cpu.c @@ -631,7 +631,7 @@ int board_xhci_enable(fdt_addr_t base) { const struct mbus_dram_target_info *dram;
- printf("MVEBU XHCI INIT controller @ 0x%lx\n", base); + printf("MVEBU XHCI INIT controller @ 0x%llx\n", (fdt64_t)base);
dram = mvebu_mbus_dram_info(); xhci_mvebu_mbus_config((void __iomem *)base, dram); diff --git a/drivers/clk/ti/clk-ctrl.c b/drivers/clk/ti/clk-ctrl.c index 6cc02d2e..8926e57e 100644 --- a/drivers/clk/ti/clk-ctrl.c +++ b/drivers/clk/ti/clk-ctrl.c @@ -44,7 +44,7 @@ static int clk_ti_ctrl_disable(struct clk *clk) offs = priv->offs[0].start + clk->id; err = clk_ti_ctrl_check_offs(clk, offs); if (err) { - dev_err(clk->dev, "invalid offset: 0x%lx\n", offs); + dev_err(clk->dev, "invalid offset: 0x%llx\n", (fdt64_t)offs); return err; }
@@ -64,7 +64,7 @@ static int clk_ti_ctrl_enable(struct clk *clk) offs = priv->offs[0].start + clk->id; err = clk_ti_ctrl_check_offs(clk, offs); if (err) { - dev_err(clk->dev, "invalid offset: 0x%lx\n", offs); + dev_err(clk->dev, "invalid offset: 0x%llx\n", (fdt64_t)offs); return err; }
@@ -125,8 +125,9 @@ static int clk_ti_ctrl_of_to_plat(struct udevice *dev) }
priv->offs[i].end = priv->offs[i].start + fdt_size; - dev_dbg(dev, "start=0x%08lx, end=0x%08lx\n", - priv->offs[i].start, priv->offs[i].end); + dev_dbg(dev, "start=0x%016llx, end=0x%016llx\n", + (fdt64_t)priv->offs[i].start, + (fdt64_t)priv->offs[i].end); }
return 0; diff --git a/drivers/phy/phy-stm32-usbphyc.c b/drivers/phy/phy-stm32-usbphyc.c index dcf2194e..15bd60ca 100644 --- a/drivers/phy/phy-stm32-usbphyc.c +++ b/drivers/phy/phy-stm32-usbphyc.c @@ -583,8 +583,8 @@ static int stm32_usbphyc_probe(struct udevice *dev)
phy_id = ofnode_read_u32_default(node, "reg", FDT_ADDR_T_NONE); if (phy_id >= MAX_PHYS) { - dev_err(dev, "invalid reg value %lx for %s\n", - phy_id, ofnode_get_name(node)); + dev_err(dev, "invalid reg value %llx for %s\n", + (fdt64_t)phy_id, ofnode_get_name(node)); return -ENOENT; }
-- 2.20.1

On Tue, 28 Feb 2023 at 14:22, Johan Jonker jbx6244@gmail.com wrote:
The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU can expect 64-bit data from the device tree parser, so fix some debug strings with fdt_addr_t to be able to handle both sizes.
Signed-off-by: Johan Jonker jbx6244@gmail.com
Changed V5: new patch
arch/arm/mach-mvebu/cpu.c | 2 +- drivers/clk/ti/clk-ctrl.c | 9 +++++---- drivers/phy/phy-stm32-usbphyc.c | 4 ++-- 3 files changed, 8 insertions(+), 7 deletions(-)
Reviewed-by: Simon Glass sjg@chromium.org

The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU can expect 64-bit data from the device tree parser, so fix ofnode_get_addr_size function with fdt_addr_t input to be able to handle both sizes for stm32mp SoC in spl.c file.
Signed-off-by: Johan Jonker jbx6244@gmail.com --- arch/arm/mach-stm32mp/spl.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-stm32mp/spl.c b/arch/arm/mach-stm32mp/spl.c index 19d9fe04..6b26641b 100644 --- a/arch/arm/mach-stm32mp/spl.c +++ b/arch/arm/mach-stm32mp/spl.c @@ -112,7 +112,7 @@ uint32_t stm32mp_get_dram_size(void)
static int optee_get_reserved_memory(uint32_t *start, uint32_t *size) { - phys_size_t fdt_mem_size; + fdt_addr_t fdt_mem_size; fdt_addr_t fdt_start; ofnode node;
@@ -121,8 +121,8 @@ static int optee_get_reserved_memory(uint32_t *start, uint32_t *size) return 0;
fdt_start = ofnode_get_addr_size(node, "reg", &fdt_mem_size); - *start = fdt_start; - *size = fdt_mem_size; + *start = (uint32_t)fdt_start; + *size = (uint32_t)fdt_mem_size; return (fdt_start < 0) ? fdt_start : 0; }
-- 2.20.1

The DT specification supports CPUs with both 32-bit and 64-bit addressing capabilities. In U-boot the fdt_addr_t and phys_addr_t size are coupled by a typedef. The MTD NAND drivers for 32-bit CPU's can describe partitions with a 64-bit reg property. These partitions synced from Linux end up with the wrong offset and sizes when only the lower 32-bit is passed. Decouple the fdt_addr_t and phys_addr_t size as they don't necessary match.
Signed-off-by: Johan Jonker jbx6244@gmail.com Reviewed-by: Simon Glass sjg@chromium.org Reviewed-by: Kever Yang kever.yang@rock-chips.com ---
Note: Due to the large number of references to fdt_addr_t this patch serie fixes only some bugs, but not all. Apply only when all remaining errors and warnings due to this patch are fixed. Help with testing/debug appreciated. --- Kconfig | 8 ++++++++ include/fdtdec.h | 13 +++++++++---- 2 files changed, 17 insertions(+), 4 deletions(-)
diff --git a/Kconfig b/Kconfig index a75cce7e..7697dade 100644 --- a/Kconfig +++ b/Kconfig @@ -422,11 +422,19 @@ endif # EXPERT
config PHYS_64BIT bool "64bit physical address support" + select FDT_64BIT help Say Y here to support 64bit physical memory address. This can be used not only for 64bit SoCs, but also for large physical address extension on 32bit SoCs.
+config FDT_64BIT + bool "64bit fdt address support" + help + Say Y here to support 64bit fdt addresses. + This can be used not only for 64bit SoCs, but also + for large address extensions on 32bit SoCs. + config HAS_ROM bool select BINMAN diff --git a/include/fdtdec.h b/include/fdtdec.h index aa61a0fc..6b768ed5 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -18,15 +18,18 @@ #include <pci.h>
/* - * A typedef for a physical address. Note that fdt data is always big + * Support for 64bit fdt addresses. + * This can be used not only for 64bit SoCs, but also + * for large address extensions on 32bit SoCs. + * Note that fdt data is always big * endian even on a litle endian machine. */ -typedef phys_addr_t fdt_addr_t; -typedef phys_size_t fdt_size_t;
#define FDT_SIZE_T_NONE (-1U)
-#ifdef CONFIG_PHYS_64BIT +#ifdef CONFIG_FDT_64BIT +typedef u64 fdt_addr_t; +typedef u64 fdt_size_t; #define FDT_ADDR_T_NONE ((ulong)(-1))
#define fdt_addr_to_cpu(reg) be64_to_cpu(reg) @@ -35,6 +38,8 @@ typedef phys_size_t fdt_size_t; #define cpu_to_fdt_size(reg) cpu_to_be64(reg) typedef fdt64_t fdt_val_t; #else +typedef u32 fdt_addr_t; +typedef u32 fdt_size_t; #define FDT_ADDR_T_NONE (-1U)
#define fdt_addr_to_cpu(reg) be32_to_cpu(reg) -- 2.20.1
participants (2)
-
Johan Jonker
-
Simon Glass