Use device tree and UCLASS_IRQ driver to get following Generic Interrupt Controller (GIC) details,

-GIC Distributor interface (GICD) base address and -GIC Redistributors (GICR) base address.

Signed-off-by: Rayagonda Kokatanur rayagonda.kokatanur@broadcom.com --- Changes from v1: -Address review comments from Tom Rini, Fix build warning messages.

arch/arm/lib/gic-v3-its.c | 73 +++++++++++++++++++++++++++++++++++---- 1 file changed, 66 insertions(+), 7 deletions(-)

diff --git a/arch/arm/lib/gic-v3-its.c b/arch/arm/lib/gic-v3-its.c index 90f37a123c..5057cc5421 100644 --- a/arch/arm/lib/gic-v3-its.c +++ b/arch/arm/lib/gic-v3-its.c @@ -3,6 +3,7 @@ * Copyright 2019 Broadcom. */ #include <common.h> +#include <dm.h> #include <asm/gic.h> #include <asm/gic-v3.h> #include <asm/io.h> @@ -15,6 +16,48 @@ static u32 lpi_id_bits; #define LPI_PROPBASE_SZ ALIGN(BIT(LPI_NRBITS), SZ_64K) #define LPI_PENDBASE_SZ ALIGN(BIT(LPI_NRBITS) / 8, SZ_64K)

+/* + * gic_v3_its_priv - gic details + * + * @gicd_base: gicd base address + * @gicr_base: gicr base address + */ +struct gic_v3_its_priv { + u32 gicd_base; + u32 gicr_base; +}; + +static int gic_v3_its_get_gic_addr(struct gic_v3_its_priv *priv) +{ + struct udevice *dev; + fdt_addr_t addr; + int ret; + + ret = uclass_get_device_by_driver(UCLASS_IRQ, + DM_GET_DRIVER(arm_gic_v3_its), &dev); + if (ret) { + pr_err("%s: failed to get %s irq device\n", __func__, + DM_GET_DRIVER(arm_gic_v3_its)->name); + return ret; + } + + addr = dev_read_addr_index(dev, 0); + if (addr == FDT_ADDR_T_NONE) { + pr_err("%s: failed to get GICD address\n", __func__); + return -EINVAL; + } + priv->gicd_base = addr; + + addr = dev_read_addr_index(dev, 1); + if (addr == FDT_ADDR_T_NONE) { + pr_err("%s: failed to get GICR address\n", __func__); + return -EINVAL; + } + priv->gicr_base = addr; + + return 0; +} + /* * Program the GIC LPI configuration tables for all * the re-distributors and enable the LPI table @@ -23,15 +66,18 @@ static u32 lpi_id_bits; */ int gic_lpi_tables_init(u64 base, u32 num_redist) { + struct gic_v3_its_priv priv; u32 gicd_typer; u64 val; u64 tmp; int i; u64 redist_lpi_base; - u64 pend_base = GICR_BASE + GICR_PENDBASER; + u64 pend_base;

- gicd_typer = readl(GICD_BASE + GICD_TYPER); + if (gic_v3_its_get_gic_addr(&priv)) + return -EINVAL;

+ gicd_typer = readl((uintptr_t)(priv.gicd_base + GICD_TYPER)); /* GIC support for Locality specific peripheral interrupts (LPI's) */ if (!(gicd_typer & GICD_TYPER_LPIS)) { pr_err("GIC implementation does not support LPI's\n"); @@ -46,7 +92,7 @@ int gic_lpi_tables_init(u64 base, u32 num_redist) for (i = 0; i < num_redist; i++) { u32 offset = i * GIC_REDISTRIBUTOR_OFFSET;

- if ((readl((uintptr_t)(GICR_BASE + offset))) & + if ((readl((uintptr_t)(priv.gicr_base + offset))) & GICR_CTLR_ENABLE_LPIS) { pr_err("Re-Distributor %d LPI is already enabled\n", i); @@ -64,19 +110,21 @@ int gic_lpi_tables_init(u64 base, u32 num_redist) GICR_PROPBASER_RAWAWB | ((LPI_NRBITS - 1) & GICR_PROPBASER_IDBITS_MASK));

- writeq(val, (GICR_BASE + GICR_PROPBASER)); - tmp = readl(GICR_BASE + GICR_PROPBASER); + writeq(val, (uintptr_t)(priv.gicr_base + GICR_PROPBASER)); + tmp = readl((uintptr_t)(priv.gicr_base + GICR_PROPBASER)); if ((tmp ^ val) & GICR_PROPBASER_SHAREABILITY_MASK) { if (!(tmp & GICR_PROPBASER_SHAREABILITY_MASK)) { val &= ~(GICR_PROPBASER_SHAREABILITY_MASK | GICR_PROPBASER_CACHEABILITY_MASK); val |= GICR_PROPBASER_NC; - writeq(val, (GICR_BASE + GICR_PROPBASER)); + writeq(val, + (uintptr_t)(priv.gicr_base + GICR_PROPBASER)); } }

redist_lpi_base = base + LPI_PROPBASE_SZ;

+ pend_base = priv.gicr_base + GICR_PENDBASER; for (i = 0; i < num_redist; i++) { u32 offset = i * GIC_REDISTRIBUTOR_OFFSET;

@@ -94,9 +142,20 @@ int gic_lpi_tables_init(u64 base, u32 num_redist) }

/* Enable LPI for the redistributor */ - writel(GICR_CTLR_ENABLE_LPIS, (uintptr_t)(GICR_BASE + offset)); + writel(GICR_CTLR_ENABLE_LPIS, + (uintptr_t)(priv.gicr_base + offset)); }

return 0; }

+static const struct udevice_id gic_v3_its_ids[] = { + { .compatible = "arm,gic-v3" }, + {} +}; + +U_BOOT_DRIVER(arm_gic_v3_its) = { + .name = "gic-v3", + .id = UCLASS_IRQ, + .of_match = gic_v3_its_ids, +};

Use device tree and UCLASS_SYSCON driver to get Generic Interrupt Controller (GIC) lpi address and maximum GIC redistributors count.

Also update Kconfig to select REGMAP and SYSCON when GIC_V3_ITS is enabled.

Signed-off-by: Rayagonda Kokatanur rayagonda.kokatanur@broadcom.com --- arch/arm/Kconfig | 2 ++ arch/arm/include/asm/gic-v3.h | 4 +-- arch/arm/lib/gic-v3-its.c | 63 +++++++++++++++++++++++++++++++---- 3 files changed, 60 insertions(+), 9 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index f115fcdcc4..2fd20fc648 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -64,6 +64,8 @@ endif

config GIC_V3_ITS bool "ARM GICV3 ITS" + select REGMAP + select SYSCON help ARM GICV3 Interrupt translation service (ITS). Basic support for programming locality specific peripheral diff --git a/arch/arm/include/asm/gic-v3.h b/arch/arm/include/asm/gic-v3.h index 5131fabec4..35efec78c3 100644 --- a/arch/arm/include/asm/gic-v3.h +++ b/arch/arm/include/asm/gic-v3.h @@ -127,9 +127,9 @@ #define GIC_REDISTRIBUTOR_OFFSET 0x20000

#ifdef CONFIG_GIC_V3_ITS -int gic_lpi_tables_init(u64 base, u32 max_redist); +int gic_lpi_tables_init(void); #else -int gic_lpi_tables_init(u64 base, u32 max_redist) +int gic_lpi_tables_init(void) { return 0; } diff --git a/arch/arm/lib/gic-v3-its.c b/arch/arm/lib/gic-v3-its.c index 5057cc5421..5e82bdf568 100644 --- a/arch/arm/lib/gic-v3-its.c +++ b/arch/arm/lib/gic-v3-its.c @@ -4,6 +4,8 @@ */ #include <common.h> #include <dm.h> +#include <regmap.h> +#include <syscon.h> #include <asm/gic.h> #include <asm/gic-v3.h> #include <asm/io.h> @@ -16,15 +18,22 @@ static u32 lpi_id_bits; #define LPI_PROPBASE_SZ ALIGN(BIT(LPI_NRBITS), SZ_64K) #define LPI_PENDBASE_SZ ALIGN(BIT(LPI_NRBITS) / 8, SZ_64K)

+/* Number of GIC re-distributors */ +#define MAX_GIC_REDISTRIBUTORS 8 + /* * gic_v3_its_priv - gic details * * @gicd_base: gicd base address * @gicr_base: gicr base address + * @lpi_base: gic lpi base address + * @num_redist: number of gic re-distributors */ struct gic_v3_its_priv { u32 gicd_base; u32 gicr_base; + u32 lpi_base; + u32 num_redist; };

static int gic_v3_its_get_gic_addr(struct gic_v3_its_priv *priv) @@ -58,13 +67,39 @@ static int gic_v3_its_get_gic_addr(struct gic_v3_its_priv *priv) return 0; }

+static int gic_v3_its_get_gic_lpi_addr(struct gic_v3_its_priv *priv) +{ + struct regmap *regmap; + struct udevice *dev; + int ret; + + ret = uclass_get_device_by_driver(UCLASS_SYSCON, + DM_GET_DRIVER(gic_lpi_syscon), &dev); + if (ret) { + pr_err("%s: failed to get %s syscon device\n", __func__, + DM_GET_DRIVER(gic_lpi_syscon)->name); + return ret; + } + + regmap = syscon_get_regmap(dev); + if (!regmap) { + pr_err("%s: failed to regmap for %s syscon device\n", __func__, + DM_GET_DRIVER(gic_lpi_syscon)->name); + return -ENODEV; + } + priv->lpi_base = regmap->ranges[0].start; + + priv->num_redist = dev_read_u32_default(dev, "max-gic-redistributors", + MAX_GIC_REDISTRIBUTORS); + + return 0; +} + /* * Program the GIC LPI configuration tables for all * the re-distributors and enable the LPI table - * base: Configuration table address - * num_redist: number of redistributors */ -int gic_lpi_tables_init(u64 base, u32 num_redist) +int gic_lpi_tables_init(void) { struct gic_v3_its_priv priv; u32 gicd_typer; @@ -77,6 +112,9 @@ int gic_lpi_tables_init(u64 base, u32 num_redist) if (gic_v3_its_get_gic_addr(&priv)) return -EINVAL;

+ if (gic_v3_its_get_gic_lpi_addr(&priv)) + return -EINVAL; + gicd_typer = readl((uintptr_t)(priv.gicd_base + GICD_TYPER)); /* GIC support for Locality specific peripheral interrupts (LPI's) */ if (!(gicd_typer & GICD_TYPER_LPIS)) { @@ -89,7 +127,7 @@ int gic_lpi_tables_init(u64 base, u32 num_redist) * Once the LPI table is enabled, can not program the * LPI configuration tables again, unless the GIC is reset. */ - for (i = 0; i < num_redist; i++) { + for (i = 0; i < priv.num_redist; i++) { u32 offset = i * GIC_REDISTRIBUTOR_OFFSET;

if ((readl((uintptr_t)(priv.gicr_base + offset))) & @@ -105,7 +143,7 @@ int gic_lpi_tables_init(u64 base, u32 num_redist) ITS_MAX_LPI_NRBITS);

/* Set PropBase */ - val = (base | + val = (priv.lpi_base | GICR_PROPBASER_INNERSHAREABLE | GICR_PROPBASER_RAWAWB | ((LPI_NRBITS - 1) & GICR_PROPBASER_IDBITS_MASK)); @@ -122,10 +160,10 @@ int gic_lpi_tables_init(u64 base, u32 num_redist) } }

- redist_lpi_base = base + LPI_PROPBASE_SZ; + redist_lpi_base = priv.lpi_base + LPI_PROPBASE_SZ;

pend_base = priv.gicr_base + GICR_PENDBASER; - for (i = 0; i < num_redist; i++) { + for (i = 0; i < priv.num_redist; i++) { u32 offset = i * GIC_REDISTRIBUTOR_OFFSET;

val = ((redist_lpi_base + (i * LPI_PENDBASE_SZ)) | @@ -159,3 +197,14 @@ U_BOOT_DRIVER(arm_gic_v3_its) = { .id = UCLASS_IRQ, .of_match = gic_v3_its_ids, }; + +static const struct udevice_id gic_lpi_syscon_ids[] = { + { .compatible = "gic-lpi-base" }, + {} +}; + +U_BOOT_DRIVER(gic_lpi_syscon) = { + .name = "gic-lpi-base", + .id = UCLASS_SYSCON, + .of_match = gic_lpi_syscon_ids, +};