[U-Boot] [PATCH 0/4] AM35x: Initial support for the processor
This patchset adds basic support for the AM35x processors. It also ensures that u-boot banner shows correct processor at start-up.
Addition of AM35x impacts existing code for OMAP3, most patches in this set are applicable to both processor families.
The series has been tested on the OMAP3EVM and AM3517EVM. To test on AM3517EVM, earlier patches posted by Vaibhav are required.
[1] http://lists.denx.de/pipermail/u-boot/2009-November/064670.html
Sanjeev Premi (4): AM35x: Introduce support for AM35x processors OMAP3, AM35x: Detect exact CPU in arch_cpu_init() OMAP3, AM35x: Update function print_cpuinfo() OMAP3, AM35x: Update the checks for CPU revision
cpu/arm_cortexa8/omap3/cache.S | 30 +++++++- cpu/arm_cortexa8/omap3/clock.c | 3 +- cpu/arm_cortexa8/omap3/sys_info.c | 140 +++++++++++++++++++++++++++----- include/asm-arm/arch-omap3/cpu.h | 6 -- include/asm-arm/arch-omap3/omap3.h | 40 +++++++++- include/asm-arm/arch-omap3/sys_proto.h | 1 + 6 files changed, 188 insertions(+), 32 deletions(-)
This patch adds support for TI's recently announced AM35x family of devices.
It implements function is_family() to differentiate between OMAP34x/OMAP35x and AM35x device families at runtime.
[1] http://www.ti.com/sitara [2] http://www.ti.com/arm [3] http://tiexpressdsp.com/index.php?title=Applications_Processors_Crossreferen... [4] http://marc.info/?l=linux-omap&m=125615009412281&w=2
Signed-off-by: Sanjeev Premi premi@ti.com --- cpu/arm_cortexa8/omap3/sys_info.c | 42 ++++++++++++++++++++++++++++---- include/asm-arm/arch-omap3/omap3.h | 14 ++++++++++ include/asm-arm/arch-omap3/sys_proto.h | 1 + 3 files changed, 52 insertions(+), 5 deletions(-)
diff --git a/cpu/arm_cortexa8/omap3/sys_info.c b/cpu/arm_cortexa8/omap3/sys_info.c index 449262a..6206e17 100644 --- a/cpu/arm_cortexa8/omap3/sys_info.c +++ b/cpu/arm_cortexa8/omap3/sys_info.c @@ -41,16 +41,19 @@ static char *rev_s[CPU_3XX_MAX_REV] = { "3.0", "3.1"};
-static u8 cpu_revision; +static u16 cpu_family; +static u16 cpu_id; +static u8 cpu_revision;
/** * Identify the silicon * - * Currently, it identifies the cpu revision. + * Currently, it identifies the cpu family and silicon revision. */ void identify_cpu (void) { u32 cpuid = 0; + u16 hawkeye; struct ctrl_id *id_base;
/* @@ -59,6 +62,7 @@ void identify_cpu (void) */ __asm__ __volatile__("mrc p15, 0, %0, c0, c0, 0":"=r"(cpuid)); if ((cpuid & 0xf) == 0x0) { + cpu_family = CPU_OMAP34XX; cpu_revision = CPU_3XX_ES10; } else { /* Decode the IDs on > ES1.0 */ @@ -66,11 +70,26 @@ void identify_cpu (void)
cpuid = readl(&id_base->idcode);
+ hawkeye = (cpuid >> HAWKEYE_SHIFT) & 0xffff; cpu_revision = (cpuid >> CPU_3XX_ID_SHIFT) & 0xf;
- /* Some early ES2.0 seem to report rev 0, fix this */ - if(cpu_revision == 0) - cpu_revision = CPU_3XX_ES20; + switch (hawkeye) { + case HAWKEYE_OMAP34XX: + cpu_family = CPU_OMAP34XX; + + /* Some early ES2.0 seem to report ID 0, fix this */ + if(cpu_revision == 0) + cpu_revision = CPU_3XX_ES20; + break; + + case HAWKEYE_AM35XX: + cpu_family = CPU_AM35XX; + break; + + default: + cpu_family = CPU_OMAP34XX; + break; + } } }
@@ -89,6 +108,19 @@ int arch_cpu_init (void) return 0; }
+/** + * Check if cpu belongs to specific family + * + * Returns 1 if true, 0 if false. + */ +u8 is_cpu_family(u16 family) +{ + if (cpu_family == family) + return 1; + + return 0; +} + /***************************************************************** * dieid_num_r(void) - read and set die ID *****************************************************************/ diff --git a/include/asm-arm/arch-omap3/omap3.h b/include/asm-arm/arch-omap3/omap3.h index 12815f6..86df1f2 100644 --- a/include/asm-arm/arch-omap3/omap3.h +++ b/include/asm-arm/arch-omap3/omap3.h @@ -183,4 +183,18 @@ struct gpio { #define WIDTH_8BIT 0x0000 #define WIDTH_16BIT 0x1000 /* bit pos for 16 bit in gpmc */
+/* + * Hawkeye values + */ +#define HAWKEYE_OMAP34XX 0xb7ae +#define HAWKEYE_AM35XX 0xb868 + +#define HAWKEYE_SHIFT 12 + +/* + * Define CPU families + */ +#define CPU_OMAP34XX 0x3400 /* OMAP34xx/OMAP35 devices */ +#define CPU_AM35XX 0x3500 /* AM35xx devices */ + #endif diff --git a/include/asm-arm/arch-omap3/sys_proto.h b/include/asm-arm/arch-omap3/sys_proto.h index 9ddd272..0b6e48b 100644 --- a/include/asm-arm/arch-omap3/sys_proto.h +++ b/include/asm-arm/arch-omap3/sys_proto.h @@ -41,6 +41,7 @@ void watchdog_init(void); void set_muxconf_regs(void);
void identify_cpu(void); +u8 is_cpu_family(u16); u8 get_cpu_rev(void); u32 get_mem_type(void); u32 get_sysboot_value(void);
This patch identifies exact cpu in function arch_cpu_init().
It does the following: - It consolidates all related #defines into omap3.h. - Prefixes CTRL_ to #defines used in comparison against contents of Control Status Register returned by the function get_cpu_type(). - Adds new #defines to identify exact CPU id.
Signed-off-by: Sanjeev Premi premi@ti.com --- cpu/arm_cortexa8/omap3/sys_info.c | 55 ++++++++++++++++++++++++++++++++++- include/asm-arm/arch-omap3/cpu.h | 6 ---- include/asm-arm/arch-omap3/omap3.h | 26 +++++++++++++++- 3 files changed, 77 insertions(+), 10 deletions(-)
diff --git a/cpu/arm_cortexa8/omap3/sys_info.c b/cpu/arm_cortexa8/omap3/sys_info.c index 6206e17..3544d26 100644 --- a/cpu/arm_cortexa8/omap3/sys_info.c +++ b/cpu/arm_cortexa8/omap3/sys_info.c @@ -45,14 +45,17 @@ static u16 cpu_family; static u16 cpu_id; static u8 cpu_revision;
+static u32 get_cpu_type(void); + /** * Identify the silicon * - * Currently, it identifies the cpu family and silicon revision. + * It identifies the cpu family, exact cpu and silicon revision. */ void identify_cpu (void) { u32 cpuid = 0; + u32 cputype; u16 hawkeye; struct ctrl_id *id_base;
@@ -73,6 +76,9 @@ void identify_cpu (void) hawkeye = (cpuid >> HAWKEYE_SHIFT) & 0xffff; cpu_revision = (cpuid >> CPU_3XX_ID_SHIFT) & 0xf;
+ /* + * Identify cpu family and revision + */ switch (hawkeye) { case HAWKEYE_OMAP34XX: cpu_family = CPU_OMAP34XX; @@ -90,6 +96,51 @@ void identify_cpu (void) cpu_family = CPU_OMAP34XX; break; } + + cputype = get_cpu_type(); + switch (cpu_family) + { + case CPU_OMAP34XX: + switch (cputype) { + case CTRL_OMAP3503: + cpu_id = OMAP3503; + break; + case CTRL_OMAP3515: + cpu_id = OMAP3515; + break; + case CTRL_OMAP3525: + cpu_id = OMAP3525; + break; + case CTRL_OMAP3530: + cpu_id = OMAP3430; /* Same as OMAP3530 */ + break; + default: + cpu_id = OMAP3430; + break; + } + break; + + case CPU_AM35XX: + switch (cputype) { + case CTRL_AM3505: + cpu_id = AM3505; + break; + case CTRL_AM3517: + cpu_id = AM3517; + break; + default: + cpu_id = AM3505; + break; + } + break; + + default: + /* + * Fall back to most common device + */ + cpu_id = OMAP3430; + break; + } } }
@@ -150,7 +201,7 @@ void dieid_num_r(void) /****************************************** * get_cpu_type(void) - extract cpu info ******************************************/ -u32 get_cpu_type(void) +static u32 get_cpu_type(void) { return readl(&ctrl_base->ctrl_omap_stat); } diff --git a/include/asm-arm/arch-omap3/cpu.h b/include/asm-arm/arch-omap3/cpu.h index 8ab2e39..088a342 100644 --- a/include/asm-arm/arch-omap3/cpu.h +++ b/include/asm-arm/arch-omap3/cpu.h @@ -60,12 +60,6 @@ struct ctrl { #endif /* __ASSEMBLY__ */ #endif /* __KERNEL_STRICT_NAMES */
-/* cpu type */ -#define OMAP3503 0x5c00 -#define OMAP3515 0x1c00 -#define OMAP3525 0x4c00 -#define OMAP3530 0x0c00 - #ifndef __KERNEL_STRICT_NAMES #ifndef __ASSEMBLY__ struct ctrl_id { diff --git a/include/asm-arm/arch-omap3/omap3.h b/include/asm-arm/arch-omap3/omap3.h index 86df1f2..af23e5d 100644 --- a/include/asm-arm/arch-omap3/omap3.h +++ b/include/asm-arm/arch-omap3/omap3.h @@ -161,8 +161,6 @@ struct gpio { #define DDR_133 133 /* most combo, some mem d-boards */ #define DDR_165 165 /* future parts */
-#define CPU_3430 0x3430 - /* * 343x real hardware: * ES1 = rev 0 @@ -197,4 +195,28 @@ struct gpio { #define CPU_OMAP34XX 0x3400 /* OMAP34xx/OMAP35 devices */ #define CPU_AM35XX 0x3500 /* AM35xx devices */
+/* + * Define CPUs + */ +#define OMAP3430 0x3430 + +#define OMAP3503 0x3503 +#define OMAP3515 0x3515 +#define OMAP3525 0x3525 +#define OMAP3530 0x3530 + +#define AM3505 0x3505 +#define AM3517 0x3517 + +/* + * Control status register values corresponding to cpu variants + */ +#define CTRL_OMAP3503 0x5c00 +#define CTRL_OMAP3515 0x1c00 +#define CTRL_OMAP3525 0x4c00 +#define CTRL_OMAP3530 0x0c00 + +#define CTRL_AM3505 0x5c00 +#define CTRL_AM3517 0x1c00 + #endif
Dear Sanjeev Premi,
In message 1260902266-26009-3-git-send-email-premi@ti.com you wrote:
This patch identifies exact cpu in function arch_cpu_init().
It does the following:
- It consolidates all related #defines into omap3.h.
- Prefixes CTRL_ to #defines used in comparison against contents of Control Status Register returned by the function get_cpu_type().
- Adds new #defines to identify exact CPU id.
Signed-off-by: Sanjeev Premi premi@ti.com
...
cputype = get_cpu_type();switch (cpu_family){
Incorrect brace style, please move the brace on previous line.
Best regards,
Wolfgang Denk
The function is updated to make use of the cpu related information extracted in arch_cpu_init().
Signed-off-by: Sanjeev Premi premi@ti.com --- cpu/arm_cortexa8/omap3/sys_info.c | 45 ++++++++++++++++++++++++------------ 1 files changed, 30 insertions(+), 15 deletions(-)
diff --git a/cpu/arm_cortexa8/omap3/sys_info.c b/cpu/arm_cortexa8/omap3/sys_info.c index 3544d26..1228f5f 100644 --- a/cpu/arm_cortexa8/omap3/sys_info.c +++ b/cpu/arm_cortexa8/omap3/sys_info.c @@ -364,45 +364,60 @@ u32 get_device_type(void) */ int print_cpuinfo (void) { - char *cpu_s, *sec_s; + char cpu_s[16], sec_s[4];
- switch (get_cpu_type()) { + switch (cpu_id) { case OMAP3503: - cpu_s = "3503"; + strcpy(cpu_s, "OMAP3503"); break; case OMAP3515: - cpu_s = "3515"; + strcpy(cpu_s, "OMAP3515"); break; case OMAP3525: - cpu_s = "3525"; + strcpy(cpu_s, "OMAP3503"); break; + case OMAP3430: case OMAP3530: - cpu_s = "3530"; + strcpy(cpu_s, "OMAP3430/3530"); break; - default: - cpu_s = "35XX"; + case CTRL_AM3505: + strcpy(cpu_s, "AM3505"); + break; + case CTRL_AM3517: + strcpy(cpu_s, "AM3517"); break; + + default: + if (cpu_family == CPU_AM35XX) + strcpy(cpu_s, "AM35xx"); + else + strcpy(cpu_s, "OMAP34xx/35xx"); }
switch (get_device_type()) { case TST_DEVICE: - sec_s = "TST"; + strcpy(sec_s, "TST"); break; case EMU_DEVICE: - sec_s = "EMU"; + strcpy(sec_s, "EMU"); break; case HS_DEVICE: - sec_s = "HS"; + strcpy(sec_s, "HS"); break; case GP_DEVICE: - sec_s = "GP"; + strcpy(sec_s, "GP"); break; default: - sec_s = "?"; + strcpy(sec_s, "?"); }
- printf("OMAP%s-%s ES%s, CPU-OPP2 L3-165MHz\n", - cpu_s, sec_s, rev_s[get_cpu_rev()]); + /* + * TBD: Revision numbers for AM35x may not be same as OMAP35x. + * Will need to re-look sometime later. + */ + printf("%s-%s ES%s,%s L3-165MHz\n", + cpu_s, sec_s, rev_s[get_cpu_rev()], + (cpu_family == CPU_AM35XX) ? "" : " CPU-OPP2");
return 0; }
Dear Sanjeev Premi,
In message 1260902266-26009-4-git-send-email-premi@ti.com you wrote:
The function is updated to make use of the cpu related information extracted in arch_cpu_init().
Signed-off-by: Sanjeev Premi premi@ti.com
cpu/arm_cortexa8/omap3/sys_info.c | 45 ++++++++++++++++++++++++------------ 1 files changed, 30 insertions(+), 15 deletions(-)
diff --git a/cpu/arm_cortexa8/omap3/sys_info.c b/cpu/arm_cortexa8/omap3/sys_info.c index 3544d26..1228f5f 100644 --- a/cpu/arm_cortexa8/omap3/sys_info.c +++ b/cpu/arm_cortexa8/omap3/sys_info.c @@ -364,45 +364,60 @@ u32 get_device_type(void) */ int print_cpuinfo (void) {
- char *cpu_s, *sec_s;
- char cpu_s[16], sec_s[4];
- switch (get_cpu_type()) {
- switch (cpu_id) { case OMAP3503:
cpu_s = "3503";
strcpy(cpu_s, "OMAP3503");
cpu_s = "3515";
strcpy(cpu_s, "OMAP3515");
cpu_s = "3525";
strcpy(cpu_s, "OMAP3503");- case OMAP3430: case OMAP3530:
cpu_s = "3530";
strcpy(cpu_s, "OMAP3430/3530");
- default:
cpu_s = "35XX";
case CTRL_AM3505:
strcpy(cpu_s, "AM3505");break;case CTRL_AM3517:
strcpy(cpu_s, "AM3517");break;
default:
if (cpu_family == CPU_AM35XX)strcpy(cpu_s, "AM35xx");elsestrcpy(cpu_s, "OMAP34xx/35xx");}
switch (get_device_type()) { case TST_DEVICE:
sec_s = "TST";
strcpy(sec_s, "TST");
sec_s = "EMU";
strcpy(sec_s, "EMU");
sec_s = "HS";
strcpy(sec_s, "HS");
sec_s = "GP";
strcpy(sec_s, "GP");
sec_s = "?";
strcpy(sec_s, "?");
- printf("OMAP%s-%s ES%s, CPU-OPP2 L3-165MHz\n",
cpu_s, sec_s, rev_s[get_cpu_rev()]);
- /*
* TBD: Revision numbers for AM35x may not be same as OMAP35x.* Will need to re-look sometime later.*/- printf("%s-%s ES%s,%s L3-165MHz\n",
cpu_s, sec_s, rev_s[get_cpu_rev()],(cpu_family == CPU_AM35XX) ? "" : " CPU-OPP2");
Changing pointers to constant strings into using an array with lots of function calls (strcpy()) makes no sense to me. I think the resulting code is just bigger and slower.
Or am I overlooking something?
Best regards,
Wolfgang Denk
The usage of get_cpu_rev() to check for cpu revision is no longer appropriate - after updates in previous patches.
This patch ensures correct usage.
Signed-off-by: Sanjeev Premi premi@ti.com --- cpu/arm_cortexa8/omap3/cache.S | 30 ++++++++++++++++++++++++++++-- cpu/arm_cortexa8/omap3/clock.c | 3 ++- 2 files changed, 30 insertions(+), 3 deletions(-)
diff --git a/cpu/arm_cortexa8/omap3/cache.S b/cpu/arm_cortexa8/omap3/cache.S index 0f63815..8e985d8 100644 --- a/cpu/arm_cortexa8/omap3/cache.S +++ b/cpu/arm_cortexa8/omap3/cache.S @@ -131,10 +131,23 @@ finished_inval:
l2_cache_enable: push {r0, r1, r2, lr} - @ ES2 onwards we can disable/enable L2 ourselves + @ We can disable/enable L2 ourselves for these devices + @ - OMAP3430/OMAP35xx (ES2 onwards) + @ - AM35xx + mov r0, #CPU_AM35XX + bl is_cpu_family + cmp r0, #1 + beq l2_cache_enable_LATER_THAN_ES2 @ family is AM35xx + + mov r0, #CPU_OMAP34XX + bl is_cpu_family + cmp r0, #1 + bne l2_cache_enable_END @ Family isn't OMAP34xx/35xx + bl get_cpu_rev cmp r0, #CPU_3XX_ES20 blt l2_cache_disable_EARLIER_THAN_ES2 +l2_cache_enable_LATER_THAN_ES2: mrc 15, 0, r3, cr1, cr0, 1 orr r3, r3, #2 mcr 15, 0, r3, cr1, cr0, 1 @@ -162,10 +175,23 @@ l2_cache_enable_END:
l2_cache_disable: push {r0, r1, r2, lr} - @ ES2 onwards we can disable/enable L2 ourselves + @ We can disable/enable L2 ourselves for these devices + @ - OMAP3430/OMAP35xx (ES2 onwards) + @ - AM35xx + mov r0, #CPU_AM35XX + bl is_cpu_family + cmp r0, #1 + beq l2_cache_disable_LATER_THAN_ES2 @ family is AM35xx + + mov r0, #CPU_OMAP34XX + bl is_cpu_family + cmp r0, #1 + bne l2_cache_enable_END @ Family isn't OMAP34xx/35xx + bl get_cpu_rev cmp r0, #CPU_3XX_ES20 blt l2_cache_disable_EARLIER_THAN_ES2 +l2_cache_disable_LATER_THAN_ES2: mrc 15, 0, r3, cr1, cr0, 1 bic r3, r3, #2 mcr 15, 0, r3, cr1, cr0, 1 diff --git a/cpu/arm_cortexa8/omap3/clock.c b/cpu/arm_cortexa8/omap3/clock.c index 174c453..0a1e603 100644 --- a/cpu/arm_cortexa8/omap3/clock.c +++ b/cpu/arm_cortexa8/omap3/clock.c @@ -170,7 +170,8 @@ void prcm_init(void) * and sil_index will get the values for that SysClk for the * appropriate silicon rev. */ - if (get_cpu_rev()) + if ((is_cpu_family(CPU_OMAP34XX) && (get_cpu_rev() >= CPU_3XX_ES20)) || + (is_cpu_family(CPU_AM35XX))) sil_index = 1;
/* Unlock MPU DPLL (slows things down, and needed later) */
Sanjeev Premi wrote:
This patchset adds basic support for the AM35x processors. It also ensures that u-boot banner shows correct processor at start-up.
Addition of AM35x impacts existing code for OMAP3, most patches in this set are applicable to both processor families.
The series has been tested on the OMAP3EVM and AM3517EVM. To test on AM3517EVM, earlier patches posted by Vaibhav are required.
[1] http://lists.denx.de/pipermail/u-boot/2009-November/064670.html
The am3517 support is not in. This patchset is dependent on it. These changes can only be reviewed casually until then.
Vaibhav, When will next rev of the am3517 changes be posted ?
Tom
Thanks, Vaibhav Hiremath Platform Support Products Texas Instruments Inc Ph: +91-80-25099927
-----Original Message----- From: Tom [mailto:Tom.Rix@windriver.com] Sent: Wednesday, December 16, 2009 1:32 AM To: Premi, Sanjeev Cc: u-boot@lists.denx.de; Hiremath, Vaibhav; Paulraj, Sandeep Subject: Re: [U-Boot] [PATCH 0/4] AM35x: Initial support for the processor
Sanjeev Premi wrote:
This patchset adds basic support for the AM35x processors. It also ensures that u-boot banner shows correct processor at start-up.
Addition of AM35x impacts existing code for OMAP3, most patches in this set are applicable to both processor families.
The series has been tested on the OMAP3EVM and AM3517EVM. To test on AM3517EVM, earlier patches posted by Vaibhav are required.
November/064670.html
The am3517 support is not in. This patchset is dependent on it. These changes can only be reviewed casually until then.
Vaibhav, When will next rev of the am3517 changes be posted
[Hiremath, Vaibhav] Tom, I am bit busy with some outstanding issues on Linux kernel, but probably sometime next week I will be able to re-submit the patches.
Thanks, Vaibhav
Tom
-----Original Message----- From: Premi, Sanjeev Sent: Wednesday, December 16, 2009 12:08 AM To: u-boot@lists.denx.de Cc: Premi, Sanjeev Subject: [PATCH 0/4] AM35x: Initial support for the processor
This patchset adds basic support for the AM35x processors. It also ensures that u-boot banner shows correct processor at start-up.
Addition of AM35x impacts existing code for OMAP3, most patches in this set are applicable to both processor families.
The series has been tested on the OMAP3EVM and AM3517EVM. To test on AM3517EVM, earlier patches posted by Vaibhav are required.
[1] http://lists.denx.de/pipermail/u-boot/2009-November/064670.html
Sanjeev Premi (4): AM35x: Introduce support for AM35x processors OMAP3, AM35x: Detect exact CPU in arch_cpu_init() OMAP3, AM35x: Update function print_cpuinfo() OMAP3, AM35x: Update the checks for CPU revision
cpu/arm_cortexa8/omap3/cache.S | 30 +++++++- cpu/arm_cortexa8/omap3/clock.c | 3 +- cpu/arm_cortexa8/omap3/sys_info.c | 140 +++++++++++++++++++++++++++----- include/asm-arm/arch-omap3/cpu.h | 6 -- include/asm-arm/arch-omap3/omap3.h | 40 +++++++++- include/asm-arm/arch-omap3/sys_proto.h | 1 + 6 files changed, 188 insertions(+), 32 deletions(-)
Sandeep, Tom,
Any comments on this series on your queue..
Best regards, Sanjeev
participants (5)
-
Hiremath, Vaibhav -
Premi, Sanjeev -
Sanjeev Premi
-
Tom -
Wolfgang Denk