[U-Boot] [PATCH 1/2] ARM: tegra: move common config defines centrally
From: Stephen Warren swarren@nvidia.com
All boards need CONFIG_BOARD_EARLY_INIT_F, and many actively need CONFIG_BOARD_LATE_INIT. Move both of these into tegra-common.h so that board config headers don't need to repeatedly define them.
Later commits will add new code in board_late_init() which applies to all boards, so CONFIG_BOARD_LATE_INIT should be enabled for all Tegra boards.
Signed-off-by: Stephen Warren swarren@nvidia.com --- This series is based upon: * My 3-patch series starting with "common: board: support systems with where RAM ends beyond 4GB" probably just for diff context if anything. * Ian Campbell's "tegra124: Add more registers to struct mc_ctlr" This adds required new fields to struct mc_ctlr. Both of those dependencies are probably only relevant patch 2/2. --- include/configs/apalis_t30.h | 2 -- include/configs/beaver.h | 2 -- include/configs/cardhu.h | 2 -- include/configs/colibri_t20_iris.h | 2 -- include/configs/colibri_t30.h | 2 -- include/configs/dalmore.h | 2 -- include/configs/harmony.h | 3 --- include/configs/jetson-tk1.h | 2 -- include/configs/medcom-wide.h | 3 --- include/configs/nyan-big.h | 2 -- include/configs/paz00.h | 3 --- include/configs/plutux.h | 3 --- include/configs/seaboard.h | 3 --- include/configs/tec-ng.h | 2 -- include/configs/tec.h | 3 --- include/configs/tegra-common.h | 2 ++ include/configs/trimslice.h | 2 -- include/configs/venice2.h | 2 -- include/configs/ventana.h | 3 --- include/configs/whistler.h | 2 -- 20 files changed, 2 insertions(+), 45 deletions(-)
diff --git a/include/configs/apalis_t30.h b/include/configs/apalis_t30.h index 61809fcdbea7..73404e27f448 100644 --- a/include/configs/apalis_t30.h +++ b/include/configs/apalis_t30.h @@ -22,8 +22,6 @@
#define CONFIG_MACH_TYPE MACH_TYPE_APALIS_T30
-#define CONFIG_BOARD_EARLY_INIT_F - /* I2C */ #define CONFIG_SYS_I2C_TEGRA #define CONFIG_CMD_I2C diff --git a/include/configs/beaver.h b/include/configs/beaver.h index 5df460c96b1d..58013c6c9b2e 100644 --- a/include/configs/beaver.h +++ b/include/configs/beaver.h @@ -36,8 +36,6 @@ #define MACH_TYPE_BEAVER 4597 /* not yet in mach-types.h */ #define CONFIG_MACH_TYPE MACH_TYPE_BEAVER
-#define CONFIG_BOARD_EARLY_INIT_F - /* I2C */ #define CONFIG_SYS_I2C_TEGRA #define CONFIG_CMD_I2C diff --git a/include/configs/cardhu.h b/include/configs/cardhu.h index 5e13b655c287..55de464acb04 100644 --- a/include/configs/cardhu.h +++ b/include/configs/cardhu.h @@ -39,8 +39,6 @@
#define CONFIG_MACH_TYPE MACH_TYPE_CARDHU
-#define CONFIG_BOARD_EARLY_INIT_F - /* I2C */ #define CONFIG_SYS_I2C_TEGRA #define CONFIG_CMD_I2C diff --git a/include/configs/colibri_t20_iris.h b/include/configs/colibri_t20_iris.h index 2b876fede111..4888c945fe2d 100644 --- a/include/configs/colibri_t20_iris.h +++ b/include/configs/colibri_t20_iris.h @@ -18,8 +18,6 @@ #define CONFIG_TEGRA_UARTA_SDIO1 #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
-#define CONFIG_BOARD_EARLY_INIT_F - /* SD/MMC support */ #define CONFIG_MMC #define CONFIG_GENERIC_MMC diff --git a/include/configs/colibri_t30.h b/include/configs/colibri_t30.h index ce6f23b8c4f1..9951b0eeba88 100644 --- a/include/configs/colibri_t30.h +++ b/include/configs/colibri_t30.h @@ -21,8 +21,6 @@
#define CONFIG_MACH_TYPE MACH_TYPE_COLIBRI_T30
-#define CONFIG_BOARD_EARLY_INIT_F - /* I2C */ #define CONFIG_SYS_I2C_TEGRA #define CONFIG_CMD_I2C diff --git a/include/configs/dalmore.h b/include/configs/dalmore.h index 0b04ee67b36a..5f5eb3b3139d 100644 --- a/include/configs/dalmore.h +++ b/include/configs/dalmore.h @@ -32,8 +32,6 @@
#define CONFIG_MACH_TYPE MACH_TYPE_DALMORE
-#define CONFIG_BOARD_EARLY_INIT_F - /* I2C */ #define CONFIG_SYS_I2C_TEGRA #define CONFIG_CMD_I2C diff --git a/include/configs/harmony.h b/include/configs/harmony.h index ff9fbc9965a2..ad3dcdb7bab1 100644 --- a/include/configs/harmony.h +++ b/include/configs/harmony.h @@ -27,9 +27,6 @@
#define CONFIG_MACH_TYPE MACH_TYPE_HARMONY
-#define CONFIG_BOARD_EARLY_INIT_F -#define CONFIG_BOARD_LATE_INIT /* Make sure LCD init is complete */ - /* SD/MMC */ #define CONFIG_MMC #define CONFIG_GENERIC_MMC diff --git a/include/configs/jetson-tk1.h b/include/configs/jetson-tk1.h index 0a79c7cfc361..8c016b795519 100644 --- a/include/configs/jetson-tk1.h +++ b/include/configs/jetson-tk1.h @@ -24,8 +24,6 @@ #define CONFIG_TEGRA_ENABLE_UARTD #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
-#define CONFIG_BOARD_EARLY_INIT_F - /* I2C */ #define CONFIG_SYS_I2C_TEGRA #define CONFIG_CMD_I2C diff --git a/include/configs/medcom-wide.h b/include/configs/medcom-wide.h index ac5208fa0d34..f721a4d6a21a 100644 --- a/include/configs/medcom-wide.h +++ b/include/configs/medcom-wide.h @@ -20,9 +20,6 @@ #define CONFIG_TEGRA_ENABLE_UARTD /* UARTD: debug UART */ #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
-#define CONFIG_BOARD_EARLY_INIT_F -#define CONFIG_BOARD_LATE_INIT - /* SD/MMC */ #define CONFIG_MMC #define CONFIG_GENERIC_MMC diff --git a/include/configs/nyan-big.h b/include/configs/nyan-big.h index cf331ab2077a..539759991123 100644 --- a/include/configs/nyan-big.h +++ b/include/configs/nyan-big.h @@ -21,8 +21,6 @@ #define CONFIG_TEGRA_ENABLE_UARTA #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
-#define CONFIG_BOARD_EARLY_INIT_F - /* I2C */ #define CONFIG_SYS_I2C_TEGRA #define CONFIG_CMD_I2C diff --git a/include/configs/paz00.h b/include/configs/paz00.h index 45bb47088bc5..284419ffc8a9 100644 --- a/include/configs/paz00.h +++ b/include/configs/paz00.h @@ -30,9 +30,6 @@
#define CONFIG_MACH_TYPE MACH_TYPE_PAZ00
-#define CONFIG_BOARD_EARLY_INIT_F -#define CONFIG_BOARD_LATE_INIT - /* SD/MMC */ #define CONFIG_MMC #define CONFIG_GENERIC_MMC diff --git a/include/configs/plutux.h b/include/configs/plutux.h index b663b89d2c70..6878ed799586 100644 --- a/include/configs/plutux.h +++ b/include/configs/plutux.h @@ -20,9 +20,6 @@ #define CONFIG_TEGRA_ENABLE_UARTD /* UARTD: debug UART */ #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
-#define CONFIG_BOARD_EARLY_INIT_F -#define CONFIG_BOARD_LATE_INIT - /* SD/MMC */ #define CONFIG_MMC #define CONFIG_GENERIC_MMC diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h index 5f77051d13f8..4442064db914 100644 --- a/include/configs/seaboard.h +++ b/include/configs/seaboard.h @@ -32,9 +32,6 @@
#define CONFIG_MACH_TYPE MACH_TYPE_SEABOARD
-#define CONFIG_BOARD_EARLY_INIT_F -#define CONFIG_BOARD_LATE_INIT /* Make sure LCD init is complete */ - /* I2C */ #define CONFIG_SYS_I2C_TEGRA #define CONFIG_CMD_I2C diff --git a/include/configs/tec-ng.h b/include/configs/tec-ng.h index e37b23359b54..cfa7fb12d7ef 100644 --- a/include/configs/tec-ng.h +++ b/include/configs/tec-ng.h @@ -19,8 +19,6 @@ #define CONFIG_TEGRA_ENABLE_UARTD #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
-#define CONFIG_BOARD_EARLY_INIT_F - /* I2C */ #define CONFIG_SYS_I2C_TEGRA #define CONFIG_CMD_I2C diff --git a/include/configs/tec.h b/include/configs/tec.h index 9ea4ff497115..13c24c960c08 100644 --- a/include/configs/tec.h +++ b/include/configs/tec.h @@ -20,9 +20,6 @@ #define CONFIG_TEGRA_ENABLE_UARTD /* UARTD: debug UART */ #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
-#define CONFIG_BOARD_EARLY_INIT_F -#define CONFIG_BOARD_LATE_INIT - /* SD/MMC */ #define CONFIG_MMC #define CONFIG_GENERIC_MMC diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index 8f1e3709155f..e4499ccb892d 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -162,6 +162,8 @@ #define CONFIG_SPL_GPIO_SUPPORT
#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_LATE_INIT
/* Misc utility code */ #define CONFIG_BOUNCE_BUFFER diff --git a/include/configs/trimslice.h b/include/configs/trimslice.h index 59f4f6767b76..81be8a220472 100644 --- a/include/configs/trimslice.h +++ b/include/configs/trimslice.h @@ -22,8 +22,6 @@
#define CONFIG_MACH_TYPE MACH_TYPE_TRIMSLICE
-#define CONFIG_BOARD_EARLY_INIT_F - /* SPI */ #define CONFIG_TEGRA20_SFLASH #define CONFIG_SPI_FLASH diff --git a/include/configs/venice2.h b/include/configs/venice2.h index 8880de86c42d..45940024249e 100644 --- a/include/configs/venice2.h +++ b/include/configs/venice2.h @@ -21,8 +21,6 @@ #define CONFIG_TEGRA_ENABLE_UARTA #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
-#define CONFIG_BOARD_EARLY_INIT_F - /* I2C */ #define CONFIG_SYS_I2C_TEGRA #define CONFIG_CMD_I2C diff --git a/include/configs/ventana.h b/include/configs/ventana.h index f195f8a6eac3..62bec9955e59 100644 --- a/include/configs/ventana.h +++ b/include/configs/ventana.h @@ -21,9 +21,6 @@
#define CONFIG_MACH_TYPE MACH_TYPE_VENTANA
-#define CONFIG_BOARD_EARLY_INIT_F -#define CONFIG_BOARD_LATE_INIT /* Make sure LCD init is complete */ - /* SD/MMC */ #define CONFIG_MMC #define CONFIG_GENERIC_MMC diff --git a/include/configs/whistler.h b/include/configs/whistler.h index e083cbd07f17..94f151e9bea3 100644 --- a/include/configs/whistler.h +++ b/include/configs/whistler.h @@ -22,8 +22,6 @@
#define CONFIG_MACH_TYPE MACH_TYPE_WHISTLER
-#define CONFIG_BOARD_EARLY_INIT_F - /* I2C */ #define CONFIG_SYS_I2C_TEGRA #define CONFIG_CMD_I2C
From: Stephen Warren swarren@nvidia.com
When the CPU is in non-secure (NS) mode (when running U-Boot under a secure monitor), certain actions cannot be taken, since they would need to write to secure-only registers. One example is configuring the ARM architectural timer's CNTFRQ register.
We could support this in one of two ways: 1) Compile twice, once for secure mode (in which case anything goes) and once for non-secure mode (in which case certain actions are disabled). This complicates things, since everyone needs to keep track of different U-Boot binaries for different situations. 2) Detect NS mode at run-time, and optionally skip any impossible actions. This has the advantage of a single U-Boot binary working in all cases.
(2) is not possible on ARM in general, since there's no architectural way to detect secure-vs-non-secure. However, there is a Tegra-specific way to detect this.
This patches uses that feature to detect secure vs. NS mode on Tegra, and uses that to:
* Skip the ARM arch timer initialization.
* Set/clear an environment variable so that boot scripts can take different action depending on which mode the CPU is in. This might be something like: if CPU is secure: load secure monitor code into RAM. boot secure monitor. secure monitor will restart (a new copy of) U-Boot in NS mode. else: execute normal boot process
Signed-off-by: Stephen Warren swarren@nvidia.com --- README | 7 +++++++ arch/arm/cpu/tegra-common/board.c | 19 +++++++++++++++++++ arch/arm/cpu/tegra-common/clock.c | 6 +++++- arch/arm/include/asm/arch-tegra/ap.h | 4 ++++ board/nvidia/common/board.c | 9 +++++++++ 5 files changed, 44 insertions(+), 1 deletion(-)
diff --git a/README b/README index fefa71c0a6c5..4d4ffc9c495f 100644 --- a/README +++ b/README @@ -621,6 +621,13 @@ The following options need to be configured: exists, unlike the similar options in the Linux kernel. Do not set these options unless they apply!
+- Tegra SoC options: + CONFIG_TEGRA_SUPPORT_NON_SECURE + + Support executing U-Boot in non-secure (NS) mode. Certain + impossible actions will be skipped if the CPU is in NS mode, + such as ARM architectural timer initialization. + - Driver Model Driver model is a new framework for devices in U-Boot introduced in early 2014. U-Boot is being progressively diff --git a/arch/arm/cpu/tegra-common/board.c b/arch/arm/cpu/tegra-common/board.c index 87511a31df18..0ebaf1932556 100644 --- a/arch/arm/cpu/tegra-common/board.c +++ b/arch/arm/cpu/tegra-common/board.c @@ -11,6 +11,7 @@ #include <asm/arch/funcmux.h> #include <asm/arch/mc.h> #include <asm/arch/tegra.h> +#include <asm/arch-tegra/ap.h> #include <asm/arch-tegra/board.h> #include <asm/arch-tegra/pmc.h> #include <asm/arch-tegra/sys_proto.h> @@ -28,6 +29,24 @@ enum { UART_COUNT = 5, };
+#if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE) +#if !defined(CONFIG_TEGRA124) +#error tegra_cpu_is_non_secure has only been validated on Tegra124 +#endif +bool tegra_cpu_is_non_secure(void) +{ + /* + * This register reads 0xffffffff in non-secure mode. This register + * only implements bits 31:20, so the lower bits will always read 0 in + * secure mode. Thus, the lower bits are an indicator for secure vs. + * non-secure mode. + */ + struct mc_ctlr *mc = (struct mc_ctlr *)NV_PA_MC_BASE; + uint32_t mc_s_cfg0 = readl(&mc->mc_security_cfg0); + return (mc_s_cfg0 & 1) == 1; +} +#endif + /* Read the RAM size directly from the memory controller */ unsigned int query_sdram_size(void) { diff --git a/arch/arm/cpu/tegra-common/clock.c b/arch/arm/cpu/tegra-common/clock.c index 11c7435505c1..7c274b5f9940 100644 --- a/arch/arm/cpu/tegra-common/clock.c +++ b/arch/arm/cpu/tegra-common/clock.c @@ -20,6 +20,7 @@ #include <asm/io.h> #include <asm/arch/clock.h> #include <asm/arch/tegra.h> +#include <asm/arch-tegra/ap.h> #include <asm/arch-tegra/clk_rst.h> #include <asm/arch-tegra/timer.h> #include <div64.h> @@ -573,7 +574,10 @@ void clock_init(void) debug("PLLX = %d\n", pll_rate[CLOCK_ID_XCPU]);
/* Do any special system timer/TSC setup */ - arch_timer_init(); +#if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE) + if (!tegra_cpu_is_non_secure()) +#endif + arch_timer_init(); }
static void set_avp_clock_source(u32 src) diff --git a/arch/arm/include/asm/arch-tegra/ap.h b/arch/arm/include/asm/arch-tegra/ap.h index 5c8be94d9772..ca40e4e0bce6 100644 --- a/arch/arm/include/asm/arch-tegra/ap.h +++ b/arch/arm/include/asm/arch-tegra/ap.h @@ -74,3 +74,7 @@ static inline void config_vpr(void) { } #endif + +#if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE) +bool tegra_cpu_is_non_secure(void); +#endif diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c index 80ef8fdcb23b..018dddba1558 100644 --- a/board/nvidia/common/board.c +++ b/board/nvidia/common/board.c @@ -21,6 +21,7 @@ #include <asm/arch/pwm.h> #endif #include <asm/arch/tegra.h> +#include <asm/arch-tegra/ap.h> #include <asm/arch-tegra/board.h> #include <asm/arch-tegra/clk_rst.h> #include <asm/arch-tegra/pmc.h> @@ -180,6 +181,14 @@ int board_late_init(void) /* Make sure we finish initing the LCD */ tegra_lcd_check_next_stage(gd->fdt_blob, 1); #endif +#if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE) + if (tegra_cpu_is_non_secure()) { + printf("CPU is in NS mode\n"); + setenv("cpu_ns_mode", "1"); + } else { + setenv("cpu_ns_mode", ""); + } +#endif return 0; }
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Stephen Warren