The max size of available memories on slot0 and slot1 is 32MB because - EA[25] signal is not output on the save-pin mode which is used PH1-LD4 or later SoCs. - EA[25] signal is not connected by the limitation (or bug?) of the PLD logic of DCC support card.

Signed-off-by: Masahiro Yamada yamada.m@jp.panasonic.com ---

arch/arm/cpu/armv7/uniphier/support_card.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/cpu/armv7/uniphier/support_card.c b/arch/arm/cpu/armv7/uniphier/support_card.c index 419012e..443224c 100644 --- a/arch/arm/cpu/armv7/uniphier/support_card.c +++ b/arch/arm/cpu/armv7/uniphier/support_card.c @@ -160,12 +160,12 @@ static const struct memory_bank memory_banks_boot_swap_on[] = {

#if defined(CONFIG_DCC_MICRO_SUPPORT_CARD) static const struct memory_bank memory_banks_boot_swap_off[] = { - {0x04000000, 0x04000000}, + {0x04000000, 0x02000000}, };

static const struct memory_bank memory_banks_boot_swap_on[] = { - {0x00000000, 0x04000000}, - {0x04000000, 0x04000000}, + {0x00000000, 0x02000000}, + {0x04000000, 0x02000000}, }; #endif