Hi Stephen,

On 25 August 2014 14:19, Tom Warren TWarren@nvidia.com wrote:

Sorry, very low priority for me right now. Try to get someone else to do it, as it may be a long while until I can get to it.

Are you able to test it on your board? I can pull it through the DM tree but would like some sort of independent verification. I will go through the patch once more very carefully.

Tom

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-----Original Message----- From: Stephen Warren [mailto:swarren@wwwdotorg.org] Sent: Monday, August 25, 2014 11:50 AM To: Simon Glass; Tom Warren Cc: U-Boot Mailing List; u-boot-review; Stephen Warren Subject: Re: [PATCH v6 03/12] tegra: Convert tegra GPIO driver to use driver model

On 08/25/2014 12:31 PM, Simon Glass wrote:

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Hi,

On 11 August 2014 09:23, Simon Glass sjg@chromium.org wrote:

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This is an implementation of GPIOs for Tegra that uses driver model. It has been tested on trimslice and also using the new iotrace feature.

The implementation uses a top-level GPIO device (which has no actual

GPIOS).

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Under this all the banks are created as separate GPIO devices.

The GPIOs are named as per the Tegra datasheet/header files: A0..A7, B0..B7, ..., Z0..Z7, AA0..AA7, etc.

Since driver model is not yet available before relocation, or in SPL, a special function is provided for seaboard's SPL code.

Signed-off-by: Simon Glass sjg@chromium.org

Any comments on this one please?

Tom, can you please review this patch/series? Thanks.

-- nvpublic

Regards, Simon