Keystone2 Edison SoC uses the same keystone navigator, but uses different NETCP PktDMA definitions. This patch adds required definitions.

Acked-by: Vitaly Andrianov vitalya@ti.com Acked-by: Murali Karicheri m-karicheri2@ti.com Signed-off-by: Ivan Khoronzhuk ivan.khoronzhuk@ti.com --- arch/arm/include/asm/arch-keystone/hardware-k2e.h | 13 +++++++++++++ 1 file changed, 13 insertions(+)

diff --git a/arch/arm/include/asm/arch-keystone/hardware-k2e.h b/arch/arm/include/asm/arch-keystone/hardware-k2e.h index 62172a4..f09aa93 100644 --- a/arch/arm/include/asm/arch-keystone/hardware-k2e.h +++ b/arch/arm/include/asm/arch-keystone/hardware-k2e.h @@ -41,4 +41,17 @@ /* Number of DSP cores */ #define KS2_NUM_DSPS 1

+/* NETCP pktdma */ +#define KS2_NETCP_PDMA_CTRL_BASE 0x24186000 +#define KS2_NETCP_PDMA_TX_BASE 0x24187000 +#define KS2_NETCP_PDMA_TX_CH_NUM 21 +#define KS2_NETCP_PDMA_RX_BASE 0x24188000 +#define KS2_NETCP_PDMA_RX_CH_NUM 91 +#define KS2_NETCP_PDMA_SCHED_BASE 0x24186100 +#define KS2_NETCP_PDMA_RX_FLOW_BASE 0x24189000 +#define KS2_NETCP_PDMA_RX_FLOW_NUM 96 +#define KS2_NETCP_PDMA_RX_FREE_QUEUE 4001 +#define KS2_NETCP_PDMA_RX_RCV_QUEUE 4002 +#define KS2_NETCP_PDMA_TX_SND_QUEUE 896 + #endif

Keystone2 Edison SoC uses the same keystone SerDes driver. This patch adds support for K2E SoCs.

Acked-by: Vitaly Andrianov vitalya@ti.com Acked-by: Murali Karicheri m-karicheri2@ti.com Signed-off-by: Ivan Khoronzhuk ivan.khoronzhuk@ti.com --- arch/arm/include/asm/arch-keystone/hardware-k2e.h | 4 ++++ drivers/net/keystone_net.c | 6 ++++++ include/configs/k2e_evm.h | 3 +++ include/configs/ks2_evm.h | 1 + 4 files changed, 14 insertions(+)

diff --git a/arch/arm/include/asm/arch-keystone/hardware-k2e.h b/arch/arm/include/asm/arch-keystone/hardware-k2e.h index f09aa93..4eac5f8 100644 --- a/arch/arm/include/asm/arch-keystone/hardware-k2e.h +++ b/arch/arm/include/asm/arch-keystone/hardware-k2e.h @@ -38,6 +38,10 @@ #define KS2_CIC2_DDR3_ECC_IRQ_NUM -1 /* not defined in K2E */ #define KS2_CIC2_DDR3_ECC_CHAN_NUM -1 /* not defined in K2E */

+/* SGMII SerDes */ +#define KS2_SGMII_SERDES2_BASE 0x02324000 +#define KS2_LANES_PER_SGMII_SERDES 4 + /* Number of DSP cores */ #define KS2_NUM_DSPS 1

diff --git a/drivers/net/keystone_net.c b/drivers/net/keystone_net.c index 13a1778..43c263e 100644 --- a/drivers/net/keystone_net.c +++ b/drivers/net/keystone_net.c @@ -551,6 +551,12 @@ static void keystone2_net_serdes_setup(void) &ks2_serdes_sgmii_156p25mhz, CONFIG_KSNET_SERDES_LANES_PER_SGMII);

+#ifdef CONFIG_SOC_K2E + ks2_serdes_init(CONFIG_KSNET_SERDES_SGMII2_BASE, + &ks2_serdes_sgmii_156p25mhz, + CONFIG_KSNET_SERDES_LANES_PER_SGMII); +#endif + /* wait till setup */ udelay(5000); } diff --git a/include/configs/k2e_evm.h b/include/configs/k2e_evm.h index 3502d10..fd45d61 100644 --- a/include/configs/k2e_evm.h +++ b/include/configs/k2e_evm.h @@ -34,4 +34,7 @@ /* NAND Configuration */ #define CONFIG_SYS_NAND_PAGE_2K

+/* SerDes */ +#define CONFIG_TI_KEYSTONE_SERDES + #endif /* __CONFIG_K2E_EVM_H */ diff --git a/include/configs/ks2_evm.h b/include/configs/ks2_evm.h index dcce7c3..a92ab04 100644 --- a/include/configs/ks2_evm.h +++ b/include/configs/ks2_evm.h @@ -140,6 +140,7 @@ #define CONFIG_KSNET_MAC_ID_BASE KS2_MAC_ID_BASE_ADDR #define CONFIG_KSNET_NETCP_BASE KS2_NETCP_BASE #define CONFIG_KSNET_SERDES_SGMII_BASE KS2_SGMII_SERDES_BASE +#define CONFIG_KSNET_SERDES_SGMII2_BASE KS2_SGMII_SERDES2_BASE #define CONFIG_KSNET_SERDES_LANES_PER_SGMII KS2_LANES_PER_SGMII_SERDES

/* AEMIF */

The Keystone2 Edison SoC uses the same keystone net driver. This patch adds opportunity to use it by K2E SoCs.

Acked-by: Vitaly Andrianov vitalya@ti.com Acked-by: Murali Karicheri m-karicheri2@ti.com Signed-off-by: Ivan Khoronzhuk ivan.khoronzhuk@ti.com --- arch/arm/include/asm/arch-keystone/hardware-k2e.h | 3 +++ drivers/net/keystone_net.c | 5 +++++ 2 files changed, 8 insertions(+)

diff --git a/arch/arm/include/asm/arch-keystone/hardware-k2e.h b/arch/arm/include/asm/arch-keystone/hardware-k2e.h index 4eac5f8..ab0d5f9 100644 --- a/arch/arm/include/asm/arch-keystone/hardware-k2e.h +++ b/arch/arm/include/asm/arch-keystone/hardware-k2e.h @@ -58,4 +58,7 @@ #define KS2_NETCP_PDMA_RX_RCV_QUEUE 4002 #define KS2_NETCP_PDMA_TX_SND_QUEUE 896

+/* NETCP */ +#define KS2_NETCP_BASE 0x24000000 + #endif diff --git a/drivers/net/keystone_net.c b/drivers/net/keystone_net.c index 43c263e..1186188 100644 --- a/drivers/net/keystone_net.c +++ b/drivers/net/keystone_net.c @@ -289,6 +289,11 @@ int mac_sl_config(u_int16_t port, struct mac_sl_cfg *cfg) writel(cfg->max_rx_len, DEVICE_EMACSL_BASE(port) + CPGMACSL_REG_MAXLEN); writel(cfg->ctl, DEVICE_EMACSL_BASE(port) + CPGMACSL_REG_CTL);

+#ifdef CONFIG_K2E_EVM + /* Map RX packet flow priority to 0 */ + writel(0, DEVICE_EMACSL_BASE(port) + CPGMACSL_REG_RX_PRI_MAP); +#endif + return ret; }

The new Marvel PHY (88E1514) used on K2L/K2E EVM requires longer time to auto negotiate with SoC's SGMII port.

It can take about 3 sec to up the PHY after reset, so add code to expose sgmii auto negotiation waiting process.

Acked-by: Vitaly Andrianov vitalya@ti.com Signed-off-by: Ivan Khoronzhuk ivan.khoronzhuk@ti.com --- drivers/net/keystone_net.c | 36 +++++++++++++++++++++++++++++++----- 1 file changed, 31 insertions(+), 5 deletions(-)

diff --git a/drivers/net/keystone_net.c b/drivers/net/keystone_net.c index 1186188..c8681d0 100644 --- a/drivers/net/keystone_net.c +++ b/drivers/net/keystone_net.c @@ -11,6 +11,7 @@

#include <net.h> #include <phy.h> +#include <errno.h> #include <miiphy.h> #include <malloc.h> #include <asm/ti-common/keystone_nav.h> @@ -30,6 +31,7 @@ static unsigned int sys_has_mdio = 1; #define RX_BUFF_NUMS 24 #define RX_BUFF_LEN 1520 #define MAX_SIZE_STREAM_BUFFER RX_BUFF_LEN +#define SGMII_ANEG_TIMEOUT 4000

static u8 rx_buffs[RX_BUFF_NUMS * RX_BUFF_LEN] __aligned(16);

@@ -169,7 +171,7 @@ int keystone_sgmii_link_status(int port) (status & SGMII_REG_STATUS_LINK); }

-int keystone_sgmii_config(int port, int interface) +int keystone_sgmii_config(struct phy_device *phy_dev, int port, int interface) { unsigned int i, status, mask; unsigned int mr_adv_ability, control; @@ -230,11 +232,35 @@ int keystone_sgmii_config(int port, int interface) if (control & SGMII_REG_CONTROL_AUTONEG) mask |= SGMII_REG_STATUS_AUTONEG;

- for (i = 0; i < 1000; i++) { + status = __raw_readl(SGMII_STATUS_REG(port)); + if ((status & mask) == mask) + return 0; + + printf("\n%s Waiting for SGMII auto negotiation to complete", + phy_dev->dev->name); + while ((status & mask) != mask) { + /* + * Timeout reached ? + */ + if (i > SGMII_ANEG_TIMEOUT) { + puts(" TIMEOUT !\n"); + phy_dev->link = 0; + return 0; + } + + if (ctrlc()) { + puts("user interrupt!\n"); + phy_dev->link = 0; + return -EINTR; + } + + if ((i++ % 500) == 0) + printf("."); + + udelay(1000); /* 1 ms */ status = __raw_readl(SGMII_STATUS_REG(port)); - if ((status & mask) == mask) - break; } + puts(" done\n");

return 0; } @@ -374,7 +400,7 @@ static int keystone2_eth_open(struct eth_device *dev, bd_t *bis)

keystone2_net_serdes_setup();

- keystone_sgmii_config(eth_priv->slave_port - 1, + keystone_sgmii_config(phy_dev, eth_priv->slave_port - 1, eth_priv->sgmii_link_type);

udelay(10000);

For K2E and K2L SoCs clock output from PASS PLL has to be enabled after NETCP domain and PA module are enabled. So create new function for that and call it after PA module is enabled.

Signed-off-by: Ivan Khoronzhuk ivan.khoronzhuk@ti.com --- arch/arm/cpu/armv7/keystone/clock.c | 17 +++++++++++++---- arch/arm/include/asm/arch-keystone/clock.h | 1 + board/ti/ks2_evm/board.c | 1 + 3 files changed, 15 insertions(+), 4 deletions(-)

diff --git a/arch/arm/cpu/armv7/keystone/clock.c b/arch/arm/cpu/armv7/keystone/clock.c index 47fc893..d13fbc1 100644 --- a/arch/arm/cpu/armv7/keystone/clock.c +++ b/arch/arm/cpu/armv7/keystone/clock.c @@ -185,10 +185,6 @@ void init_pll(const struct pll_init_data *data) tmp &= ~(PLL_BWADJ_HI_MASK); tmp |= ((bwadj >> 8) & PLL_BWADJ_HI_MASK);

- /* set PLL Select (bit 13) for PASS PLL */ - if (data->pll == PASS_PLL) - tmp |= PLLCTL_PAPLL; - __raw_writel(tmp, keystone_pll_regs[data->pll].reg1);

/* Reset bit: bit 14 for both DDR3 & PASS PLL */ @@ -261,3 +257,16 @@ inline int get_max_arm_speed(void) return get_max_speed((read_efuse_bootrom() >> 16) & 0xffff, arm_speeds); } #endif + +void pass_pll_pa_clk_enable(void) +{ + u32 reg; + + reg = readl(keystone_pll_regs[PASS_PLL].reg1); + + reg |= PLLCTL_PAPLL; + writel(reg, keystone_pll_regs[PASS_PLL].reg1); + + /* wait till clock is enabled */ + sdelay(15000); +} diff --git a/arch/arm/include/asm/arch-keystone/clock.h b/arch/arm/include/asm/arch-keystone/clock.h index bc31267..9480e62 100644 --- a/arch/arm/include/asm/arch-keystone/clock.h +++ b/arch/arm/include/asm/arch-keystone/clock.h @@ -50,6 +50,7 @@ void init_pll(const struct pll_init_data *data); unsigned long clk_get_rate(unsigned int clk); unsigned long clk_round_rate(unsigned int clk, unsigned long hz); int clk_set_rate(unsigned int clk, unsigned long hz); +void pass_pll_pa_clk_enable(void); int get_max_dev_speed(void); int get_max_arm_speed(void);

diff --git a/board/ti/ks2_evm/board.c b/board/ti/ks2_evm/board.c index 279ec8e..8991786 100644 --- a/board/ti/ks2_evm/board.c +++ b/board/ti/ks2_evm/board.c @@ -77,6 +77,7 @@ int board_eth_init(bd_t *bis) return -1; if (psc_enable_module(KS2_LPSC_CRYPTO)) return -1; + pass_pll_pa_clk_enable();

port_num = get_num_eth_ports();

From: Hao Zhang hzhang@ti.com

This patch adds network support code and enables keystone_net driver usage for k2e_evm evaluation board.

Acked-by: Vitaly Andrianov vitalya@ti.com Acked-by: Murali Karicheri m-karicheri2@ti.com Signed-off-by: Hao Zhang hzhang@ti.com Signed-off-by: Ivan Khoronzhuk ivan.khoronzhuk@ti.com --- board/ti/ks2_evm/board_k2e.c | 68 +++++++++++++++++++++++++++++++++++++++++++- include/configs/k2e_evm.h | 8 ++++++ 2 files changed, 75 insertions(+), 1 deletion(-)

diff --git a/board/ti/ks2_evm/board_k2e.c b/board/ti/ks2_evm/board_k2e.c index 810a8e2..43dfc48 100644 --- a/board/ti/ks2_evm/board_k2e.c +++ b/board/ti/ks2_evm/board_k2e.c @@ -10,6 +10,7 @@ #include <common.h> #include <asm/arch/ddr3.h> #include <asm/arch/hardware.h> +#include <asm/ti-common/keystone_net.h>

DECLARE_GLOBAL_DATA_PTR;

@@ -35,10 +36,75 @@ static struct pll_init_data core_pll_config[] = { CORE_PLL_1500, };

- static struct pll_init_data pa_pll_config = PASS_PLL_1000;

+#ifdef CONFIG_DRIVER_TI_KEYSTONE_NET +struct eth_priv_t eth_priv_cfg[] = { + { + .int_name = "K2E_EMAC0", + .rx_flow = 0, + .phy_addr = 0, + .slave_port = 1, + .sgmii_link_type = SGMII_LINK_MAC_PHY, + }, + { + .int_name = "K2E_EMAC1", + .rx_flow = 8, + .phy_addr = 1, + .slave_port = 2, + .sgmii_link_type = SGMII_LINK_MAC_PHY, + }, + { + .int_name = "K2E_EMAC2", + .rx_flow = 16, + .phy_addr = 2, + .slave_port = 3, + .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED, + }, + { + .int_name = "K2E_EMAC3", + .rx_flow = 24, + .phy_addr = 3, + .slave_port = 4, + .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED, + }, + { + .int_name = "K2E_EMAC4", + .rx_flow = 32, + .phy_addr = 4, + .slave_port = 5, + .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED, + }, + { + .int_name = "K2E_EMAC5", + .rx_flow = 40, + .phy_addr = 5, + .slave_port = 6, + .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED, + }, + { + .int_name = "K2E_EMAC6", + .rx_flow = 48, + .phy_addr = 6, + .slave_port = 7, + .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED, + }, + { + .int_name = "K2E_EMAC7", + .rx_flow = 56, + .phy_addr = 7, + .slave_port = 8, + .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED, + }, +}; + +int get_num_eth_ports(void) +{ + return sizeof(eth_priv_cfg) / sizeof(struct eth_priv_t); +} +#endif + #if defined(CONFIG_BOARD_EARLY_INIT_F) int board_early_init_f(void) { diff --git a/include/configs/k2e_evm.h b/include/configs/k2e_evm.h index fd45d61..7c8065a 100644 --- a/include/configs/k2e_evm.h +++ b/include/configs/k2e_evm.h @@ -34,6 +34,14 @@ /* NAND Configuration */ #define CONFIG_SYS_NAND_PAGE_2K

+/* Network */ +#define CONFIG_DRIVER_TI_KEYSTONE_NET +#define CONFIG_TI_KSNAV +#define CONFIG_KSNAV_PKTDMA_NETCP +#define CONFIG_KSNET_NETCP_V1_5 +#define CONFIG_KSNET_CPSW_NUM_PORTS 9 +#define CONFIG_KSNET_MDIO_PHY_CONFIG_ENABLE + /* SerDes */ #define CONFIG_TI_KEYSTONE_SERDES