Hi Tom,

Please pull some riscv updates:

- Fix ax25-ae350.rst document. - Refine RISC-V linker script and start.S. - Add option to print more information on exception.

https://travis-ci.org/rickchen36/u-boot-riscv/builds/646697243

Thanks Rick

The following changes since commit e1dff2d69e5a21a61c3eb28e5d230a6d48749b6c:

Merge branch '2020-02-07-master-imports' (2020-02-07 19:04:23 -0500)

are available in the Git repository at:

git@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git

for you to fetch changes up to 404339759ef5e0bcd4fa7768d1148b1ace2d2bb6:

riscv: Remove unnecessary instruction (2020-02-10 14:51:52 +0800)

---------------------------------------------------------------- Heinrich Schuchardt (1): doc: fix AX25-AE350 RISC-V documentation

Jagan Teki (1): doc: fix opensbi build steps for AX25-AE350

Sean Anderson (3): riscv: Fix breakage caused by linker relaxation riscv: Add option to print registers on exception riscv: Remove unnecessary instruction

arch/riscv/Kconfig | 3 + arch/riscv/cpu/mtrap.S | 3 +- arch/riscv/cpu/start.S | 5 +- arch/riscv/cpu/u-boot.lds | 1 - arch/riscv/lib/interrupts.c | 50 +++++++++++++---- doc/board/AndesTech/ax25-ae350.rst | 343 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++--------------------------------------------------------- 6 files changed, 219 insertions(+), 186 deletions(-)