[PATCH] rockchip: rk3399: nanopc-t4: use 1600MHz sdram config
Current 1866MHz sdram config is too high for NanoPC-T4. On this frequency, its lpddr3 sdram becomes unstable, causing memtest failures and random kernel crashes.
Signed-off-by: Lu jicong jiconglu58@gmail.com --- arch/arm/dts/rk3399-nanopc-t4-u-boot.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/rk3399-nanopc-t4-u-boot.dtsi b/arch/arm/dts/rk3399-nanopc-t4-u-boot.dtsi index 17201bcf41..8b6c9059ab 100644 --- a/arch/arm/dts/rk3399-nanopc-t4-u-boot.dtsi +++ b/arch/arm/dts/rk3399-nanopc-t4-u-boot.dtsi @@ -4,4 +4,4 @@ */
#include "rk3399-nanopi4-u-boot.dtsi" -#include "rk3399-sdram-lpddr3-samsung-4GB-1866.dtsi" +#include "rk3399-sdram-lpddr3-4GB-1600.dtsi"
Hi Lu jicong,
Does the 1866M worked for your board before?
I think this config should be fine for other people, it has been submit for 4 years.
Thanks,
- Kever
On 2023/7/5 21:58, Lu jicong wrote:
Current 1866MHz sdram config is too high for NanoPC-T4. On this frequency, its lpddr3 sdram becomes unstable, causing memtest failures and random kernel crashes.
Signed-off-by: Lu jicong jiconglu58@gmail.com
arch/arm/dts/rk3399-nanopc-t4-u-boot.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/rk3399-nanopc-t4-u-boot.dtsi b/arch/arm/dts/rk3399-nanopc-t4-u-boot.dtsi index 17201bcf41..8b6c9059ab 100644 --- a/arch/arm/dts/rk3399-nanopc-t4-u-boot.dtsi +++ b/arch/arm/dts/rk3399-nanopc-t4-u-boot.dtsi @@ -4,4 +4,4 @@ */
#include "rk3399-nanopi4-u-boot.dtsi" -#include "rk3399-sdram-lpddr3-samsung-4GB-1866.dtsi" +#include "rk3399-sdram-lpddr3-4GB-1600.dtsi"
Does the 1866M worked for your board before?
1866M ddr blobs from rkbin works fine on my board, but TPL works bad every time. I have never encountered an exception of this result.
I think this config should be fine for other people, it has been submit for 4 years.
For another tester, this config works fine. But I think the individual difference of this board or different board revision leads to the result. Maybe it is better to lower the frequency to ensure more people can use TPL without problems.
I'm not satisfied with this result. All of FriendlyARM's official system images use 800Mhz DDR binary. So they shouldn't found any problem when some boards' DRAM cannot run at 933Mhz. Although they tested them using 933Mhz DDR binary, my board will still pass the test. But now TPL initialized DRAM cannot run stably, so I can tell TPL DRAM config must be more strict than DDR binary.
Before I add openwrt support for NanoPC T4, there is no public linux OS using TPL to initialize DRAM for NanoPC T4, so there is probably not many people tested TPL. We should make sure every qualified board can run U-Boot without probelms, shouldn't we?
participants (2)
-
Kever Yang -
Lu jicong