Currently only chip-select 0 is supported by the kirkwood SPI driver. The Armada XP / 38x SoCs also use this driver and support multiple chip selects. This patch adds support for multiple CS on MVEBU.

The register definitions are restructured a bit with this patch. Grouping them to the corresponding registers.

Signed-off-by: Stefan Roese sr@denx.de Cc: Luka Perkov luka.perkov@sartura.hr Cc: Jagan Teki jteki@openedev.com --- v2: - Introduce clain_bus() function and move the CS configuration into it. As it only needs to be done once for the active bus.

arch/arm/include/asm/arch-mvebu/spi.h | 17 ++++++++++++----- drivers/spi/kirkwood_spi.c | 16 ++++++++++++++++ 2 files changed, 28 insertions(+), 5 deletions(-)

diff --git a/arch/arm/include/asm/arch-mvebu/spi.h b/arch/arm/include/asm/arch-mvebu/spi.h index 526fea6..78869a2 100644 --- a/arch/arm/include/asm/arch-mvebu/spi.h +++ b/arch/arm/include/asm/arch-mvebu/spi.h @@ -35,13 +35,15 @@ struct kwspi_registers { #define SCK_MPP10 (1 << 1) #define MISO_MPP11 (1 << 2)

+/* Control Register */ +#define KWSPI_CSN_ACT (1 << 0) /* Activates serial memory interface */ +#define KWSPI_SMEMRDY (1 << 1) /* SerMem Data xfer ready */ +#define KWSPI_CS_SHIFT 2 /* chip select shift */ +#define KWSPI_CS_MASK 0x7 /* chip select mask */ + +/* Configuration Register */ #define KWSPI_CLKPRESCL_MASK 0x1f #define KWSPI_CLKPRESCL_MIN 0x12 -#define KWSPI_CSN_ACT 1 /* Activates serial memory interface */ -#define KWSPI_SMEMRDY (1 << 1) /* SerMem Data xfer ready */ -#define KWSPI_IRQUNMASK 1 /* unmask SPI interrupt */ -#define KWSPI_IRQMASK 0 /* mask SPI interrupt */ -#define KWSPI_SMEMRDIRQ 1 /* SerMem data xfer ready irq */ #define KWSPI_XFERLEN_1BYTE 0 #define KWSPI_XFERLEN_2BYTE (1 << 5) #define KWSPI_XFERLEN_MASK (1 << 5) @@ -50,6 +52,11 @@ struct kwspi_registers { #define KWSPI_ADRLEN_3BYTE (2 << 8) #define KWSPI_ADRLEN_4BYTE (3 << 8) #define KWSPI_ADRLEN_MASK (3 << 8) + +#define KWSPI_IRQUNMASK 1 /* unmask SPI interrupt */ +#define KWSPI_IRQMASK 0 /* mask SPI interrupt */ +#define KWSPI_SMEMRDIRQ 1 /* SerMem data xfer ready irq */ + #define KWSPI_TIMEOUT 10000

#endif /* __KW_SPI_H__ */ diff --git a/drivers/spi/kirkwood_spi.c b/drivers/spi/kirkwood_spi.c index 80cdbd0..969abb7 100644 --- a/drivers/spi/kirkwood_spi.c +++ b/drivers/spi/kirkwood_spi.c @@ -283,6 +283,21 @@ static int mvebu_spi_xfer(struct udevice *dev, unsigned int bitlen, return _spi_xfer(plat->spireg, bitlen, dout, din, flags); }

+static int mvebu_spi_claim_bus(struct udevice *dev) +{ +#ifdef CONFIG_ARCH_MVEBU + struct udevice *bus = dev->parent; + struct mvebu_spi_platdata *plat = dev_get_platdata(bus); + + /* Configure the chip-select in the CTRL register */ + clrsetbits_le32(&plat->spireg->ctrl, + KWSPI_CS_MASK << KWSPI_CS_SHIFT, + spi_chip_select(dev) << KWSPI_CS_SHIFT); +#endif + + return 0; +} + static int mvebu_spi_probe(struct udevice *bus) { struct mvebu_spi_platdata *plat = dev_get_platdata(bus); @@ -305,6 +320,7 @@ static int mvebu_spi_ofdata_to_platdata(struct udevice *bus) }

static const struct dm_spi_ops mvebu_spi_ops = { + .claim_bus = mvebu_spi_claim_bus, .xfer = mvebu_spi_xfer, .set_speed = mvebu_spi_set_speed, .set_mode = mvebu_spi_set_mode,