Add IOM_GRP register definitions for i.MX6SL to allow them to be named in DDR configuration (.cfg) files.

Signed-off-by: Eric Nelson eric@nelint.com --- arch/arm/include/asm/arch-mx6/mx6sl-ddr.h | 13 +++++++++++++ 1 file changed, 13 insertions(+)

diff --git a/arch/arm/include/asm/arch-mx6/mx6sl-ddr.h b/arch/arm/include/asm/arch-mx6/mx6sl-ddr.h index c3c4d69..98a259e 100644 --- a/arch/arm/include/asm/arch-mx6/mx6sl-ddr.h +++ b/arch/arm/include/asm/arch-mx6/mx6sl-ddr.h @@ -42,4 +42,17 @@

#define MX6_IOM_DRAM_SDWE_B 0x020e0354

+#define MX6_IOM_GRP_ADDDS 0x020e05ac +#define MX6_IOM_GRP_DDRMODE_CTL 0x020e05b0 +#define MX6_IOM_GRP_DDRPKE 0x020e05b4 +#define MX6_IOM_GRP_DDRPK 0x020e05b8 +#define MX6_IOM_GRP_DDRHYS 0x020e05bc +#define MX6_IOM_GRP_DDRMODE 0x020e05c0 +#define MX6_IOM_GRP_B0DS 0x020e05c4 +#define MX6_IOM_GRP_CTLDS 0x020e05c8 +#define MX6_IOM_GRP_B1DS 0x020e05cc +#define MX6_IOM_GRP_DDR_TYPE 0x020e05d0 +#define MX6_IOM_GRP_B2DS 0x020e05d4 +#define MX6_IOM_GRP_B3DS 0x020e05d8 + #endif /*__ASM_ARCH_MX6SL_DDR_H__ */