Move all the exynos video drivers into one place for ease of maintenance.

Signed-off-by: Simon Glass sjg@chromium.org ---

drivers/video/Makefile | 6 +----- drivers/video/exynos/Makefile | 12 ++++++++++++ drivers/video/{ => exynos}/exynos_dp.c | 0 drivers/video/{ => exynos}/exynos_dp_lowlevel.c | 0 drivers/video/{ => exynos}/exynos_dp_lowlevel.h | 0 drivers/video/{ => exynos}/exynos_fb.c | 0 drivers/video/{ => exynos}/exynos_fb.h | 0 drivers/video/{ => exynos}/exynos_fimd.c | 0 drivers/video/{ => exynos}/exynos_mipi_dsi.c | 0 drivers/video/{ => exynos}/exynos_mipi_dsi_common.c | 0 drivers/video/{ => exynos}/exynos_mipi_dsi_common.h | 0 drivers/video/{ => exynos}/exynos_mipi_dsi_lowlevel.c | 0 drivers/video/{ => exynos}/exynos_mipi_dsi_lowlevel.h | 0 drivers/video/{ => exynos}/exynos_pwm_bl.c | 0 drivers/video/s6e8ax0.c | 4 ++-- 15 files changed, 15 insertions(+), 7 deletions(-) create mode 100644 drivers/video/exynos/Makefile rename drivers/video/{ => exynos}/exynos_dp.c (100%) rename drivers/video/{ => exynos}/exynos_dp_lowlevel.c (100%) rename drivers/video/{ => exynos}/exynos_dp_lowlevel.h (100%) rename drivers/video/{ => exynos}/exynos_fb.c (100%) rename drivers/video/{ => exynos}/exynos_fb.h (100%) rename drivers/video/{ => exynos}/exynos_fimd.c (100%) rename drivers/video/{ => exynos}/exynos_mipi_dsi.c (100%) rename drivers/video/{ => exynos}/exynos_mipi_dsi_common.c (100%) rename drivers/video/{ => exynos}/exynos_mipi_dsi_common.h (100%) rename drivers/video/{ => exynos}/exynos_mipi_dsi_lowlevel.c (100%) rename drivers/video/{ => exynos}/exynos_mipi_dsi_lowlevel.h (100%) rename drivers/video/{ => exynos}/exynos_pwm_bl.c (100%)

diff --git a/drivers/video/Makefile b/drivers/video/Makefile index 084219e..f6f1106 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile @@ -21,11 +21,6 @@ obj-$(CONFIG_ATI_RADEON_FB) += ati_radeon_fb.o videomodes.o obj-$(CONFIG_ATMEL_HLCD) += atmel_hlcdfb.o obj-$(CONFIG_ATMEL_LCD) += atmel_lcdfb.o obj-$(CONFIG_CFB_CONSOLE) += cfb_console.o -obj-$(CONFIG_EXYNOS_DP) += exynos_dp.o exynos_dp_lowlevel.o -obj-$(CONFIG_EXYNOS_FB) += exynos_fb.o exynos_fimd.o -obj-$(CONFIG_EXYNOS_MIPI_DSIM) += exynos_mipi_dsi.o exynos_mipi_dsi_common.o \ - exynos_mipi_dsi_lowlevel.o -obj-$(CONFIG_EXYNOS_PWM_BL) += exynos_pwm_bl.o obj-$(CONFIG_FSL_DIU_FB) += fsl_diu_fb.o videomodes.o obj-$(CONFIG_FSL_DCU_FB) += fsl_dcu_fb.o videomodes.o obj-$(CONFIG_L5F31188) += l5f31188.o @@ -62,6 +57,7 @@ obj-$(CONFIG_LG4573) += lg4573.o obj-$(CONFIG_AM335X_LCD) += am335x-fb.o

obj-${CONFIG_VIDEO_TEGRA124} += tegra124/ +obj-${CONFIG_EXYNOS_FB} += exynos/ obj-${CONFIG_VIDEO_ROCKCHIP} += rockchip/

obj-y += bridge/ diff --git a/drivers/video/exynos/Makefile b/drivers/video/exynos/Makefile new file mode 100644 index 0000000..d4bdf32 --- /dev/null +++ b/drivers/video/exynos/Makefile @@ -0,0 +1,12 @@ +# +# (C) Copyright 2000-2007 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-$(CONFIG_EXYNOS_DP) += exynos_dp.o exynos_dp_lowlevel.o +obj-$(CONFIG_EXYNOS_FB) += exynos_fb.o exynos_fimd.o +obj-$(CONFIG_EXYNOS_MIPI_DSIM) += exynos_mipi_dsi.o exynos_mipi_dsi_common.o \ + exynos_mipi_dsi_lowlevel.o +obj-$(CONFIG_EXYNOS_PWM_BL) += exynos_pwm_bl.o diff --git a/drivers/video/exynos_dp.c b/drivers/video/exynos/exynos_dp.c similarity index 100% rename from drivers/video/exynos_dp.c rename to drivers/video/exynos/exynos_dp.c diff --git a/drivers/video/exynos_dp_lowlevel.c b/drivers/video/exynos/exynos_dp_lowlevel.c similarity index 100% rename from drivers/video/exynos_dp_lowlevel.c rename to drivers/video/exynos/exynos_dp_lowlevel.c diff --git a/drivers/video/exynos_dp_lowlevel.h b/drivers/video/exynos/exynos_dp_lowlevel.h similarity index 100% rename from drivers/video/exynos_dp_lowlevel.h rename to drivers/video/exynos/exynos_dp_lowlevel.h diff --git a/drivers/video/exynos_fb.c b/drivers/video/exynos/exynos_fb.c similarity index 100% rename from drivers/video/exynos_fb.c rename to drivers/video/exynos/exynos_fb.c diff --git a/drivers/video/exynos_fb.h b/drivers/video/exynos/exynos_fb.h similarity index 100% rename from drivers/video/exynos_fb.h rename to drivers/video/exynos/exynos_fb.h diff --git a/drivers/video/exynos_fimd.c b/drivers/video/exynos/exynos_fimd.c similarity index 100% rename from drivers/video/exynos_fimd.c rename to drivers/video/exynos/exynos_fimd.c diff --git a/drivers/video/exynos_mipi_dsi.c b/drivers/video/exynos/exynos_mipi_dsi.c similarity index 100% rename from drivers/video/exynos_mipi_dsi.c rename to drivers/video/exynos/exynos_mipi_dsi.c diff --git a/drivers/video/exynos_mipi_dsi_common.c b/drivers/video/exynos/exynos_mipi_dsi_common.c similarity index 100% rename from drivers/video/exynos_mipi_dsi_common.c rename to drivers/video/exynos/exynos_mipi_dsi_common.c diff --git a/drivers/video/exynos_mipi_dsi_common.h b/drivers/video/exynos/exynos_mipi_dsi_common.h similarity index 100% rename from drivers/video/exynos_mipi_dsi_common.h rename to drivers/video/exynos/exynos_mipi_dsi_common.h diff --git a/drivers/video/exynos_mipi_dsi_lowlevel.c b/drivers/video/exynos/exynos_mipi_dsi_lowlevel.c similarity index 100% rename from drivers/video/exynos_mipi_dsi_lowlevel.c rename to drivers/video/exynos/exynos_mipi_dsi_lowlevel.c diff --git a/drivers/video/exynos_mipi_dsi_lowlevel.h b/drivers/video/exynos/exynos_mipi_dsi_lowlevel.h similarity index 100% rename from drivers/video/exynos_mipi_dsi_lowlevel.h rename to drivers/video/exynos/exynos_mipi_dsi_lowlevel.h diff --git a/drivers/video/exynos_pwm_bl.c b/drivers/video/exynos/exynos_pwm_bl.c similarity index 100% rename from drivers/video/exynos_pwm_bl.c rename to drivers/video/exynos/exynos_pwm_bl.c diff --git a/drivers/video/s6e8ax0.c b/drivers/video/s6e8ax0.c index 8494817..1bd49ee 100644 --- a/drivers/video/s6e8ax0.c +++ b/drivers/video/s6e8ax0.c @@ -9,8 +9,8 @@ #include <common.h> #include <asm/arch/mipi_dsim.h>

-#include "exynos_mipi_dsi_lowlevel.h" -#include "exynos_mipi_dsi_common.h" +#include "exynos/exynos_mipi_dsi_lowlevel.h" +#include "exynos/exynos_mipi_dsi_common.h"

static void s6e8ax0_panel_cond(struct mipi_dsim_device *dsim_dev) {

Use 'struct vidinfo' instead so that we can change this to a struct with a different name in future.

Signed-off-by: Simon Glass sjg@chromium.org ---

arch/arm/mach-exynos/include/mach/mipi_dsim.h | 3 ++- drivers/video/exynos/exynos_fb.c | 10 +++++----- drivers/video/exynos/exynos_fimd.c | 6 +++--- drivers/video/exynos/exynos_mipi_dsi_common.c | 6 +++--- 4 files changed, 13 insertions(+), 12 deletions(-)

diff --git a/arch/arm/mach-exynos/include/mach/mipi_dsim.h b/arch/arm/mach-exynos/include/mach/mipi_dsim.h index c9e8e06..a77b5c8 100644 --- a/arch/arm/mach-exynos/include/mach/mipi_dsim.h +++ b/arch/arm/mach-exynos/include/mach/mipi_dsim.h @@ -369,7 +369,8 @@ int exynos_mipi_dsi_register_lcd_device(struct mipi_dsim_lcd_device *lcd_dev);

void exynos_set_dsim_platform_data(struct exynos_platform_mipi_dsim *pd); -void exynos_init_dsim_platform_data(vidinfo_t *vid); +struct vidinfo; +void exynos_init_dsim_platform_data(struct vidinfo *vid);

/* panel driver init based on mipi dsi interface */ void s6e8ax0_init(void); diff --git a/drivers/video/exynos/exynos_fb.c b/drivers/video/exynos/exynos_fb.c index 39e3ade..90d2038 100644 --- a/drivers/video/exynos/exynos_fb.c +++ b/drivers/video/exynos/exynos_fb.c @@ -28,7 +28,7 @@ DECLARE_GLOBAL_DATA_PTR;

static unsigned int panel_width, panel_height;

-vidinfo_t panel_info = { +struct vidinfo panel_info = { /* * Insert a value here so that we don't end up in the BSS * Reference: drivers/video/tegra.c @@ -45,7 +45,7 @@ ushort *configuration_get_cmap(void) #endif }

-static void exynos_lcd_init_mem(void *lcdbase, vidinfo_t *vid) +static void exynos_lcd_init_mem(void *lcdbase, struct vidinfo *vid) { unsigned long palette_size; unsigned int fb_size; @@ -58,7 +58,7 @@ static void exynos_lcd_init_mem(void *lcdbase, vidinfo_t *vid) (unsigned long)fb_size, palette_size); }

-static void exynos_lcd_init(vidinfo_t *vid) +static void exynos_lcd_init(struct vidinfo *vid) { exynos_fimd_lcd_init(vid);

@@ -94,12 +94,12 @@ __weak void exynos_backlight_reset(void) { }

-__weak int exynos_lcd_misc_init(vidinfo_t *vid) +__weak int exynos_lcd_misc_init(struct vidinfo *vid) { return 0; }

-static void lcd_panel_on(vidinfo_t *vid) +static void lcd_panel_on(struct vidinfo *vid) { struct gpio_desc pwm_out_gpio; struct gpio_desc bl_en_gpio; diff --git a/drivers/video/exynos/exynos_fimd.c b/drivers/video/exynos/exynos_fimd.c index 019d88f..e6fb5d1 100644 --- a/drivers/video/exynos/exynos_fimd.c +++ b/drivers/video/exynos/exynos_fimd.c @@ -22,7 +22,7 @@ DECLARE_GLOBAL_DATA_PTR;

static unsigned long *lcd_base_addr; -static vidinfo_t *pvid; +static struct vidinfo *pvid; static struct exynos_fb *fimd_ctrl;

void exynos_fimd_lcd_init_mem(u_long screen_base, u_long fb_size, @@ -123,7 +123,7 @@ static void exynos_fimd_set_buffer_address(unsigned int win_id) EXYNOS_BUFFER_OFFSET(win_id)); }

-static void exynos_fimd_set_clock(vidinfo_t *pvid) +static void exynos_fimd_set_clock(struct vidinfo *pvid) { unsigned int cfg = 0, div = 0, remainder, remainder_div; unsigned long pixel_clock; @@ -289,7 +289,7 @@ void exynos_fimd_disable_sysmmu(void) } }

-void exynos_fimd_lcd_init(vidinfo_t *vid) +void exynos_fimd_lcd_init(struct vidinfo *vid) { unsigned int cfg = 0, rgb_mode; unsigned int offset; diff --git a/drivers/video/exynos/exynos_mipi_dsi_common.c b/drivers/video/exynos/exynos_mipi_dsi_common.c index 925d515..85c5e0d 100644 --- a/drivers/video/exynos/exynos_mipi_dsi_common.c +++ b/drivers/video/exynos/exynos_mipi_dsi_common.c @@ -465,7 +465,7 @@ int exynos_mipi_dsi_enable_frame_done_int(struct mipi_dsim_device *dsim, }

static void convert_to_fb_videomode(struct fb_videomode *mode1, - vidinfo_t *mode2) + struct vidinfo *mode2) { mode1->xres = mode2->vl_width; mode1->yres = mode2->vl_height; @@ -482,10 +482,10 @@ int exynos_mipi_dsi_set_display_mode(struct mipi_dsim_device *dsim, { struct exynos_platform_mipi_dsim *dsim_pd; struct fb_videomode lcd_video; - vidinfo_t *vid; + struct vidinfo *vid;

dsim_pd = (struct exynos_platform_mipi_dsim *)dsim->pd; - vid = (vidinfo_t *)dsim_pd->lcd_panel_info; + vid = (struct vidinfo *)dsim_pd->lcd_panel_info;

convert_to_fb_videomode(&lcd_video, vid);

Drop these and use parameters instead.

Signed-off-by: Simon Glass sjg@chromium.org ---

drivers/video/exynos/exynos_fb.h | 2 +- drivers/video/exynos/exynos_fimd.c | 51 ++++++++++++++++++++++---------------- include/exynos_lcd.h | 1 + 3 files changed, 31 insertions(+), 23 deletions(-)

diff --git a/drivers/video/exynos/exynos_fb.h b/drivers/video/exynos/exynos_fb.h index 833be6a..f59cce0 100644 --- a/drivers/video/exynos/exynos_fb.h +++ b/drivers/video/exynos/exynos_fb.h @@ -36,6 +36,6 @@ enum exynos_cpu_auto_cmd_rate { void exynos_fimd_lcd_init_mem(unsigned long screen_base, unsigned long fb_size, unsigned long palette_size); void exynos_fimd_lcd_init(struct vidinfo *vid, ulong lcd_base_address); -unsigned long exynos_fimd_calc_fbsize(void); +unsigned long exynos_fimd_calc_fbsize(struct vidinfo *pvid);

#endif diff --git a/drivers/video/exynos/exynos_fimd.c b/drivers/video/exynos/exynos_fimd.c index a1de9ac..039d4c5 100644 --- a/drivers/video/exynos/exynos_fimd.c +++ b/drivers/video/exynos/exynos_fimd.c @@ -21,11 +21,9 @@

DECLARE_GLOBAL_DATA_PTR;

-static struct vidinfo *pvid; -static struct exynos_fb *fimd_ctrl; - -static void exynos_fimd_set_dualrgb(unsigned int enabled) +static void exynos_fimd_set_dualrgb(struct vidinfo *pvid, unsigned int enabled) { + struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl; unsigned int cfg = 0;

if (enabled) { @@ -43,6 +41,7 @@ static void exynos_fimd_set_dualrgb(unsigned int enabled) static void exynos_fimd_set_dp_clkcon(struct vidinfo *pvid, unsigned int enabled) { + struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl; unsigned int cfg = 0;

if (enabled) @@ -53,6 +52,7 @@ static void exynos_fimd_set_dp_clkcon(struct vidinfo *pvid,

static void exynos_fimd_set_par(struct vidinfo *pvid, unsigned int win_id) { + struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl; unsigned int cfg = 0;

/* set window control */ @@ -107,6 +107,7 @@ static void exynos_fimd_set_buffer_address(struct vidinfo *pvid, unsigned int win_id, ulong lcd_base_addr) { + struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl; unsigned long start_addr, end_addr;

start_addr = lcd_base_addr; @@ -121,6 +122,7 @@ static void exynos_fimd_set_buffer_address(struct vidinfo *pvid,

static void exynos_fimd_set_clock(struct vidinfo *pvid) { + struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl; unsigned int cfg = 0, div = 0, remainder, remainder_div; unsigned long pixel_clock; unsigned long long src_clock; @@ -172,8 +174,9 @@ static void exynos_fimd_set_clock(struct vidinfo *pvid) writel(cfg, &fimd_ctrl->vidcon0); }

-void exynos_set_trigger(void) +void exynos_set_trigger(struct vidinfo *pvid) { + struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl; unsigned int cfg = 0;

cfg = readl(&fimd_ctrl->trigcon); @@ -183,8 +186,9 @@ void exynos_set_trigger(void) writel(cfg, &fimd_ctrl->trigcon); }

-int exynos_is_i80_frame_done(void) +int exynos_is_i80_frame_done(struct vidinfo *pvid) { + struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl; unsigned int cfg = 0; int status;

@@ -197,8 +201,9 @@ int exynos_is_i80_frame_done(void) return status; }

-static void exynos_fimd_lcd_on(void) +static void exynos_fimd_lcd_on(struct vidinfo *pvid) { + struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl; unsigned int cfg = 0;

/* display on */ @@ -207,8 +212,9 @@ static void exynos_fimd_lcd_on(void) writel(cfg, &fimd_ctrl->vidcon0); }

-static void exynos_fimd_window_on(unsigned int win_id) +static void exynos_fimd_window_on(struct vidinfo *pvid, unsigned int win_id) { + struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl; unsigned int cfg = 0;

/* enable window */ @@ -223,8 +229,9 @@ static void exynos_fimd_window_on(unsigned int win_id) writel(cfg, &fimd_ctrl->winshmap); }

-void exynos_fimd_lcd_off(void) +void exynos_fimd_lcd_off(struct vidinfo *pvid) { + struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl; unsigned int cfg = 0;

cfg = readl(&fimd_ctrl->vidcon0); @@ -232,8 +239,9 @@ void exynos_fimd_lcd_off(void) writel(cfg, &fimd_ctrl->vidcon0); }

-void exynos_fimd_window_off(unsigned int win_id) +void exynos_fimd_window_off(struct vidinfo *pvid, unsigned int win_id) { + struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl; unsigned int cfg = 0;

cfg = readl((unsigned int)&fimd_ctrl->wincon0 + @@ -285,8 +293,9 @@ void exynos_fimd_disable_sysmmu(void) } }

-void exynos_fimd_lcd_init(struct vidinfo *vid, ulong lcd_base_address) +void exynos_fimd_lcd_init(struct vidinfo *pvid, ulong lcd_base_address) { + struct exynos_fb *fimd_ctrl; unsigned int cfg = 0, rgb_mode; unsigned int offset; unsigned int node; @@ -296,22 +305,20 @@ void exynos_fimd_lcd_init(struct vidinfo *vid, ulong lcd_base_address) if (node <= 0) debug("exynos_fb: Can't get device node for fimd\n");

- fimd_ctrl = (struct exynos_fb *)fdtdec_get_addr(gd->fdt_blob, - node, "reg"); + fimd_ctrl = (struct exynos_fb *)fdtdec_get_addr(gd->fdt_blob, node, + "reg"); if (fimd_ctrl == NULL) debug("Can't get the FIMD base address\n"); + pvid->fimd_ctrl = fimd_ctrl;

if (fdtdec_get_bool(gd->fdt_blob, node, "samsung,disable-sysmmu")) exynos_fimd_disable_sysmmu();

offset = exynos_fimd_get_base_offset();

- /* store panel info to global variable */ - pvid = vid; - - rgb_mode = vid->rgb_mode; + rgb_mode = pvid->rgb_mode;

- if (vid->interface_mode == FIMD_RGB_INTERFACE) { + if (pvid->interface_mode == FIMD_RGB_INTERFACE) { cfg |= EXYNOS_VIDCON0_VIDOUT_RGB; writel(cfg, &fimd_ctrl->vidcon0);

@@ -381,18 +388,18 @@ void exynos_fimd_lcd_init(struct vidinfo *vid, ulong lcd_base_address) exynos_fimd_set_clock(pvid);

/* set rgb mode to dual lcd. */ - exynos_fimd_set_dualrgb(pvid->dual_lcd_enabled); + exynos_fimd_set_dualrgb(pvid, pvid->dual_lcd_enabled);

/* display on */ - exynos_fimd_lcd_on(); + exynos_fimd_lcd_on(pvid);

/* window on */ - exynos_fimd_window_on(pvid->win_id); + exynos_fimd_window_on(pvid, pvid->win_id);

exynos_fimd_set_dp_clkcon(pvid, pvid->dp_enabled); }

-unsigned long exynos_fimd_calc_fbsize(void) +unsigned long exynos_fimd_calc_fbsize(struct vidinfo *pvid) { return pvid->vl_col * pvid->vl_row * (NBITS(pvid->vl_bpix) / 8); } diff --git a/include/exynos_lcd.h b/include/exynos_lcd.h index e1769f0..1f6c6c7 100644 --- a/include/exynos_lcd.h +++ b/include/exynos_lcd.h @@ -75,6 +75,7 @@ typedef struct vidinfo { unsigned int sclk_div;

unsigned int dual_lcd_enabled; + struct exynos_fb *fimd_ctrl; } vidinfo_t;

#endif

Drop these and use parameters instead.

Signed-off-by: Simon Glass sjg@chromium.org ---

drivers/video/exynos/exynos_dp.c | 310 +++++++++++++++++------------- drivers/video/exynos/exynos_dp_lowlevel.c | 195 ++++++++++--------- drivers/video/exynos/exynos_dp_lowlevel.h | 131 +++++++------ 3 files changed, 351 insertions(+), 285 deletions(-)

diff --git a/drivers/video/exynos/exynos_dp.c b/drivers/video/exynos/exynos_dp.c index 5b6fc14..0319d99 100644 --- a/drivers/video/exynos/exynos_dp.c +++ b/drivers/video/exynos/exynos_dp.c @@ -38,20 +38,20 @@ static void exynos_dp_disp_info(struct edp_disp_info *disp_info) return; }

-static int exynos_dp_init_dp(void) +static int exynos_dp_init_dp(struct exynos_dp *dp_regs) { int ret; - exynos_dp_reset(); + exynos_dp_reset(dp_regs);

/* SW defined function Normal operation */ - exynos_dp_enable_sw_func(DP_ENABLE); + exynos_dp_enable_sw_func(dp_regs, DP_ENABLE);

- ret = exynos_dp_init_analog_func(); + ret = exynos_dp_init_analog_func(dp_regs); if (ret != EXYNOS_DP_SUCCESS) return ret;

- exynos_dp_init_hpd(); - exynos_dp_init_aux(); + exynos_dp_init_hpd(dp_regs); + exynos_dp_init_aux(dp_regs);

return ret; } @@ -67,7 +67,7 @@ static unsigned char exynos_dp_calc_edid_check_sum(unsigned char *edid_data) return sum; }

-static unsigned int exynos_dp_read_edid(void) +static unsigned int exynos_dp_read_edid(struct exynos_dp *dp_regs) { unsigned char edid[EDID_BLOCK_LENGTH * 2]; unsigned int extend_block = 0; @@ -82,14 +82,15 @@ static unsigned int exynos_dp_read_edid(void) */

/* Read Extension Flag, Number of 128-byte EDID extension blocks */ - exynos_dp_read_byte_from_i2c(I2C_EDID_DEVICE_ADDR, EDID_EXTENSION_FLAG, - &extend_block); + exynos_dp_read_byte_from_i2c(dp_regs, I2C_EDID_DEVICE_ADDR, + EDID_EXTENSION_FLAG, &extend_block);

if (extend_block > 0) { printf("DP EDID data includes a single extension!\n");

/* Read EDID data */ - retval = exynos_dp_read_bytes_from_i2c(I2C_EDID_DEVICE_ADDR, + retval = exynos_dp_read_bytes_from_i2c(dp_regs, + I2C_EDID_DEVICE_ADDR, EDID_HEADER_PATTERN, EDID_BLOCK_LENGTH, &edid[EDID_HEADER_PATTERN]); @@ -104,7 +105,8 @@ static unsigned int exynos_dp_read_edid(void) }

/* Read additional EDID data */ - retval = exynos_dp_read_bytes_from_i2c(I2C_EDID_DEVICE_ADDR, + retval = exynos_dp_read_bytes_from_i2c(dp_regs, + I2C_EDID_DEVICE_ADDR, EDID_BLOCK_LENGTH, EDID_BLOCK_LENGTH, &edid[EDID_BLOCK_LENGTH]); @@ -118,19 +120,22 @@ static unsigned int exynos_dp_read_edid(void) return -1; }

- exynos_dp_read_byte_from_dpcd(DPCD_TEST_REQUEST, - &test_vector); + exynos_dp_read_byte_from_dpcd(dp_regs, DPCD_TEST_REQUEST, + &test_vector); if (test_vector & DPCD_TEST_EDID_READ) { - exynos_dp_write_byte_to_dpcd(DPCD_TEST_EDID_CHECKSUM, + exynos_dp_write_byte_to_dpcd(dp_regs, + DPCD_TEST_EDID_CHECKSUM, edid[EDID_BLOCK_LENGTH + EDID_CHECKSUM]); - exynos_dp_write_byte_to_dpcd(DPCD_TEST_RESPONSE, + exynos_dp_write_byte_to_dpcd(dp_regs, + DPCD_TEST_RESPONSE, DPCD_TEST_EDID_CHECKSUM_WRITE); } } else { debug("DP EDID data does not include any extensions.\n");

/* Read EDID data */ - retval = exynos_dp_read_bytes_from_i2c(I2C_EDID_DEVICE_ADDR, + retval = exynos_dp_read_bytes_from_i2c(dp_regs, + I2C_EDID_DEVICE_ADDR, EDID_HEADER_PATTERN, EDID_BLOCK_LENGTH, &edid[EDID_HEADER_PATTERN]); @@ -145,12 +150,13 @@ static unsigned int exynos_dp_read_edid(void) return -1; }

- exynos_dp_read_byte_from_dpcd(DPCD_TEST_REQUEST, + exynos_dp_read_byte_from_dpcd(dp_regs, DPCD_TEST_REQUEST, &test_vector); if (test_vector & DPCD_TEST_EDID_READ) { - exynos_dp_write_byte_to_dpcd(DPCD_TEST_EDID_CHECKSUM, - edid[EDID_CHECKSUM]); - exynos_dp_write_byte_to_dpcd(DPCD_TEST_RESPONSE, + exynos_dp_write_byte_to_dpcd(dp_regs, + DPCD_TEST_EDID_CHECKSUM, edid[EDID_CHECKSUM]); + exynos_dp_write_byte_to_dpcd(dp_regs, + DPCD_TEST_RESPONSE, DPCD_TEST_EDID_CHECKSUM_WRITE); } } @@ -160,7 +166,8 @@ static unsigned int exynos_dp_read_edid(void) return 0; }

-static unsigned int exynos_dp_handle_edid(struct edp_device_info *edp_info) +static unsigned int exynos_dp_handle_edid(struct exynos_dp *dp_regs, + struct edp_device_info *edp_info) { unsigned char buf[12]; unsigned int ret; @@ -178,8 +185,8 @@ static unsigned int exynos_dp_handle_edid(struct edp_device_info *edp_info) retry_cnt = 5; while (retry_cnt) { /* Read DPCD 0x0000-0x000b */ - ret = exynos_dp_read_bytes_from_dpcd(DPCD_DPCD_REV, 12, - buf); + ret = exynos_dp_read_bytes_from_dpcd(dp_regs, DPCD_DPCD_REV, 12, + buf); if (ret != EXYNOS_DP_SUCCESS) { if (retry_cnt == 0) { printf("DP read_byte_from_dpcd() failed\n"); @@ -227,7 +234,7 @@ static unsigned int exynos_dp_handle_edid(struct edp_device_info *edp_info) return -EINVAL; }

- ret = exynos_dp_read_edid(); + ret = exynos_dp_read_edid(dp_regs); if (ret != EXYNOS_DP_SUCCESS) { printf("DP exynos_dp_read_edid() failed\n"); return -EINVAL; @@ -236,19 +243,20 @@ static unsigned int exynos_dp_handle_edid(struct edp_device_info *edp_info) return ret; }

-static void exynos_dp_init_training(void) +static void exynos_dp_init_training(struct exynos_dp *dp_regs) { /* * MACRO_RST must be applied after the PLL_LOCK to avoid * the DP inter pair skew issue for at least 10 us */ - exynos_dp_reset_macro(); + exynos_dp_reset_macro(dp_regs);

/* All DP analog module power up */ - exynos_dp_set_analog_power_down(POWER_ALL, 0); + exynos_dp_set_analog_power_down(dp_regs, POWER_ALL, 0); }

-static unsigned int exynos_dp_link_start(struct edp_device_info *edp_info) +static unsigned int exynos_dp_link_start(struct exynos_dp *dp_regs, + struct edp_device_info *edp_info) { unsigned char buf[5]; unsigned int ret = 0; @@ -263,33 +271,32 @@ static unsigned int exynos_dp_link_start(struct edp_device_info *edp_info) edp_info->lt_info.cr_loop[3] = 0;

/* Set sink to D0 (Sink Not Ready) mode. */ - ret = exynos_dp_write_byte_to_dpcd(DPCD_SINK_POWER_STATE, - DPCD_SET_POWER_STATE_D0); + ret = exynos_dp_write_byte_to_dpcd(dp_regs, DPCD_SINK_POWER_STATE, + DPCD_SET_POWER_STATE_D0); if (ret != EXYNOS_DP_SUCCESS) { printf("DP write_dpcd_byte failed\n"); return ret; }

/* Set link rate and count as you want to establish*/ - exynos_dp_set_link_bandwidth(edp_info->lane_bw); - exynos_dp_set_lane_count(edp_info->lane_cnt); + exynos_dp_set_link_bandwidth(dp_regs, edp_info->lane_bw); + exynos_dp_set_lane_count(dp_regs, edp_info->lane_cnt);

/* Setup RX configuration */ buf[0] = edp_info->lane_bw; buf[1] = edp_info->lane_cnt;

- ret = exynos_dp_write_bytes_to_dpcd(DPCD_LINK_BW_SET, 2, - buf); + ret = exynos_dp_write_bytes_to_dpcd(dp_regs, DPCD_LINK_BW_SET, 2, buf); if (ret != EXYNOS_DP_SUCCESS) { printf("DP write_dpcd_byte failed\n"); return ret; }

- exynos_dp_set_lane_pre_emphasis(PRE_EMPHASIS_LEVEL_0, + exynos_dp_set_lane_pre_emphasis(dp_regs, PRE_EMPHASIS_LEVEL_0, edp_info->lane_cnt);

/* Set training pattern 1 */ - exynos_dp_set_training_pattern(TRAINING_PTN1); + exynos_dp_set_training_pattern(dp_regs, TRAINING_PTN1);

/* Set RX training pattern */ buf[0] = DPCD_SCRAMBLING_DISABLED | DPCD_TRAINING_PATTERN_1; @@ -303,8 +310,8 @@ static unsigned int exynos_dp_link_start(struct edp_device_info *edp_info) buf[4] = DPCD_PRE_EMPHASIS_SET_PATTERN_2_LEVEL_0 | DPCD_VOLTAGE_SWING_SET_PATTERN_1_LEVEL_0;

- ret = exynos_dp_write_bytes_to_dpcd(DPCD_TRAINING_PATTERN_SET, - 5, buf); + ret = exynos_dp_write_bytes_to_dpcd(dp_regs, DPCD_TRAINING_PATTERN_SET, + 5, buf); if (ret != EXYNOS_DP_SUCCESS) { printf("DP write_dpcd_byte failed\n"); return ret; @@ -313,14 +320,14 @@ static unsigned int exynos_dp_link_start(struct edp_device_info *edp_info) return ret; }

-static unsigned int exynos_dp_training_pattern_dis(void) +static unsigned int exynos_dp_training_pattern_dis(struct exynos_dp *dp_regs) { unsigned int ret = EXYNOS_DP_SUCCESS;

- exynos_dp_set_training_pattern(DP_NONE); + exynos_dp_set_training_pattern(dp_regs, DP_NONE);

- ret = exynos_dp_write_byte_to_dpcd(DPCD_TRAINING_PATTERN_SET, - DPCD_TRAINING_PATTERN_DISABLED); + ret = exynos_dp_write_byte_to_dpcd(dp_regs, DPCD_TRAINING_PATTERN_SET, + DPCD_TRAINING_PATTERN_DISABLED); if (ret != EXYNOS_DP_SUCCESS) { printf("DP requst_link_traninig_req failed\n"); return -EAGAIN; @@ -329,13 +336,14 @@ static unsigned int exynos_dp_training_pattern_dis(void) return ret; }

-static unsigned int exynos_dp_enable_rx_to_enhanced_mode(unsigned char enable) +static unsigned int exynos_dp_enable_rx_to_enhanced_mode( + struct exynos_dp *dp_regs, unsigned char enable) { unsigned char data; unsigned int ret = EXYNOS_DP_SUCCESS;

- ret = exynos_dp_read_byte_from_dpcd(DPCD_LANE_COUNT_SET, - &data); + ret = exynos_dp_read_byte_from_dpcd(dp_regs, DPCD_LANE_COUNT_SET, + &data); if (ret != EXYNOS_DP_SUCCESS) { printf("DP read_from_dpcd failed\n"); return -EAGAIN; @@ -346,8 +354,7 @@ static unsigned int exynos_dp_enable_rx_to_enhanced_mode(unsigned char enable) else data = DPCD_LN_COUNT_SET(data);

- ret = exynos_dp_write_byte_to_dpcd(DPCD_LANE_COUNT_SET, - data); + ret = exynos_dp_write_byte_to_dpcd(dp_regs, DPCD_LANE_COUNT_SET, data); if (ret != EXYNOS_DP_SUCCESS) { printf("DP write_to_dpcd failed\n"); return -EAGAIN; @@ -357,23 +364,25 @@ static unsigned int exynos_dp_enable_rx_to_enhanced_mode(unsigned char enable) return ret; }

-static unsigned int exynos_dp_set_enhanced_mode(unsigned char enhance_mode) +static unsigned int exynos_dp_set_enhanced_mode(struct exynos_dp *dp_regs, + unsigned char enhance_mode) { unsigned int ret = EXYNOS_DP_SUCCESS;

- ret = exynos_dp_enable_rx_to_enhanced_mode(enhance_mode); + ret = exynos_dp_enable_rx_to_enhanced_mode(dp_regs, enhance_mode); if (ret != EXYNOS_DP_SUCCESS) { printf("DP rx_enhance_mode failed\n"); return -EAGAIN; }

- exynos_dp_enable_enhanced_mode(enhance_mode); + exynos_dp_enable_enhanced_mode(dp_regs, enhance_mode);

return ret; }

-static int exynos_dp_read_dpcd_lane_stat(struct edp_device_info *edp_info, - unsigned char *status) +static int exynos_dp_read_dpcd_lane_stat(struct exynos_dp *dp_regs, + struct edp_device_info *edp_info, + unsigned char *status) { unsigned int ret, i; unsigned char buf[2]; @@ -385,7 +394,8 @@ static int exynos_dp_read_dpcd_lane_stat(struct edp_device_info *edp_info, shift_val[2] = 0; shift_val[3] = 4;

- ret = exynos_dp_read_bytes_from_dpcd(DPCD_LANE0_1_STATUS, 2, buf); + ret = exynos_dp_read_bytes_from_dpcd(dp_regs, DPCD_LANE0_1_STATUS, 2, + buf); if (ret != EXYNOS_DP_SUCCESS) { printf("DP read lane status failed\n"); return ret; @@ -404,8 +414,8 @@ static int exynos_dp_read_dpcd_lane_stat(struct edp_device_info *edp_info, return ret; }

-static unsigned int exynos_dp_read_dpcd_adj_req(unsigned char lane_num, - unsigned char *sw, unsigned char *em) +static unsigned int exynos_dp_read_dpcd_adj_req(struct exynos_dp *dp_regs, + unsigned char lane_num, unsigned char *sw, unsigned char *em) { unsigned int ret = EXYNOS_DP_SUCCESS; unsigned char buf; @@ -415,7 +425,7 @@ static unsigned int exynos_dp_read_dpcd_adj_req(unsigned char lane_num, /*lane_num value is used as arry index, so this range 0 ~ 3 */ dpcd_addr = DPCD_ADJUST_REQUEST_LANE0_1 + (lane_num / 2);

- ret = exynos_dp_read_byte_from_dpcd(dpcd_addr, &buf); + ret = exynos_dp_read_byte_from_dpcd(dp_regs, dpcd_addr, &buf); if (ret != EXYNOS_DP_SUCCESS) { printf("DP read adjust request failed\n"); return -EAGAIN; @@ -427,17 +437,18 @@ static unsigned int exynos_dp_read_dpcd_adj_req(unsigned char lane_num, return ret; }

-static int exynos_dp_equalizer_err_link(struct edp_device_info *edp_info) +static int exynos_dp_equalizer_err_link(struct exynos_dp *dp_regs, + struct edp_device_info *edp_info) { int ret;

- ret = exynos_dp_training_pattern_dis(); + ret = exynos_dp_training_pattern_dis(dp_regs); if (ret != EXYNOS_DP_SUCCESS) { printf("DP training_patter_disable() failed\n"); edp_info->lt_info.lt_status = DP_LT_FAIL; }

- ret = exynos_dp_set_enhanced_mode(edp_info->dpcd_efc); + ret = exynos_dp_set_enhanced_mode(dp_regs, edp_info->dpcd_efc); if (ret != EXYNOS_DP_SUCCESS) { printf("DP set_enhanced_mode() failed\n"); edp_info->lt_info.lt_status = DP_LT_FAIL; @@ -446,7 +457,8 @@ static int exynos_dp_equalizer_err_link(struct edp_device_info *edp_info) return ret; }

-static int exynos_dp_reduce_link_rate(struct edp_device_info *edp_info) +static int exynos_dp_reduce_link_rate(struct exynos_dp *dp_regs, + struct edp_device_info *edp_info) { int ret;

@@ -456,11 +468,11 @@ static int exynos_dp_reduce_link_rate(struct edp_device_info *edp_info) edp_info->lt_info.lt_status = DP_LT_START; ret = EXYNOS_DP_SUCCESS; } else { - ret = exynos_dp_training_pattern_dis(); + ret = exynos_dp_training_pattern_dis(dp_regs); if (ret != EXYNOS_DP_SUCCESS) printf("DP training_patter_disable() failed\n");

- ret = exynos_dp_set_enhanced_mode(edp_info->dpcd_efc); + ret = exynos_dp_set_enhanced_mode(dp_regs, edp_info->dpcd_efc); if (ret != EXYNOS_DP_SUCCESS) printf("DP set_enhanced_mode() failed\n");

@@ -470,8 +482,8 @@ static int exynos_dp_reduce_link_rate(struct edp_device_info *edp_info) return ret; }

-static unsigned int exynos_dp_process_clock_recovery(struct edp_device_info - *edp_info) +static unsigned int exynos_dp_process_clock_recovery(struct exynos_dp *dp_regs, + struct edp_device_info *edp_info) { unsigned int ret = EXYNOS_DP_SUCCESS; unsigned char lane_stat; @@ -484,7 +496,7 @@ static unsigned int exynos_dp_process_clock_recovery(struct edp_device_info debug("DP: %s was called\n", __func__); mdelay(1);

- ret = exynos_dp_read_dpcd_lane_stat(edp_info, &lane_stat); + ret = exynos_dp_read_dpcd_lane_stat(dp_regs, edp_info, &lane_stat); if (ret != EXYNOS_DP_SUCCESS) { printf("DP read lane status failed\n"); edp_info->lt_info.lt_status = DP_LT_FAIL; @@ -493,11 +505,11 @@ static unsigned int exynos_dp_process_clock_recovery(struct edp_device_info

if (lane_stat & DP_LANE_STAT_CR_DONE) { debug("DP clock Recovery training succeed\n"); - exynos_dp_set_training_pattern(TRAINING_PTN2); + exynos_dp_set_training_pattern(dp_regs, TRAINING_PTN2);

for (i = 0; i < edp_info->lane_cnt; i++) { - ret = exynos_dp_read_dpcd_adj_req(i, &adj_req_sw, - &adj_req_em); + ret = exynos_dp_read_dpcd_adj_req(dp_regs, i, + &adj_req_sw, &adj_req_em); if (ret != EXYNOS_DP_SUCCESS) { edp_info->lt_info.lt_status = DP_LT_FAIL; return ret; @@ -511,7 +523,8 @@ static unsigned int exynos_dp_process_clock_recovery(struct edp_device_info lt_ctl_val[i] |= MAX_DRIVE_CURRENT_REACH_3 | MAX_PRE_EMPHASIS_REACH_3; } - exynos_dp_set_lanex_pre_emphasis(lt_ctl_val[i], i); + exynos_dp_set_lanex_pre_emphasis(dp_regs, + lt_ctl_val[i], i); }

buf[0] = DPCD_SCRAMBLING_DISABLED | DPCD_TRAINING_PATTERN_2; @@ -520,7 +533,7 @@ static unsigned int exynos_dp_process_clock_recovery(struct edp_device_info buf[3] = lt_ctl_val[2]; buf[4] = lt_ctl_val[3];

- ret = exynos_dp_write_bytes_to_dpcd( + ret = exynos_dp_write_bytes_to_dpcd(dp_regs, DPCD_TRAINING_PATTERN_SET, 5, buf); if (ret != EXYNOS_DP_SUCCESS) { printf("DP write traning pattern1 failed\n"); @@ -530,8 +543,9 @@ static unsigned int exynos_dp_process_clock_recovery(struct edp_device_info edp_info->lt_info.lt_status = DP_LT_ET; } else { for (i = 0; i < edp_info->lane_cnt; i++) { - lt_ctl_val[i] = exynos_dp_get_lanex_pre_emphasis(i); - ret = exynos_dp_read_dpcd_adj_req(i, + lt_ctl_val[i] = exynos_dp_get_lanex_pre_emphasis( + dp_regs, i); + ret = exynos_dp_read_dpcd_adj_req(dp_regs, i, &adj_req_sw, &adj_req_em); if (ret != EXYNOS_DP_SUCCESS) { printf("DP read adj req failed\n"); @@ -541,7 +555,8 @@ static unsigned int exynos_dp_process_clock_recovery(struct edp_device_info

if ((adj_req_sw == VOLTAGE_LEVEL_3) || (adj_req_em == PRE_EMPHASIS_LEVEL_3)) - ret = exynos_dp_reduce_link_rate(edp_info); + ret = exynos_dp_reduce_link_rate(dp_regs, + edp_info);

if ((DRIVE_CURRENT_SET_0_GET(lt_ctl_val[i]) == adj_req_sw) && @@ -550,7 +565,7 @@ static unsigned int exynos_dp_process_clock_recovery(struct edp_device_info edp_info->lt_info.cr_loop[i]++; if (edp_info->lt_info.cr_loop[i] == MAX_CR_LOOP) ret = exynos_dp_reduce_link_rate( - edp_info); + dp_regs, edp_info); }

lt_ctl_val[i] = 0; @@ -561,10 +576,11 @@ static unsigned int exynos_dp_process_clock_recovery(struct edp_device_info lt_ctl_val[i] |= MAX_DRIVE_CURRENT_REACH_3 | MAX_PRE_EMPHASIS_REACH_3; } - exynos_dp_set_lanex_pre_emphasis(lt_ctl_val[i], i); + exynos_dp_set_lanex_pre_emphasis(dp_regs, + lt_ctl_val[i], i); }

- ret = exynos_dp_write_bytes_to_dpcd( + ret = exynos_dp_write_bytes_to_dpcd(dp_regs, DPCD_TRAINING_LANE0_SET, 4, lt_ctl_val); if (ret != EXYNOS_DP_SUCCESS) { printf("DP write traning pattern2 failed\n"); @@ -576,8 +592,8 @@ static unsigned int exynos_dp_process_clock_recovery(struct edp_device_info return ret; }

-static unsigned int exynos_dp_process_equalizer_training(struct edp_device_info - *edp_info) +static unsigned int exynos_dp_process_equalizer_training( + struct exynos_dp *dp_regs, struct edp_device_info *edp_info) { unsigned int ret = EXYNOS_DP_SUCCESS; unsigned char lane_stat, adj_req_sw, adj_req_em, i; @@ -589,7 +605,7 @@ static unsigned int exynos_dp_process_equalizer_training(struct edp_device_info

mdelay(1);

- ret = exynos_dp_read_dpcd_lane_stat(edp_info, &lane_stat); + ret = exynos_dp_read_dpcd_lane_stat(dp_regs, edp_info, &lane_stat); if (ret != EXYNOS_DP_SUCCESS) { printf("DP read lane status failed\n"); edp_info->lt_info.lt_status = DP_LT_FAIL; @@ -599,8 +615,9 @@ static unsigned int exynos_dp_process_equalizer_training(struct edp_device_info debug("DP lane stat : %x\n", lane_stat);

if (lane_stat & DP_LANE_STAT_CR_DONE) { - ret = exynos_dp_read_byte_from_dpcd(DPCD_LN_ALIGN_UPDATED, - &sink_stat); + ret = exynos_dp_read_byte_from_dpcd(dp_regs, + DPCD_LN_ALIGN_UPDATED, + &sink_stat); if (ret != EXYNOS_DP_SUCCESS) { edp_info->lt_info.lt_status = DP_LT_FAIL;

@@ -610,7 +627,7 @@ static unsigned int exynos_dp_process_equalizer_training(struct edp_device_info interlane_aligned = (sink_stat & DPCD_INTERLANE_ALIGN_DONE);

for (i = 0; i < edp_info->lane_cnt; i++) { - ret = exynos_dp_read_dpcd_adj_req(i, + ret = exynos_dp_read_dpcd_adj_req(dp_regs, i, &adj_req_sw, &adj_req_em); if (ret != EXYNOS_DP_SUCCESS) { printf("DP read adj req 1 failed\n"); @@ -634,15 +651,15 @@ static unsigned int exynos_dp_process_equalizer_training(struct edp_device_info && (interlane_aligned == DPCD_INTERLANE_ALIGN_DONE)) { debug("DP Equalizer training succeed\n");

- f_bw = exynos_dp_get_link_bandwidth(); - f_lane_cnt = exynos_dp_get_lane_count(); + f_bw = exynos_dp_get_link_bandwidth(dp_regs); + f_lane_cnt = exynos_dp_get_lane_count(dp_regs);

debug("DP final BandWidth : %x\n", f_bw); debug("DP final Lane Count : %x\n", f_lane_cnt);

edp_info->lt_info.lt_status = DP_LT_FINISHED;

- exynos_dp_equalizer_err_link(edp_info); + exynos_dp_equalizer_err_link(dp_regs, edp_info);

} else { edp_info->lt_info.ep_loop++; @@ -650,46 +667,49 @@ static unsigned int exynos_dp_process_equalizer_training(struct edp_device_info if (edp_info->lt_info.ep_loop > MAX_EQ_LOOP) { if (edp_info->lane_bw == DP_LANE_BW_2_70) { ret = exynos_dp_reduce_link_rate( - edp_info); + dp_regs, edp_info); } else { edp_info->lt_info.lt_status = DP_LT_FAIL; - exynos_dp_equalizer_err_link(edp_info); + exynos_dp_equalizer_err_link(dp_regs, + edp_info); } } else { for (i = 0; i < edp_info->lane_cnt; i++) exynos_dp_set_lanex_pre_emphasis( - lt_ctl_val[i], i); + dp_regs, lt_ctl_val[i], i);

- ret = exynos_dp_write_bytes_to_dpcd( - DPCD_TRAINING_LANE0_SET, - 4, lt_ctl_val); + ret = exynos_dp_write_bytes_to_dpcd(dp_regs, + DPCD_TRAINING_LANE0_SET, + 4, lt_ctl_val); if (ret != EXYNOS_DP_SUCCESS) { printf("DP set lt pattern failed\n"); edp_info->lt_info.lt_status = DP_LT_FAIL; - exynos_dp_equalizer_err_link(edp_info); + exynos_dp_equalizer_err_link(dp_regs, + edp_info); } } } } else if (edp_info->lane_bw == DP_LANE_BW_2_70) { - ret = exynos_dp_reduce_link_rate(edp_info); + ret = exynos_dp_reduce_link_rate(dp_regs, edp_info); } else { edp_info->lt_info.lt_status = DP_LT_FAIL; - exynos_dp_equalizer_err_link(edp_info); + exynos_dp_equalizer_err_link(dp_regs, edp_info); }

return ret; }

-static unsigned int exynos_dp_sw_link_training(struct edp_device_info *edp_info) +static unsigned int exynos_dp_sw_link_training(struct exynos_dp *dp_regs, + struct edp_device_info *edp_info) { unsigned int ret = 0; int training_finished;

/* Turn off unnecessary lane */ if (edp_info->lane_cnt == 1) - exynos_dp_set_analog_power_down(CH1_BLOCK, 1); + exynos_dp_set_analog_power_down(dp_regs, CH1_BLOCK, 1);

training_finished = 0;

@@ -699,21 +719,23 @@ static unsigned int exynos_dp_sw_link_training(struct edp_device_info *edp_info) while (!training_finished) { switch (edp_info->lt_info.lt_status) { case DP_LT_START: - ret = exynos_dp_link_start(edp_info); + ret = exynos_dp_link_start(dp_regs, edp_info); if (ret != EXYNOS_DP_SUCCESS) { printf("DP LT:link start failed\n"); return ret; } break; case DP_LT_CR: - ret = exynos_dp_process_clock_recovery(edp_info); + ret = exynos_dp_process_clock_recovery(dp_regs, + edp_info); if (ret != EXYNOS_DP_SUCCESS) { printf("DP LT:clock recovery failed\n"); return ret; } break; case DP_LT_ET: - ret = exynos_dp_process_equalizer_training(edp_info); + ret = exynos_dp_process_equalizer_training(dp_regs, + edp_info); if (ret != EXYNOS_DP_SUCCESS) { printf("DP LT:equalizer training failed\n"); return ret; @@ -730,40 +752,43 @@ static unsigned int exynos_dp_sw_link_training(struct edp_device_info *edp_info) return ret; }

-static unsigned int exynos_dp_set_link_train(struct edp_device_info *edp_info) +static unsigned int exynos_dp_set_link_train(struct exynos_dp *dp_regs, + struct edp_device_info *edp_info) { unsigned int ret;

- exynos_dp_init_training(); + exynos_dp_init_training(dp_regs);

- ret = exynos_dp_sw_link_training(edp_info); + ret = exynos_dp_sw_link_training(dp_regs, edp_info); if (ret != EXYNOS_DP_SUCCESS) printf("DP dp_sw_link_traning() failed\n");

return ret; }

-static void exynos_dp_enable_scramble(unsigned int enable) +static void exynos_dp_enable_scramble(struct exynos_dp *dp_regs, + unsigned int enable) { unsigned char data;

if (enable) { - exynos_dp_enable_scrambling(DP_ENABLE); + exynos_dp_enable_scrambling(dp_regs, DP_ENABLE);

- exynos_dp_read_byte_from_dpcd(DPCD_TRAINING_PATTERN_SET, - &data); - exynos_dp_write_byte_to_dpcd(DPCD_TRAINING_PATTERN_SET, + exynos_dp_read_byte_from_dpcd(dp_regs, + DPCD_TRAINING_PATTERN_SET, &data); + exynos_dp_write_byte_to_dpcd(dp_regs, DPCD_TRAINING_PATTERN_SET, (u8)(data & ~DPCD_SCRAMBLING_DISABLED)); } else { - exynos_dp_enable_scrambling(DP_DISABLE); - exynos_dp_read_byte_from_dpcd(DPCD_TRAINING_PATTERN_SET, - &data); - exynos_dp_write_byte_to_dpcd(DPCD_TRAINING_PATTERN_SET, + exynos_dp_enable_scrambling(dp_regs, DP_DISABLE); + exynos_dp_read_byte_from_dpcd(dp_regs, + DPCD_TRAINING_PATTERN_SET, &data); + exynos_dp_write_byte_to_dpcd(dp_regs, DPCD_TRAINING_PATTERN_SET, (u8)(data | DPCD_SCRAMBLING_DISABLED)); } }

-static unsigned int exynos_dp_config_video(struct edp_device_info *edp_info) +static unsigned int exynos_dp_config_video(struct exynos_dp *dp_regs, + struct edp_device_info *edp_info) { unsigned int ret = 0; unsigned int retry_cnt; @@ -775,17 +800,18 @@ static unsigned int exynos_dp_config_video(struct edp_device_info *edp_info) return -ENODEV; } else { /* debug slave */ - exynos_dp_config_video_slave_mode(&edp_info->video_info); + exynos_dp_config_video_slave_mode(dp_regs, + &edp_info->video_info); }

- exynos_dp_set_video_color_format(&edp_info->video_info); + exynos_dp_set_video_color_format(dp_regs, &edp_info->video_info);

if (edp_info->video_info.bist_mode) { - if (exynos_dp_config_video_bist(edp_info) != 0) + if (exynos_dp_config_video_bist(dp_regs, edp_info) != 0) return -1; }

- ret = exynos_dp_get_pll_lock_status(); + ret = exynos_dp_get_pll_lock_status(dp_regs); if (ret != PLL_LOCKED) { printf("DP PLL is not locked yet\n"); return -EIO; @@ -794,7 +820,7 @@ static unsigned int exynos_dp_config_video(struct edp_device_info *edp_info) if (edp_info->video_info.master_mode == 0) { retry_cnt = 10; while (retry_cnt) { - ret = exynos_dp_is_slave_video_stream_clock_on(); + ret = exynos_dp_is_slave_video_stream_clock_on(dp_regs); if (ret != EXYNOS_DP_SUCCESS) { if (retry_cnt == 0) { printf("DP stream_clock_on failed\n"); @@ -808,32 +834,34 @@ static unsigned int exynos_dp_config_video(struct edp_device_info *edp_info) }

/* Set to use the register calculated M/N video */ - exynos_dp_set_video_cr_mn(CALCULATED_M, 0, 0); + exynos_dp_set_video_cr_mn(dp_regs, CALCULATED_M, 0, 0);

/* For video bist, Video timing must be generated by register */ - exynos_dp_set_video_timing_mode(VIDEO_TIMING_FROM_CAPTURE); + exynos_dp_set_video_timing_mode(dp_regs, VIDEO_TIMING_FROM_CAPTURE);

/* Enable video bist */ if (edp_info->video_info.bist_pattern != COLOR_RAMP && edp_info->video_info.bist_pattern != BALCK_WHITE_V_LINES && edp_info->video_info.bist_pattern != COLOR_SQUARE) - exynos_dp_enable_video_bist(edp_info->video_info.bist_mode); + exynos_dp_enable_video_bist(dp_regs, + edp_info->video_info.bist_mode); else - exynos_dp_enable_video_bist(DP_DISABLE); + exynos_dp_enable_video_bist(dp_regs, DP_DISABLE);

/* Disable video mute */ - exynos_dp_enable_video_mute(DP_DISABLE); + exynos_dp_enable_video_mute(dp_regs, DP_DISABLE);

/* Configure video Master or Slave mode */ - exynos_dp_enable_video_master(edp_info->video_info.master_mode); + exynos_dp_enable_video_master(dp_regs, + edp_info->video_info.master_mode);

/* Enable video */ - exynos_dp_start_video(); + exynos_dp_start_video(dp_regs);

if (edp_info->video_info.master_mode == 0) { retry_cnt = 100; while (retry_cnt) { - ret = exynos_dp_is_video_stream_on(); + ret = exynos_dp_is_video_stream_on(dp_regs); if (ret != EXYNOS_DP_SUCCESS) { if (retry_cnt == 0) { printf("DP Timeout of video stream\n"); @@ -907,6 +935,8 @@ unsigned int exynos_init_dp(void) { unsigned int ret; struct edp_device_info *edp_info; + struct exynos_dp *dp_regs; + int node;

edp_info = kzalloc(sizeof(struct edp_device_info), GFP_KERNEL); if (!edp_info) { @@ -917,39 +947,47 @@ unsigned int exynos_init_dp(void) if (exynos_dp_parse_dt(gd->fdt_blob, edp_info)) debug("unable to parse DP DT node\n");

- exynos_dp_set_base_addr(); + node = fdtdec_next_compatible(gd->fdt_blob, 0, + COMPAT_SAMSUNG_EXYNOS5_DP); + if (node <= 0) + debug("exynos_dp: Can't get device node for dp\n"); + + dp_regs = (struct exynos_dp *)fdtdec_get_addr(gd->fdt_blob, node, + "reg"); + if (dp_regs == NULL) + debug("Can't get the DP base address\n");

exynos_dp_disp_info(&edp_info->disp_info);

exynos_set_dp_phy(1);

- ret = exynos_dp_init_dp(); + ret = exynos_dp_init_dp(dp_regs); if (ret != EXYNOS_DP_SUCCESS) { printf("DP exynos_dp_init_dp() failed\n"); return ret; }

- ret = exynos_dp_handle_edid(edp_info); + ret = exynos_dp_handle_edid(dp_regs, edp_info); if (ret != EXYNOS_DP_SUCCESS) { printf("EDP handle_edid fail\n"); return ret; }

- ret = exynos_dp_set_link_train(edp_info); + ret = exynos_dp_set_link_train(dp_regs, edp_info); if (ret != EXYNOS_DP_SUCCESS) { printf("DP link training fail\n"); return ret; }

- exynos_dp_enable_scramble(DP_ENABLE); - exynos_dp_enable_rx_to_enhanced_mode(DP_ENABLE); - exynos_dp_enable_enhanced_mode(DP_ENABLE); + exynos_dp_enable_scramble(dp_regs, DP_ENABLE); + exynos_dp_enable_rx_to_enhanced_mode(dp_regs, DP_ENABLE); + exynos_dp_enable_enhanced_mode(dp_regs, DP_ENABLE);

- exynos_dp_set_link_bandwidth(edp_info->lane_bw); - exynos_dp_set_lane_count(edp_info->lane_cnt); + exynos_dp_set_link_bandwidth(dp_regs, edp_info->lane_bw); + exynos_dp_set_lane_count(dp_regs, edp_info->lane_cnt);

- exynos_dp_init_video(); - ret = exynos_dp_config_video(edp_info); + exynos_dp_init_video(dp_regs); + ret = exynos_dp_config_video(dp_regs, edp_info); if (ret != EXYNOS_DP_SUCCESS) { printf("Exynos DP init failed\n"); return ret; diff --git a/drivers/video/exynos/exynos_dp_lowlevel.c b/drivers/video/exynos/exynos_dp_lowlevel.c index 4931509..05e64b6 100644 --- a/drivers/video/exynos/exynos_dp_lowlevel.c +++ b/drivers/video/exynos/exynos_dp_lowlevel.c @@ -14,26 +14,13 @@ #include <asm/arch/dp.h> #include <fdtdec.h> #include <libfdt.h> +#include "exynos_dp_lowlevel.h"

/* Declare global data pointer */ DECLARE_GLOBAL_DATA_PTR;

-struct exynos_dp *dp_regs; - -void exynos_dp_set_base_addr(void) -{ - unsigned int node = fdtdec_next_compatible(gd->fdt_blob, - 0, COMPAT_SAMSUNG_EXYNOS5_DP); - if (node <= 0) - debug("exynos_dp: Can't get device node for dp\n"); - - dp_regs = (struct exynos_dp *)fdtdec_get_addr(gd->fdt_blob, - node, "reg"); - if (dp_regs == NULL) - debug("Can't get the DP base address\n"); -} - -static void exynos_dp_enable_video_input(unsigned int enable) +static void exynos_dp_enable_video_input(struct exynos_dp *dp_regs, + unsigned int enable) { unsigned int reg;

@@ -49,7 +36,7 @@ static void exynos_dp_enable_video_input(unsigned int enable) return; }

-void exynos_dp_enable_video_bist(unsigned int enable) +void exynos_dp_enable_video_bist(struct exynos_dp *dp_regs, unsigned int enable) { /*enable video bist*/ unsigned int reg; @@ -66,7 +53,7 @@ void exynos_dp_enable_video_bist(unsigned int enable) return; }

-void exynos_dp_enable_video_mute(unsigned int enable) +void exynos_dp_enable_video_mute(struct exynos_dp *dp_regs, unsigned int enable) { unsigned int reg;

@@ -81,7 +68,7 @@ void exynos_dp_enable_video_mute(unsigned int enable) }

-static void exynos_dp_init_analog_param(void) +static void exynos_dp_init_analog_param(struct exynos_dp *dp_regs) { unsigned int reg;

@@ -130,7 +117,7 @@ static void exynos_dp_init_analog_param(void) writel(reg, &dp_regs->pll_ctl); }

-static void exynos_dp_init_interrupt(void) +static void exynos_dp_init_interrupt(struct exynos_dp *dp_regs) { /* Set interrupt registers to initial states */

@@ -157,16 +144,16 @@ static void exynos_dp_init_interrupt(void) writel(0x00, &dp_regs->int_sta_mask); }

-void exynos_dp_reset(void) +void exynos_dp_reset(struct exynos_dp *dp_regs) { unsigned int reg_func_1;

/*dp tx sw reset*/ writel(RESET_DP_TX, &dp_regs->tx_sw_reset);

- exynos_dp_enable_video_input(DP_DISABLE); - exynos_dp_enable_video_bist(DP_DISABLE); - exynos_dp_enable_video_mute(DP_DISABLE); + exynos_dp_enable_video_input(dp_regs, DP_DISABLE); + exynos_dp_enable_video_bist(dp_regs, DP_DISABLE); + exynos_dp_enable_video_mute(dp_regs, DP_DISABLE);

/* software reset */ reg_func_1 = MASTER_VID_FUNC_EN_N | SLAVE_VID_FUNC_EN_N | @@ -178,13 +165,13 @@ void exynos_dp_reset(void)

mdelay(1);

- exynos_dp_init_analog_param(); - exynos_dp_init_interrupt(); + exynos_dp_init_analog_param(dp_regs); + exynos_dp_init_interrupt(dp_regs);

return; }

-void exynos_dp_enable_sw_func(unsigned int enable) +void exynos_dp_enable_sw_func(struct exynos_dp *dp_regs, unsigned int enable) { unsigned int reg;

@@ -199,7 +186,8 @@ void exynos_dp_enable_sw_func(unsigned int enable) return; }

-unsigned int exynos_dp_set_analog_power_down(unsigned int block, u32 enable) +unsigned int exynos_dp_set_analog_power_down(struct exynos_dp *dp_regs, + unsigned int block, u32 enable) { unsigned int reg;

@@ -252,7 +240,7 @@ unsigned int exynos_dp_set_analog_power_down(unsigned int block, u32 enable) return 0; }

-unsigned int exynos_dp_get_pll_lock_status(void) +unsigned int exynos_dp_get_pll_lock_status(struct exynos_dp *dp_regs) { unsigned int reg;

@@ -264,7 +252,8 @@ unsigned int exynos_dp_get_pll_lock_status(void) return PLL_UNLOCKED; }

-static void exynos_dp_set_pll_power(unsigned int enable) +static void exynos_dp_set_pll_power(struct exynos_dp *dp_regs, + unsigned int enable) { unsigned int reg;

@@ -277,14 +266,14 @@ static void exynos_dp_set_pll_power(unsigned int enable) writel(reg, &dp_regs->pll_ctl); }

-int exynos_dp_init_analog_func(void) +int exynos_dp_init_analog_func(struct exynos_dp *dp_regs) { int ret = EXYNOS_DP_SUCCESS; unsigned int retry_cnt = 10; unsigned int reg;

/*Power On All Analog block */ - exynos_dp_set_analog_power_down(POWER_ALL, DP_DISABLE); + exynos_dp_set_analog_power_down(dp_regs, POWER_ALL, DP_DISABLE);

reg = PLL_LOCK_CHG; writel(reg, &dp_regs->common_int_sta1); @@ -305,9 +294,9 @@ int exynos_dp_init_analog_func(void) reg &= ~(DP_PLL_RESET); writel(reg, &dp_regs->pll_ctl);

- exynos_dp_set_pll_power(DP_ENABLE); + exynos_dp_set_pll_power(dp_regs, DP_ENABLE);

- while (exynos_dp_get_pll_lock_status() == PLL_UNLOCKED) { + while (exynos_dp_get_pll_lock_status(dp_regs) == PLL_UNLOCKED) { mdelay(1); retry_cnt--; if (retry_cnt == 0) { @@ -328,7 +317,7 @@ int exynos_dp_init_analog_func(void) return ret; }

-void exynos_dp_init_hpd(void) +void exynos_dp_init_hpd(struct exynos_dp *dp_regs) { unsigned int reg;

@@ -346,7 +335,7 @@ void exynos_dp_init_hpd(void) return; }

-static inline void exynos_dp_reset_aux(void) +static inline void exynos_dp_reset_aux(struct exynos_dp *dp_regs) { unsigned int reg;

@@ -358,7 +347,7 @@ static inline void exynos_dp_reset_aux(void) return; }

-void exynos_dp_init_aux(void) +void exynos_dp_init_aux(struct exynos_dp *dp_regs) { unsigned int reg;

@@ -366,7 +355,7 @@ void exynos_dp_init_aux(void) reg = RPLY_RECEIV | AUX_ERR; writel(reg, &dp_regs->int_sta);

- exynos_dp_reset_aux(); + exynos_dp_reset_aux(dp_regs);

/* Disable AUX transaction H/W retry */ reg = AUX_BIT_PERIOD_EXPECTED_DELAY(3) | AUX_HW_RETRY_COUNT_SEL(3)| @@ -385,7 +374,7 @@ void exynos_dp_init_aux(void) return; }

-void exynos_dp_config_interrupt(void) +void exynos_dp_config_interrupt(struct exynos_dp *dp_regs) { unsigned int reg;

@@ -408,7 +397,7 @@ void exynos_dp_config_interrupt(void) return; }

-unsigned int exynos_dp_get_plug_in_status(void) +unsigned int exynos_dp_get_plug_in_status(struct exynos_dp *dp_regs) { unsigned int reg;

@@ -419,13 +408,13 @@ unsigned int exynos_dp_get_plug_in_status(void) return -1; }

-unsigned int exynos_dp_detect_hpd(void) +unsigned int exynos_dp_detect_hpd(struct exynos_dp *dp_regs) { int timeout_loop = DP_TIMEOUT_LOOP_COUNT;

mdelay(2);

- while (exynos_dp_get_plug_in_status() != 0) { + while (exynos_dp_get_plug_in_status(dp_regs) != 0) { if (timeout_loop == 0) return -EINVAL; mdelay(10); @@ -435,7 +424,7 @@ unsigned int exynos_dp_detect_hpd(void) return EXYNOS_DP_SUCCESS; }

-unsigned int exynos_dp_start_aux_transaction(void) +unsigned int exynos_dp_start_aux_transaction(struct exynos_dp *dp_regs) { unsigned int reg; unsigned int ret = 0; @@ -484,8 +473,9 @@ unsigned int exynos_dp_start_aux_transaction(void) return EXYNOS_DP_SUCCESS; }

-unsigned int exynos_dp_write_byte_to_dpcd(unsigned int reg_addr, - unsigned char data) +unsigned int exynos_dp_write_byte_to_dpcd(struct exynos_dp *dp_regs, + unsigned int reg_addr, + unsigned char data) { unsigned int reg, ret;

@@ -514,7 +504,7 @@ unsigned int exynos_dp_write_byte_to_dpcd(unsigned int reg_addr, writel(reg, &dp_regs->aux_ch_ctl1);

/* Start AUX transaction */ - ret = exynos_dp_start_aux_transaction(); + ret = exynos_dp_start_aux_transaction(dp_regs); if (ret != EXYNOS_DP_SUCCESS) { printf("DP Aux transaction failed\n"); return ret; @@ -523,8 +513,9 @@ unsigned int exynos_dp_write_byte_to_dpcd(unsigned int reg_addr, return ret; }

-unsigned int exynos_dp_read_byte_from_dpcd(unsigned int reg_addr, - unsigned char *data) +unsigned int exynos_dp_read_byte_from_dpcd(struct exynos_dp *dp_regs, + unsigned int reg_addr, + unsigned char *data) { unsigned int reg; int retval; @@ -550,7 +541,7 @@ unsigned int exynos_dp_read_byte_from_dpcd(unsigned int reg_addr, writel(reg, &dp_regs->aux_ch_ctl1);

/* Start AUX transaction */ - retval = exynos_dp_start_aux_transaction(); + retval = exynos_dp_start_aux_transaction(dp_regs); if (!retval) debug("DP Aux Transaction fail!\n");

@@ -561,9 +552,10 @@ unsigned int exynos_dp_read_byte_from_dpcd(unsigned int reg_addr, return retval; }

-unsigned int exynos_dp_write_bytes_to_dpcd(unsigned int reg_addr, - unsigned int count, - unsigned char data[]) +unsigned int exynos_dp_write_bytes_to_dpcd(struct exynos_dp *dp_regs, + unsigned int reg_addr, + unsigned int count, + unsigned char data[]) { unsigned int reg; unsigned int start_offset; @@ -610,7 +602,7 @@ unsigned int exynos_dp_write_bytes_to_dpcd(unsigned int reg_addr, writel(reg, &dp_regs->aux_ch_ctl1);

/* Start AUX transaction */ - ret = exynos_dp_start_aux_transaction(); + ret = exynos_dp_start_aux_transaction(dp_regs); if (ret != EXYNOS_DP_SUCCESS) { if (retry_cnt == 0) { printf("DP Aux Transaction failed\n"); @@ -626,9 +618,10 @@ unsigned int exynos_dp_write_bytes_to_dpcd(unsigned int reg_addr, return ret; }

-unsigned int exynos_dp_read_bytes_from_dpcd(unsigned int reg_addr, - unsigned int count, - unsigned char data[]) +unsigned int exynos_dp_read_bytes_from_dpcd(struct exynos_dp *dp_regs, + unsigned int reg_addr, + unsigned int count, + unsigned char data[]) { unsigned int reg; unsigned int start_offset; @@ -668,7 +661,7 @@ unsigned int exynos_dp_read_bytes_from_dpcd(unsigned int reg_addr, writel(reg, &dp_regs->aux_ch_ctl1);

/* Start AUX transaction */ - ret = exynos_dp_start_aux_transaction(); + ret = exynos_dp_start_aux_transaction(dp_regs); if (ret != EXYNOS_DP_SUCCESS) { if (retry_cnt == 0) { printf("DP Aux Transaction failed\n"); @@ -692,8 +685,8 @@ unsigned int exynos_dp_read_bytes_from_dpcd(unsigned int reg_addr, return ret; }

-int exynos_dp_select_i2c_device(unsigned int device_addr, - unsigned int reg_addr) +int exynos_dp_select_i2c_device(struct exynos_dp *dp_regs, + unsigned int device_addr, unsigned int reg_addr) { unsigned int reg; int retval; @@ -717,16 +710,16 @@ int exynos_dp_select_i2c_device(unsigned int device_addr, writel(reg, &dp_regs->aux_ch_ctl1);

/* Start AUX transaction */ - retval = exynos_dp_start_aux_transaction(); + retval = exynos_dp_start_aux_transaction(dp_regs); if (retval != 0) printf("%s: DP Aux Transaction fail!\n", __func__);

return retval; }

-int exynos_dp_read_byte_from_i2c(unsigned int device_addr, - unsigned int reg_addr, - unsigned int *data) +int exynos_dp_read_byte_from_i2c(struct exynos_dp *dp_regs, + unsigned int device_addr, + unsigned int reg_addr, unsigned int *data) { unsigned int reg; int i; @@ -738,7 +731,8 @@ int exynos_dp_read_byte_from_i2c(unsigned int device_addr, writel(reg, &dp_regs->buffer_data_ctl);

/* Select EDID device */ - retval = exynos_dp_select_i2c_device(device_addr, reg_addr); + retval = exynos_dp_select_i2c_device(dp_regs, device_addr, + reg_addr); if (retval != 0) { printf("DP Select EDID device fail. retry !\n"); continue; @@ -754,7 +748,7 @@ int exynos_dp_read_byte_from_i2c(unsigned int device_addr, writel(reg, &dp_regs->aux_ch_ctl1);

/* Start AUX transaction */ - retval = exynos_dp_start_aux_transaction(); + retval = exynos_dp_start_aux_transaction(dp_regs); if (retval != EXYNOS_DP_SUCCESS) printf("%s: DP Aux Transaction fail!\n", __func__); } @@ -766,8 +760,10 @@ int exynos_dp_read_byte_from_i2c(unsigned int device_addr, return retval; }

-int exynos_dp_read_bytes_from_i2c(unsigned int device_addr, - unsigned int reg_addr, unsigned int count, unsigned char edid[]) +int exynos_dp_read_bytes_from_i2c(struct exynos_dp *dp_regs, + unsigned int device_addr, + unsigned int reg_addr, unsigned int count, + unsigned char edid[]) { unsigned int reg; unsigned int i, j; @@ -791,9 +787,8 @@ int exynos_dp_read_bytes_from_i2c(unsigned int device_addr, * request without sending addres */ if (!defer) - retval = - exynos_dp_select_i2c_device(device_addr, - reg_addr + i); + retval = exynos_dp_select_i2c_device( + dp_regs, device_addr, reg_addr + i); else defer = 0;

@@ -809,7 +804,8 @@ int exynos_dp_read_bytes_from_i2c(unsigned int device_addr, writel(reg, &dp_regs->aux_ch_ctl1);

/* Start AUX transaction */ - retval = exynos_dp_start_aux_transaction(); + retval = exynos_dp_start_aux_transaction( + dp_regs); if (retval == 0) break; else @@ -834,7 +830,7 @@ int exynos_dp_read_bytes_from_i2c(unsigned int device_addr, return retval; }

-void exynos_dp_reset_macro(void) +void exynos_dp_reset_macro(struct exynos_dp *dp_regs) { unsigned int reg;

@@ -849,7 +845,8 @@ void exynos_dp_reset_macro(void) writel(reg, &dp_regs->phy_test); }

-void exynos_dp_set_link_bandwidth(unsigned char bwtype) +void exynos_dp_set_link_bandwidth(struct exynos_dp *dp_regs, + unsigned char bwtype) { unsigned int reg;

@@ -860,7 +857,7 @@ void exynos_dp_set_link_bandwidth(unsigned char bwtype) writel(reg, &dp_regs->link_bw_set); }

-unsigned char exynos_dp_get_link_bandwidth(void) +unsigned char exynos_dp_get_link_bandwidth(struct exynos_dp *dp_regs) { unsigned char ret; unsigned int reg; @@ -871,7 +868,7 @@ unsigned char exynos_dp_get_link_bandwidth(void) return ret; }

-void exynos_dp_set_lane_count(unsigned char count) +void exynos_dp_set_lane_count(struct exynos_dp *dp_regs, unsigned char count) { unsigned int reg;

@@ -882,7 +879,7 @@ void exynos_dp_set_lane_count(unsigned char count) writel(reg, &dp_regs->lane_count_set); }

-unsigned int exynos_dp_get_lane_count(void) +unsigned int exynos_dp_get_lane_count(struct exynos_dp *dp_regs) { unsigned int reg;

@@ -891,7 +888,8 @@ unsigned int exynos_dp_get_lane_count(void) return reg; }

-unsigned char exynos_dp_get_lanex_pre_emphasis(unsigned char lanecnt) +unsigned char exynos_dp_get_lanex_pre_emphasis(struct exynos_dp *dp_regs, + unsigned char lanecnt) { unsigned int reg_list[DP_LANE_CNT_4] = { (unsigned int)&dp_regs->ln0_link_training_ctl, @@ -903,8 +901,9 @@ unsigned char exynos_dp_get_lanex_pre_emphasis(unsigned char lanecnt) return readl(reg_list[lanecnt]); }

-void exynos_dp_set_lanex_pre_emphasis(unsigned char request_val, - unsigned char lanecnt) +void exynos_dp_set_lanex_pre_emphasis(struct exynos_dp *dp_regs, + unsigned char request_val, + unsigned char lanecnt) { unsigned int reg_list[DP_LANE_CNT_4] = { (unsigned int)&dp_regs->ln0_link_training_ctl, @@ -916,7 +915,8 @@ void exynos_dp_set_lanex_pre_emphasis(unsigned char request_val, writel(request_val, reg_list[lanecnt]); }

-void exynos_dp_set_lane_pre_emphasis(unsigned int level, unsigned char lanecnt) +void exynos_dp_set_lane_pre_emphasis(struct exynos_dp *dp_regs, + unsigned int level, unsigned char lanecnt) { unsigned char i; unsigned int reg; @@ -939,7 +939,8 @@ void exynos_dp_set_lane_pre_emphasis(unsigned int level, unsigned char lanecnt) } }

-void exynos_dp_set_training_pattern(unsigned int pattern) +void exynos_dp_set_training_pattern(struct exynos_dp *dp_regs, + unsigned int pattern) { unsigned int reg = 0;

@@ -967,7 +968,8 @@ void exynos_dp_set_training_pattern(unsigned int pattern) writel(reg, &dp_regs->training_ptn_set); }

-void exynos_dp_enable_enhanced_mode(unsigned char enable) +void exynos_dp_enable_enhanced_mode(struct exynos_dp *dp_regs, + unsigned char enable) { unsigned int reg;

@@ -980,7 +982,7 @@ void exynos_dp_enable_enhanced_mode(unsigned char enable) writel(reg, &dp_regs->sys_ctl4); }

-void exynos_dp_enable_scrambling(unsigned int enable) +void exynos_dp_enable_scrambling(struct exynos_dp *dp_regs, unsigned int enable) { unsigned int reg;

@@ -993,7 +995,7 @@ void exynos_dp_enable_scrambling(unsigned int enable) writel(reg, &dp_regs->training_ptn_set); }

-int exynos_dp_init_video(void) +int exynos_dp_init_video(struct exynos_dp *dp_regs) { unsigned int reg;

@@ -1008,7 +1010,8 @@ int exynos_dp_init_video(void) return 0; }

-void exynos_dp_config_video_slave_mode(struct edp_video_info *video_info) +void exynos_dp_config_video_slave_mode(struct exynos_dp *dp_regs, + struct edp_video_info *video_info) { unsigned int reg;

@@ -1041,7 +1044,8 @@ void exynos_dp_config_video_slave_mode(struct edp_video_info *video_info) writel(reg, &dp_regs->soc_general_ctl); }

-void exynos_dp_set_video_color_format(struct edp_video_info *video_info) +void exynos_dp_set_video_color_format(struct exynos_dp *dp_regs, + struct edp_video_info *video_info) { unsigned int reg;

@@ -1061,7 +1065,8 @@ void exynos_dp_set_video_color_format(struct edp_video_info *video_info) writel(reg, &dp_regs->video_ctl3); }

-int exynos_dp_config_video_bist(struct edp_device_info *edp_info) +int exynos_dp_config_video_bist(struct exynos_dp *dp_regs, + struct edp_device_info *edp_info) { unsigned int reg; unsigned int bist_type = 0; @@ -1151,7 +1156,7 @@ int exynos_dp_config_video_bist(struct edp_device_info *edp_info) return 0; }

-unsigned int exynos_dp_is_slave_video_stream_clock_on(void) +unsigned int exynos_dp_is_slave_video_stream_clock_on(struct exynos_dp *dp_regs) { unsigned int reg;

@@ -1169,8 +1174,8 @@ unsigned int exynos_dp_is_slave_video_stream_clock_on(void) return EXYNOS_DP_SUCCESS; }

-void exynos_dp_set_video_cr_mn(unsigned int type, unsigned int m_value, - unsigned int n_value) +void exynos_dp_set_video_cr_mn(struct exynos_dp *dp_regs, unsigned int type, + unsigned int m_value, unsigned int n_value) { unsigned int reg;

@@ -1198,7 +1203,8 @@ void exynos_dp_set_video_cr_mn(unsigned int type, unsigned int m_value, } }

-void exynos_dp_set_video_timing_mode(unsigned int type) +void exynos_dp_set_video_timing_mode(struct exynos_dp *dp_regs, + unsigned int type) { unsigned int reg;

@@ -1211,7 +1217,8 @@ void exynos_dp_set_video_timing_mode(unsigned int type) writel(reg, &dp_regs->video_ctl10); }

-void exynos_dp_enable_video_master(unsigned int enable) +void exynos_dp_enable_video_master(struct exynos_dp *dp_regs, + unsigned int enable) { unsigned int reg;

@@ -1227,7 +1234,7 @@ void exynos_dp_enable_video_master(unsigned int enable) writel(reg, &dp_regs->soc_general_ctl); }

-void exynos_dp_start_video(void) +void exynos_dp_start_video(struct exynos_dp *dp_regs) { unsigned int reg;

@@ -1237,7 +1244,7 @@ void exynos_dp_start_video(void) writel(reg, &dp_regs->video_ctl1); }

-unsigned int exynos_dp_is_video_stream_on(void) +unsigned int exynos_dp_is_video_stream_on(struct exynos_dp *dp_regs) { unsigned int reg;

diff --git a/drivers/video/exynos/exynos_dp_lowlevel.h b/drivers/video/exynos/exynos_dp_lowlevel.h index 8651681..85459b5 100644 --- a/drivers/video/exynos/exynos_dp_lowlevel.h +++ b/drivers/video/exynos/exynos_dp_lowlevel.h @@ -9,60 +9,81 @@ #ifndef _EXYNOS_EDP_LOWLEVEL_H #define _EXYNOS_EDP_LOWLEVEL_H

-void exynos_dp_enable_video_bist(unsigned int enable); -void exynos_dp_enable_video_mute(unsigned int enable); -void exynos_dp_reset(void); -void exynos_dp_enable_sw_func(unsigned int enable); -unsigned int exynos_dp_set_analog_power_down(unsigned int block, u32 enable); -unsigned int exynos_dp_get_pll_lock_status(void); -int exynos_dp_init_analog_func(void); -void exynos_dp_init_hpd(void); -void exynos_dp_init_aux(void); -void exynos_dp_config_interrupt(void); -unsigned int exynos_dp_get_plug_in_status(void); -unsigned int exynos_dp_detect_hpd(void); -unsigned int exynos_dp_start_aux_transaction(void); -unsigned int exynos_dp_write_byte_to_dpcd(unsigned int reg_addr, - unsigned char data); -unsigned int exynos_dp_read_byte_from_dpcd(unsigned int reg_addr, - unsigned char *data); -unsigned int exynos_dp_write_bytes_to_dpcd(unsigned int reg_addr, - unsigned int count, - unsigned char data[]); -unsigned int exynos_dp_read_bytes_from_dpcd( unsigned int reg_addr, - unsigned int count, - unsigned char data[]); -int exynos_dp_select_i2c_device( unsigned int device_addr, - unsigned int reg_addr); -int exynos_dp_read_byte_from_i2c(unsigned int device_addr, - unsigned int reg_addr, unsigned int *data); -int exynos_dp_read_bytes_from_i2c(unsigned int device_addr, - unsigned int reg_addr, unsigned int count, - unsigned char edid[]); -void exynos_dp_reset_macro(void); -void exynos_dp_set_link_bandwidth(unsigned char bwtype); -unsigned char exynos_dp_get_link_bandwidth(void); -void exynos_dp_set_lane_count(unsigned char count); -unsigned int exynos_dp_get_lane_count(void); -unsigned char exynos_dp_get_lanex_pre_emphasis(unsigned char lanecnt); -void exynos_dp_set_lane_pre_emphasis(unsigned int level, - unsigned char lanecnt); -void exynos_dp_set_lanex_pre_emphasis(unsigned char request_val, - unsigned char lanecnt); -void exynos_dp_set_training_pattern(unsigned int pattern); -void exynos_dp_enable_enhanced_mode(unsigned char enable); -void exynos_dp_enable_scrambling(unsigned int enable); -int exynos_dp_init_video(void); -void exynos_dp_config_video_slave_mode(struct edp_video_info *video_info); -void exynos_dp_set_video_color_format(struct edp_video_info *video_info); -int exynos_dp_config_video_bist(struct edp_device_info *edp_info); -unsigned int exynos_dp_is_slave_video_stream_clock_on(void); -void exynos_dp_set_video_cr_mn(unsigned int type, unsigned int m_value, - unsigned int n_value); -void exynos_dp_set_video_timing_mode(unsigned int type); -void exynos_dp_enable_video_master(unsigned int enable); -void exynos_dp_start_video(void); -unsigned int exynos_dp_is_video_stream_on(void); -void exynos_dp_set_base_addr(void); +void exynos_dp_enable_video_bist(struct exynos_dp *dp_regs, + unsigned int enable); +void exynos_dp_enable_video_mute(struct exynos_dp *dp_regs, + unsigned int enable); +void exynos_dp_reset(struct exynos_dp *dp_regs); +void exynos_dp_enable_sw_func(struct exynos_dp *dp_regs, unsigned int enable); +unsigned int exynos_dp_set_analog_power_down(struct exynos_dp *dp_regs, + unsigned int block, u32 enable); +unsigned int exynos_dp_get_pll_lock_status(struct exynos_dp *dp_regs); +int exynos_dp_init_analog_func(struct exynos_dp *dp_regs); +void exynos_dp_init_hpd(struct exynos_dp *dp_regs); +void exynos_dp_init_aux(struct exynos_dp *dp_regs); +void exynos_dp_config_interrupt(struct exynos_dp *dp_regs); +unsigned int exynos_dp_get_plug_in_status(struct exynos_dp *dp_regs); +unsigned int exynos_dp_detect_hpd(struct exynos_dp *dp_regs); +unsigned int exynos_dp_start_aux_transaction(struct exynos_dp *dp_regs); +unsigned int exynos_dp_write_byte_to_dpcd(struct exynos_dp *dp_regs, + unsigned int reg_addr, + unsigned char data); +unsigned int exynos_dp_read_byte_from_dpcd(struct exynos_dp *dp_regs, + unsigned int reg_addr, + unsigned char *data); +unsigned int exynos_dp_write_bytes_to_dpcd(struct exynos_dp *dp_regs, + unsigned int reg_addr, + unsigned int count, + unsigned char data[]); +unsigned int exynos_dp_read_bytes_from_dpcd(struct exynos_dp *dp_regs, + unsigned int reg_addr, + unsigned int count, + unsigned char data[]); +int exynos_dp_select_i2c_device(struct exynos_dp *dp_regs, + unsigned int device_addr, + unsigned int reg_addr); +int exynos_dp_read_byte_from_i2c(struct exynos_dp *dp_regs, + unsigned int device_addr, + unsigned int reg_addr, unsigned int *data); +int exynos_dp_read_bytes_from_i2c(struct exynos_dp *dp_regs, + unsigned int device_addr, + unsigned int reg_addr, unsigned int count, + unsigned char edid[]); +void exynos_dp_reset_macro(struct exynos_dp *dp_regs); +void exynos_dp_set_link_bandwidth(struct exynos_dp *dp_regs, + unsigned char bwtype); +unsigned char exynos_dp_get_link_bandwidth(struct exynos_dp *dp_regs); +void exynos_dp_set_lane_count(struct exynos_dp *dp_regs, unsigned char count); +unsigned int exynos_dp_get_lane_count(struct exynos_dp *dp_regs); +unsigned char exynos_dp_get_lanex_pre_emphasis(struct exynos_dp *dp_regs, + unsigned char lanecnt); +void exynos_dp_set_lane_pre_emphasis(struct exynos_dp *dp_regs, + unsigned int level, unsigned char lanecnt); +void exynos_dp_set_lanex_pre_emphasis(struct exynos_dp *dp_regs, + unsigned char request_val, + unsigned char lanecnt); +void exynos_dp_set_training_pattern(struct exynos_dp *dp_regs, + unsigned int pattern); +void exynos_dp_enable_enhanced_mode(struct exynos_dp *dp_regs, + unsigned char enable); +void exynos_dp_enable_scrambling(struct exynos_dp *dp_regs, + unsigned int enable); +int exynos_dp_init_video(struct exynos_dp *dp_regs); +void exynos_dp_config_video_slave_mode(struct exynos_dp *dp_regs, + struct edp_video_info *video_info); +void exynos_dp_set_video_color_format(struct exynos_dp *dp_regs, + struct edp_video_info *video_info); +int exynos_dp_config_video_bist(struct exynos_dp *dp_regs, + struct edp_device_info *edp_info); +unsigned int exynos_dp_is_slave_video_stream_clock_on( + struct exynos_dp *dp_regs); +void exynos_dp_set_video_cr_mn(struct exynos_dp *dp_regs, unsigned int type, + unsigned int m_value, unsigned int n_value); +void exynos_dp_set_video_timing_mode(struct exynos_dp *dp_regs, + unsigned int type); +void exynos_dp_enable_video_master(struct exynos_dp *dp_regs, + unsigned int enable); +void exynos_dp_start_video(struct exynos_dp *dp_regs); +unsigned int exynos_dp_is_video_stream_on(struct exynos_dp *dp_regs);

#endif /* _EXYNOS_DP_LOWLEVEL_H */

Put the pointer to this structure in struct vidinfo so that we can reference it without it being global.

Signed-off-by: Simon Glass sjg@chromium.org ---

arch/arm/mach-exynos/include/mach/mipi_dsim.h | 5 +++-- drivers/video/exynos/exynos_fb.c | 2 +- drivers/video/exynos/exynos_mipi_dsi.c | 19 ++++--------------- include/exynos_lcd.h | 1 + 4 files changed, 9 insertions(+), 18 deletions(-)

diff --git a/arch/arm/mach-exynos/include/mach/mipi_dsim.h b/arch/arm/mach-exynos/include/mach/mipi_dsim.h index a77b5c8..df68186 100644 --- a/arch/arm/mach-exynos/include/mach/mipi_dsim.h +++ b/arch/arm/mach-exynos/include/mach/mipi_dsim.h @@ -347,9 +347,10 @@ struct mipi_dsim_lcd_driver { };

#ifdef CONFIG_EXYNOS_MIPI_DSIM -int exynos_mipi_dsi_init(void); +int exynos_mipi_dsi_init(struct exynos_platform_mipi_dsim *dsim_pd); #else -static inline int exynos_mipi_dsi_init(void) +static inline int exynos_mipi_dsi_init( + struct exynos_platform_mipi_dsim *dsim_pd) { return 0; } diff --git a/drivers/video/exynos/exynos_fb.c b/drivers/video/exynos/exynos_fb.c index abc6091..22b9723 100644 --- a/drivers/video/exynos/exynos_fb.c +++ b/drivers/video/exynos/exynos_fb.c @@ -128,7 +128,7 @@ static void lcd_panel_on(struct vidinfo *vid) exynos_enable_ldo(1);

if (vid->mipi_enabled) - exynos_mipi_dsi_init(); + exynos_mipi_dsi_init(panel_info.dsim_platform_data_dt); }

int exynos_lcd_early_init(const void *blob) diff --git a/drivers/video/exynos/exynos_mipi_dsi.c b/drivers/video/exynos/exynos_mipi_dsi.c index fd96382..b39858a 100644 --- a/drivers/video/exynos/exynos_mipi_dsi.c +++ b/drivers/video/exynos/exynos_mipi_dsi.c @@ -27,8 +27,6 @@

DECLARE_GLOBAL_DATA_PTR;

-static struct exynos_platform_mipi_dsim *dsim_pd; -static struct exynos_platform_mipi_dsim dsim_platform_data_dt; static struct mipi_dsim_lcd_device mipi_lcd_device_dt;

struct mipi_dsim_ddi { @@ -175,7 +173,7 @@ static struct mipi_dsim_master_ops master_ops = { .clear_dsim_frame_done = exynos_mipi_dsi_clear_frame_done, };

-int exynos_mipi_dsi_init(void) +int exynos_mipi_dsi_init(struct exynos_platform_mipi_dsim *dsim_pd) { struct mipi_dsim_device *dsim; struct mipi_dsim_config *dsim_config; @@ -236,16 +234,6 @@ int exynos_mipi_dsi_init(void) return 0; }

-void exynos_set_dsim_platform_data(struct exynos_platform_mipi_dsim *pd) -{ - if (pd == NULL) { - debug("pd is NULL\n"); - return; - } - - dsim_pd = pd; -} - int exynos_dsim_config_parse_dt(const void *blob, struct mipi_dsim_config *dt) { int node; @@ -316,7 +304,8 @@ int exynos_dsim_config_parse_dt(const void *blob, struct mipi_dsim_config *dt)

void exynos_init_dsim_platform_data(vidinfo_t *vid) { - struct mipi_dsim_config dsim_config_dt; + static struct mipi_dsim_config dsim_config_dt; + static struct exynos_platform_mipi_dsim dsim_platform_data_dt;

if (exynos_dsim_config_parse_dt(gd->fdt_blob, &dsim_config_dt)) debug("Can't get proper dsim config.\n"); @@ -330,5 +319,5 @@ void exynos_init_dsim_platform_data(vidinfo_t *vid) mipi_lcd_device_dt.platform_data = (void *)&dsim_platform_data_dt; exynos_mipi_dsi_register_lcd_device(&mipi_lcd_device_dt);

- dsim_pd = &dsim_platform_data_dt; + vid->dsim_platform_data_dt = &dsim_platform_data_dt; } diff --git a/include/exynos_lcd.h b/include/exynos_lcd.h index 1f6c6c7..0aa0fc7 100644 --- a/include/exynos_lcd.h +++ b/include/exynos_lcd.h @@ -76,6 +76,7 @@ typedef struct vidinfo {

unsigned int dual_lcd_enabled; struct exynos_fb *fimd_ctrl; + struct exynos_platform_mipi_dsim *dsim_platform_data_dt; } vidinfo_t;

#endif

At present exynos_fimd.c is the controller and exynos_fb.c is the U-Boot LCD interface. With driver model we want these in one file, so join them in preparation.

Signed-off-by: Simon Glass sjg@chromium.org ---

drivers/video/exynos/Makefile | 2 +- drivers/video/exynos/exynos_fb.c | 386 +++++++++++++++++++++++++++++++++++ drivers/video/exynos/exynos_fimd.c | 405 ------------------------------------- 3 files changed, 387 insertions(+), 406 deletions(-) delete mode 100644 drivers/video/exynos/exynos_fimd.c

diff --git a/drivers/video/exynos/Makefile b/drivers/video/exynos/Makefile index d4bdf32..001a80f 100644 --- a/drivers/video/exynos/Makefile +++ b/drivers/video/exynos/Makefile @@ -6,7 +6,7 @@ #

obj-$(CONFIG_EXYNOS_DP) += exynos_dp.o exynos_dp_lowlevel.o -obj-$(CONFIG_EXYNOS_FB) += exynos_fb.o exynos_fimd.o +obj-$(CONFIG_EXYNOS_FB) += exynos_fb.o obj-$(CONFIG_EXYNOS_MIPI_DSIM) += exynos_mipi_dsi.o exynos_mipi_dsi_common.o \ exynos_mipi_dsi_lowlevel.o obj-$(CONFIG_EXYNOS_PWM_BL) += exynos_pwm_bl.o diff --git a/drivers/video/exynos/exynos_fb.c b/drivers/video/exynos/exynos_fb.c index 22b9723..e13d35a 100644 --- a/drivers/video/exynos/exynos_fb.c +++ b/drivers/video/exynos/exynos_fb.c @@ -9,6 +9,7 @@

#include <config.h> #include <common.h> +#include <div64.h> #include <lcd.h> #include <fdtdec.h> #include <libfdt.h> @@ -34,6 +35,391 @@ struct vidinfo panel_info = { .vl_col = -1, };

+static void exynos_fimd_set_dualrgb(struct vidinfo *pvid, unsigned int enabled) +{ + struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl; + unsigned int cfg = 0; + + if (enabled) { + cfg = EXYNOS_DUALRGB_BYPASS_DUAL | EXYNOS_DUALRGB_LINESPLIT | + EXYNOS_DUALRGB_VDEN_EN_ENABLE; + + /* in case of Line Split mode, MAIN_CNT doesn't neet to set. */ + cfg |= EXYNOS_DUALRGB_SUB_CNT(pvid->vl_col / 2) | + EXYNOS_DUALRGB_MAIN_CNT(0); + } + + writel(cfg, &fimd_ctrl->dualrgb); +} + +static void exynos_fimd_set_dp_clkcon(struct vidinfo *pvid, + unsigned int enabled) +{ + struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl; + unsigned int cfg = 0; + + if (enabled) + cfg = EXYNOS_DP_CLK_ENABLE; + + writel(cfg, &fimd_ctrl->dp_mie_clkcon); +} + +static void exynos_fimd_set_par(struct vidinfo *pvid, unsigned int win_id) +{ + struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl; + unsigned int cfg = 0; + + /* set window control */ + cfg = readl((unsigned int)&fimd_ctrl->wincon0 + + EXYNOS_WINCON(win_id)); + + cfg &= ~(EXYNOS_WINCON_BITSWP_ENABLE | EXYNOS_WINCON_BYTESWP_ENABLE | + EXYNOS_WINCON_HAWSWP_ENABLE | EXYNOS_WINCON_WSWP_ENABLE | + EXYNOS_WINCON_BURSTLEN_MASK | EXYNOS_WINCON_BPPMODE_MASK | + EXYNOS_WINCON_INRGB_MASK | EXYNOS_WINCON_DATAPATH_MASK); + + /* DATAPATH is DMA */ + cfg |= EXYNOS_WINCON_DATAPATH_DMA; + + cfg |= EXYNOS_WINCON_HAWSWP_ENABLE; + + /* dma burst is 16 */ + cfg |= EXYNOS_WINCON_BURSTLEN_16WORD; + + switch (pvid->vl_bpix) { + case 4: + cfg |= EXYNOS_WINCON_BPPMODE_16BPP_565; + break; + default: + cfg |= EXYNOS_WINCON_BPPMODE_24BPP_888; + break; + } + + writel(cfg, (unsigned int)&fimd_ctrl->wincon0 + + EXYNOS_WINCON(win_id)); + + /* set window position to x=0, y=0*/ + cfg = EXYNOS_VIDOSD_LEFT_X(0) | EXYNOS_VIDOSD_TOP_Y(0); + writel(cfg, (unsigned int)&fimd_ctrl->vidosd0a + + EXYNOS_VIDOSD(win_id)); + + cfg = EXYNOS_VIDOSD_RIGHT_X(pvid->vl_col - 1) | + EXYNOS_VIDOSD_BOTTOM_Y(pvid->vl_row - 1) | + EXYNOS_VIDOSD_RIGHT_X_E(1) | + EXYNOS_VIDOSD_BOTTOM_Y_E(0); + + writel(cfg, (unsigned int)&fimd_ctrl->vidosd0b + + EXYNOS_VIDOSD(win_id)); + + /* set window size for window0*/ + cfg = EXYNOS_VIDOSD_SIZE(pvid->vl_col * pvid->vl_row); + writel(cfg, (unsigned int)&fimd_ctrl->vidosd0c + + EXYNOS_VIDOSD(win_id)); +} + +static void exynos_fimd_set_buffer_address(struct vidinfo *pvid, + unsigned int win_id, + ulong lcd_base_addr) +{ + struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl; + unsigned long start_addr, end_addr; + + start_addr = lcd_base_addr; + end_addr = start_addr + ((pvid->vl_col * (NBITS(pvid->vl_bpix) / 8)) * + pvid->vl_row); + + writel(start_addr, (unsigned int)&fimd_ctrl->vidw00add0b0 + + EXYNOS_BUFFER_OFFSET(win_id)); + writel(end_addr, (unsigned int)&fimd_ctrl->vidw00add1b0 + + EXYNOS_BUFFER_OFFSET(win_id)); +} + +static void exynos_fimd_set_clock(struct vidinfo *pvid) +{ + struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl; + unsigned int cfg = 0, div = 0, remainder, remainder_div; + unsigned long pixel_clock; + unsigned long long src_clock; + + if (pvid->dual_lcd_enabled) { + pixel_clock = pvid->vl_freq * + (pvid->vl_hspw + pvid->vl_hfpd + + pvid->vl_hbpd + pvid->vl_col / 2) * + (pvid->vl_vspw + pvid->vl_vfpd + + pvid->vl_vbpd + pvid->vl_row); + } else if (pvid->interface_mode == FIMD_CPU_INTERFACE) { + pixel_clock = pvid->vl_freq * + pvid->vl_width * pvid->vl_height * + (pvid->cs_setup + pvid->wr_setup + + pvid->wr_act + pvid->wr_hold + 1); + } else { + pixel_clock = pvid->vl_freq * + (pvid->vl_hspw + pvid->vl_hfpd + + pvid->vl_hbpd + pvid->vl_col) * + (pvid->vl_vspw + pvid->vl_vfpd + + pvid->vl_vbpd + pvid->vl_row); + } + + cfg = readl(&fimd_ctrl->vidcon0); + cfg &= ~(EXYNOS_VIDCON0_CLKSEL_MASK | EXYNOS_VIDCON0_CLKVALUP_MASK | + EXYNOS_VIDCON0_CLKVAL_F(0xFF) | EXYNOS_VIDCON0_VCLKEN_MASK | + EXYNOS_VIDCON0_CLKDIR_MASK); + cfg |= (EXYNOS_VIDCON0_CLKSEL_SCLK | EXYNOS_VIDCON0_CLKVALUP_ALWAYS | + EXYNOS_VIDCON0_VCLKEN_NORMAL | EXYNOS_VIDCON0_CLKDIR_DIVIDED); + + src_clock = (unsigned long long) get_lcd_clk(); + + /* get quotient and remainder. */ + remainder = do_div(src_clock, pixel_clock); + div = src_clock; + + remainder *= 10; + remainder_div = remainder / pixel_clock; + + /* round about one places of decimals. */ + if (remainder_div >= 5) + div++; + + /* in case of dual lcd mode. */ + if (pvid->dual_lcd_enabled) + div--; + + cfg |= EXYNOS_VIDCON0_CLKVAL_F(div - 1); + writel(cfg, &fimd_ctrl->vidcon0); +} + +void exynos_set_trigger(struct vidinfo *pvid) +{ + struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl; + unsigned int cfg = 0; + + cfg = readl(&fimd_ctrl->trigcon); + + cfg |= (EXYNOS_I80SOFT_TRIG_EN | EXYNOS_I80START_TRIG); + + writel(cfg, &fimd_ctrl->trigcon); +} + +int exynos_is_i80_frame_done(struct vidinfo *pvid) +{ + struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl; + unsigned int cfg = 0; + int status; + + cfg = readl(&fimd_ctrl->trigcon); + + /* frame done func is valid only when TRIMODE[0] is set to 1. */ + status = (cfg & EXYNOS_I80STATUS_TRIG_DONE) == + EXYNOS_I80STATUS_TRIG_DONE; + + return status; +} + +static void exynos_fimd_lcd_on(struct vidinfo *pvid) +{ + struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl; + unsigned int cfg = 0; + + /* display on */ + cfg = readl(&fimd_ctrl->vidcon0); + cfg |= (EXYNOS_VIDCON0_ENVID_ENABLE | EXYNOS_VIDCON0_ENVID_F_ENABLE); + writel(cfg, &fimd_ctrl->vidcon0); +} + +static void exynos_fimd_window_on(struct vidinfo *pvid, unsigned int win_id) +{ + struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl; + unsigned int cfg = 0; + + /* enable window */ + cfg = readl((unsigned int)&fimd_ctrl->wincon0 + + EXYNOS_WINCON(win_id)); + cfg |= EXYNOS_WINCON_ENWIN_ENABLE; + writel(cfg, (unsigned int)&fimd_ctrl->wincon0 + + EXYNOS_WINCON(win_id)); + + cfg = readl(&fimd_ctrl->winshmap); + cfg |= EXYNOS_WINSHMAP_CH_ENABLE(win_id); + writel(cfg, &fimd_ctrl->winshmap); +} + +void exynos_fimd_lcd_off(struct vidinfo *pvid) +{ + struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl; + unsigned int cfg = 0; + + cfg = readl(&fimd_ctrl->vidcon0); + cfg &= (EXYNOS_VIDCON0_ENVID_DISABLE | EXYNOS_VIDCON0_ENVID_F_DISABLE); + writel(cfg, &fimd_ctrl->vidcon0); +} + +void exynos_fimd_window_off(struct vidinfo *pvid, unsigned int win_id) +{ + struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl; + unsigned int cfg = 0; + + cfg = readl((unsigned int)&fimd_ctrl->wincon0 + + EXYNOS_WINCON(win_id)); + cfg &= EXYNOS_WINCON_ENWIN_DISABLE; + writel(cfg, (unsigned int)&fimd_ctrl->wincon0 + + EXYNOS_WINCON(win_id)); + + cfg = readl(&fimd_ctrl->winshmap); + cfg &= ~EXYNOS_WINSHMAP_CH_DISABLE(win_id); + writel(cfg, &fimd_ctrl->winshmap); +} + +/* +* The reset value for FIMD SYSMMU register MMU_CTRL is 3 +* on Exynos5420 and newer versions. +* This means FIMD SYSMMU is on by default on Exynos5420 +* and newer versions. +* Since in u-boot we don't use SYSMMU, we should disable +* those FIMD SYSMMU. +* Note that there are 2 SYSMMU for FIMD: m0 and m1. +* m0 handles windows 0 and 4, and m1 handles windows 1, 2 and 3. +* We disable both of them here. +*/ +void exynos_fimd_disable_sysmmu(void) +{ + u32 *sysmmufimd; + unsigned int node; + int node_list[2]; + int count; + int i; + + count = fdtdec_find_aliases_for_id(gd->fdt_blob, "fimd", + COMPAT_SAMSUNG_EXYNOS_SYSMMU, node_list, 2); + for (i = 0; i < count; i++) { + node = node_list[i]; + if (node <= 0) { + debug("Can't get device node for fimd sysmmu\n"); + return; + } + + sysmmufimd = (u32 *)fdtdec_get_addr(gd->fdt_blob, node, "reg"); + if (!sysmmufimd) { + debug("Can't get base address for sysmmu fimdm0"); + return; + } + + writel(0x0, sysmmufimd); + } +} + +void exynos_fimd_lcd_init(struct vidinfo *pvid, ulong lcd_base_address) +{ + struct exynos_fb *fimd_ctrl; + unsigned int cfg = 0, rgb_mode; + unsigned int offset; + unsigned int node; + + node = fdtdec_next_compatible(gd->fdt_blob, + 0, COMPAT_SAMSUNG_EXYNOS_FIMD); + if (node <= 0) + debug("exynos_fb: Can't get device node for fimd\n"); + + fimd_ctrl = (struct exynos_fb *)fdtdec_get_addr(gd->fdt_blob, node, + "reg"); + if (fimd_ctrl == NULL) + debug("Can't get the FIMD base address\n"); + pvid->fimd_ctrl = fimd_ctrl; + + if (fdtdec_get_bool(gd->fdt_blob, node, "samsung,disable-sysmmu")) + exynos_fimd_disable_sysmmu(); + + offset = exynos_fimd_get_base_offset(); + + rgb_mode = pvid->rgb_mode; + + if (pvid->interface_mode == FIMD_RGB_INTERFACE) { + cfg |= EXYNOS_VIDCON0_VIDOUT_RGB; + writel(cfg, &fimd_ctrl->vidcon0); + + cfg = readl(&fimd_ctrl->vidcon2); + cfg &= ~(EXYNOS_VIDCON2_WB_MASK | + EXYNOS_VIDCON2_TVFORMATSEL_MASK | + EXYNOS_VIDCON2_TVFORMATSEL_YUV_MASK); + cfg |= EXYNOS_VIDCON2_WB_DISABLE; + writel(cfg, &fimd_ctrl->vidcon2); + + /* set polarity */ + cfg = 0; + if (!pvid->vl_clkp) + cfg |= EXYNOS_VIDCON1_IVCLK_RISING_EDGE; + if (!pvid->vl_hsp) + cfg |= EXYNOS_VIDCON1_IHSYNC_INVERT; + if (!pvid->vl_vsp) + cfg |= EXYNOS_VIDCON1_IVSYNC_INVERT; + if (!pvid->vl_dp) + cfg |= EXYNOS_VIDCON1_IVDEN_INVERT; + + writel(cfg, (unsigned int)&fimd_ctrl->vidcon1 + offset); + + /* set timing */ + cfg = EXYNOS_VIDTCON0_VFPD(pvid->vl_vfpd - 1); + cfg |= EXYNOS_VIDTCON0_VBPD(pvid->vl_vbpd - 1); + cfg |= EXYNOS_VIDTCON0_VSPW(pvid->vl_vspw - 1); + writel(cfg, (unsigned int)&fimd_ctrl->vidtcon0 + offset); + + cfg = EXYNOS_VIDTCON1_HFPD(pvid->vl_hfpd - 1); + cfg |= EXYNOS_VIDTCON1_HBPD(pvid->vl_hbpd - 1); + cfg |= EXYNOS_VIDTCON1_HSPW(pvid->vl_hspw - 1); + + writel(cfg, (unsigned int)&fimd_ctrl->vidtcon1 + offset); + + /* set lcd size */ + cfg = EXYNOS_VIDTCON2_HOZVAL(pvid->vl_col - 1) | + EXYNOS_VIDTCON2_LINEVAL(pvid->vl_row - 1) | + EXYNOS_VIDTCON2_HOZVAL_E(pvid->vl_col - 1) | + EXYNOS_VIDTCON2_LINEVAL_E(pvid->vl_row - 1); + + writel(cfg, (unsigned int)&fimd_ctrl->vidtcon2 + offset); + } + + /* set display mode */ + cfg = readl(&fimd_ctrl->vidcon0); + cfg &= ~EXYNOS_VIDCON0_PNRMODE_MASK; + cfg |= (rgb_mode << EXYNOS_VIDCON0_PNRMODE_SHIFT); + writel(cfg, &fimd_ctrl->vidcon0); + + /* set par */ + exynos_fimd_set_par(pvid, pvid->win_id); + + /* set memory address */ + exynos_fimd_set_buffer_address(pvid, pvid->win_id, lcd_base_address); + + /* set buffer size */ + cfg = EXYNOS_VIDADDR_PAGEWIDTH(pvid->vl_col * + NBITS(pvid->vl_bpix) / 8) | + EXYNOS_VIDADDR_PAGEWIDTH_E(pvid->vl_col * + NBITS(pvid->vl_bpix) / 8) | + EXYNOS_VIDADDR_OFFSIZE(0) | + EXYNOS_VIDADDR_OFFSIZE_E(0); + + writel(cfg, (unsigned int)&fimd_ctrl->vidw00add2 + + EXYNOS_BUFFER_SIZE(pvid->win_id)); + + /* set clock */ + exynos_fimd_set_clock(pvid); + + /* set rgb mode to dual lcd. */ + exynos_fimd_set_dualrgb(pvid, pvid->dual_lcd_enabled); + + /* display on */ + exynos_fimd_lcd_on(pvid); + + /* window on */ + exynos_fimd_window_on(pvid, pvid->win_id); + + exynos_fimd_set_dp_clkcon(pvid, pvid->dp_enabled); +} + +unsigned long exynos_fimd_calc_fbsize(struct vidinfo *pvid) +{ + return pvid->vl_col * pvid->vl_row * (NBITS(pvid->vl_bpix) / 8); +} + ushort *configuration_get_cmap(void) { #if defined(CONFIG_LCD_LOGO) diff --git a/drivers/video/exynos/exynos_fimd.c b/drivers/video/exynos/exynos_fimd.c deleted file mode 100644 index 039d4c5..0000000 --- a/drivers/video/exynos/exynos_fimd.c +++ /dev/null @@ -1,405 +0,0 @@ -/* - * Copyright (C) 2012 Samsung Electronics - * - * Author: InKi Dae inki.dae@samsung.com - * Author: Donghwa Lee dh09.lee@samsung.com - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <config.h> -#include <common.h> -#include <asm/io.h> -#include <lcd.h> -#include <div64.h> -#include <fdtdec.h> -#include <libfdt.h> -#include <asm/arch/clk.h> -#include <asm/arch/clock.h> -#include <asm/arch/cpu.h> -#include "exynos_fb.h" - -DECLARE_GLOBAL_DATA_PTR; - -static void exynos_fimd_set_dualrgb(struct vidinfo *pvid, unsigned int enabled) -{ - struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl; - unsigned int cfg = 0; - - if (enabled) { - cfg = EXYNOS_DUALRGB_BYPASS_DUAL | EXYNOS_DUALRGB_LINESPLIT | - EXYNOS_DUALRGB_VDEN_EN_ENABLE; - - /* in case of Line Split mode, MAIN_CNT doesn't neet to set. */ - cfg |= EXYNOS_DUALRGB_SUB_CNT(pvid->vl_col / 2) | - EXYNOS_DUALRGB_MAIN_CNT(0); - } - - writel(cfg, &fimd_ctrl->dualrgb); -} - -static void exynos_fimd_set_dp_clkcon(struct vidinfo *pvid, - unsigned int enabled) -{ - struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl; - unsigned int cfg = 0; - - if (enabled) - cfg = EXYNOS_DP_CLK_ENABLE; - - writel(cfg, &fimd_ctrl->dp_mie_clkcon); -} - -static void exynos_fimd_set_par(struct vidinfo *pvid, unsigned int win_id) -{ - struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl; - unsigned int cfg = 0; - - /* set window control */ - cfg = readl((unsigned int)&fimd_ctrl->wincon0 + - EXYNOS_WINCON(win_id)); - - cfg &= ~(EXYNOS_WINCON_BITSWP_ENABLE | EXYNOS_WINCON_BYTESWP_ENABLE | - EXYNOS_WINCON_HAWSWP_ENABLE | EXYNOS_WINCON_WSWP_ENABLE | - EXYNOS_WINCON_BURSTLEN_MASK | EXYNOS_WINCON_BPPMODE_MASK | - EXYNOS_WINCON_INRGB_MASK | EXYNOS_WINCON_DATAPATH_MASK); - - /* DATAPATH is DMA */ - cfg |= EXYNOS_WINCON_DATAPATH_DMA; - - cfg |= EXYNOS_WINCON_HAWSWP_ENABLE; - - /* dma burst is 16 */ - cfg |= EXYNOS_WINCON_BURSTLEN_16WORD; - - switch (pvid->vl_bpix) { - case 4: - cfg |= EXYNOS_WINCON_BPPMODE_16BPP_565; - break; - default: - cfg |= EXYNOS_WINCON_BPPMODE_24BPP_888; - break; - } - - writel(cfg, (unsigned int)&fimd_ctrl->wincon0 + - EXYNOS_WINCON(win_id)); - - /* set window position to x=0, y=0*/ - cfg = EXYNOS_VIDOSD_LEFT_X(0) | EXYNOS_VIDOSD_TOP_Y(0); - writel(cfg, (unsigned int)&fimd_ctrl->vidosd0a + - EXYNOS_VIDOSD(win_id)); - - cfg = EXYNOS_VIDOSD_RIGHT_X(pvid->vl_col - 1) | - EXYNOS_VIDOSD_BOTTOM_Y(pvid->vl_row - 1) | - EXYNOS_VIDOSD_RIGHT_X_E(1) | - EXYNOS_VIDOSD_BOTTOM_Y_E(0); - - writel(cfg, (unsigned int)&fimd_ctrl->vidosd0b + - EXYNOS_VIDOSD(win_id)); - - /* set window size for window0*/ - cfg = EXYNOS_VIDOSD_SIZE(pvid->vl_col * pvid->vl_row); - writel(cfg, (unsigned int)&fimd_ctrl->vidosd0c + - EXYNOS_VIDOSD(win_id)); -} - -static void exynos_fimd_set_buffer_address(struct vidinfo *pvid, - unsigned int win_id, - ulong lcd_base_addr) -{ - struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl; - unsigned long start_addr, end_addr; - - start_addr = lcd_base_addr; - end_addr = start_addr + ((pvid->vl_col * (NBITS(pvid->vl_bpix) / 8)) * - pvid->vl_row); - - writel(start_addr, (unsigned int)&fimd_ctrl->vidw00add0b0 + - EXYNOS_BUFFER_OFFSET(win_id)); - writel(end_addr, (unsigned int)&fimd_ctrl->vidw00add1b0 + - EXYNOS_BUFFER_OFFSET(win_id)); -} - -static void exynos_fimd_set_clock(struct vidinfo *pvid) -{ - struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl; - unsigned int cfg = 0, div = 0, remainder, remainder_div; - unsigned long pixel_clock; - unsigned long long src_clock; - - if (pvid->dual_lcd_enabled) { - pixel_clock = pvid->vl_freq * - (pvid->vl_hspw + pvid->vl_hfpd + - pvid->vl_hbpd + pvid->vl_col / 2) * - (pvid->vl_vspw + pvid->vl_vfpd + - pvid->vl_vbpd + pvid->vl_row); - } else if (pvid->interface_mode == FIMD_CPU_INTERFACE) { - pixel_clock = pvid->vl_freq * - pvid->vl_width * pvid->vl_height * - (pvid->cs_setup + pvid->wr_setup + - pvid->wr_act + pvid->wr_hold + 1); - } else { - pixel_clock = pvid->vl_freq * - (pvid->vl_hspw + pvid->vl_hfpd + - pvid->vl_hbpd + pvid->vl_col) * - (pvid->vl_vspw + pvid->vl_vfpd + - pvid->vl_vbpd + pvid->vl_row); - } - - cfg = readl(&fimd_ctrl->vidcon0); - cfg &= ~(EXYNOS_VIDCON0_CLKSEL_MASK | EXYNOS_VIDCON0_CLKVALUP_MASK | - EXYNOS_VIDCON0_CLKVAL_F(0xFF) | EXYNOS_VIDCON0_VCLKEN_MASK | - EXYNOS_VIDCON0_CLKDIR_MASK); - cfg |= (EXYNOS_VIDCON0_CLKSEL_SCLK | EXYNOS_VIDCON0_CLKVALUP_ALWAYS | - EXYNOS_VIDCON0_VCLKEN_NORMAL | EXYNOS_VIDCON0_CLKDIR_DIVIDED); - - src_clock = (unsigned long long) get_lcd_clk(); - - /* get quotient and remainder. */ - remainder = do_div(src_clock, pixel_clock); - div = src_clock; - - remainder *= 10; - remainder_div = remainder / pixel_clock; - - /* round about one places of decimals. */ - if (remainder_div >= 5) - div++; - - /* in case of dual lcd mode. */ - if (pvid->dual_lcd_enabled) - div--; - - cfg |= EXYNOS_VIDCON0_CLKVAL_F(div - 1); - writel(cfg, &fimd_ctrl->vidcon0); -} - -void exynos_set_trigger(struct vidinfo *pvid) -{ - struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl; - unsigned int cfg = 0; - - cfg = readl(&fimd_ctrl->trigcon); - - cfg |= (EXYNOS_I80SOFT_TRIG_EN | EXYNOS_I80START_TRIG); - - writel(cfg, &fimd_ctrl->trigcon); -} - -int exynos_is_i80_frame_done(struct vidinfo *pvid) -{ - struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl; - unsigned int cfg = 0; - int status; - - cfg = readl(&fimd_ctrl->trigcon); - - /* frame done func is valid only when TRIMODE[0] is set to 1. */ - status = (cfg & EXYNOS_I80STATUS_TRIG_DONE) == - EXYNOS_I80STATUS_TRIG_DONE; - - return status; -} - -static void exynos_fimd_lcd_on(struct vidinfo *pvid) -{ - struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl; - unsigned int cfg = 0; - - /* display on */ - cfg = readl(&fimd_ctrl->vidcon0); - cfg |= (EXYNOS_VIDCON0_ENVID_ENABLE | EXYNOS_VIDCON0_ENVID_F_ENABLE); - writel(cfg, &fimd_ctrl->vidcon0); -} - -static void exynos_fimd_window_on(struct vidinfo *pvid, unsigned int win_id) -{ - struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl; - unsigned int cfg = 0; - - /* enable window */ - cfg = readl((unsigned int)&fimd_ctrl->wincon0 + - EXYNOS_WINCON(win_id)); - cfg |= EXYNOS_WINCON_ENWIN_ENABLE; - writel(cfg, (unsigned int)&fimd_ctrl->wincon0 + - EXYNOS_WINCON(win_id)); - - cfg = readl(&fimd_ctrl->winshmap); - cfg |= EXYNOS_WINSHMAP_CH_ENABLE(win_id); - writel(cfg, &fimd_ctrl->winshmap); -} - -void exynos_fimd_lcd_off(struct vidinfo *pvid) -{ - struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl; - unsigned int cfg = 0; - - cfg = readl(&fimd_ctrl->vidcon0); - cfg &= (EXYNOS_VIDCON0_ENVID_DISABLE | EXYNOS_VIDCON0_ENVID_F_DISABLE); - writel(cfg, &fimd_ctrl->vidcon0); -} - -void exynos_fimd_window_off(struct vidinfo *pvid, unsigned int win_id) -{ - struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl; - unsigned int cfg = 0; - - cfg = readl((unsigned int)&fimd_ctrl->wincon0 + - EXYNOS_WINCON(win_id)); - cfg &= EXYNOS_WINCON_ENWIN_DISABLE; - writel(cfg, (unsigned int)&fimd_ctrl->wincon0 + - EXYNOS_WINCON(win_id)); - - cfg = readl(&fimd_ctrl->winshmap); - cfg &= ~EXYNOS_WINSHMAP_CH_DISABLE(win_id); - writel(cfg, &fimd_ctrl->winshmap); -} - -/* -* The reset value for FIMD SYSMMU register MMU_CTRL is 3 -* on Exynos5420 and newer versions. -* This means FIMD SYSMMU is on by default on Exynos5420 -* and newer versions. -* Since in u-boot we don't use SYSMMU, we should disable -* those FIMD SYSMMU. -* Note that there are 2 SYSMMU for FIMD: m0 and m1. -* m0 handles windows 0 and 4, and m1 handles windows 1, 2 and 3. -* We disable both of them here. -*/ -void exynos_fimd_disable_sysmmu(void) -{ - u32 *sysmmufimd; - unsigned int node; - int node_list[2]; - int count; - int i; - - count = fdtdec_find_aliases_for_id(gd->fdt_blob, "fimd", - COMPAT_SAMSUNG_EXYNOS_SYSMMU, node_list, 2); - for (i = 0; i < count; i++) { - node = node_list[i]; - if (node <= 0) { - debug("Can't get device node for fimd sysmmu\n"); - return; - } - - sysmmufimd = (u32 *)fdtdec_get_addr(gd->fdt_blob, node, "reg"); - if (!sysmmufimd) { - debug("Can't get base address for sysmmu fimdm0"); - return; - } - - writel(0x0, sysmmufimd); - } -} - -void exynos_fimd_lcd_init(struct vidinfo *pvid, ulong lcd_base_address) -{ - struct exynos_fb *fimd_ctrl; - unsigned int cfg = 0, rgb_mode; - unsigned int offset; - unsigned int node; - - node = fdtdec_next_compatible(gd->fdt_blob, - 0, COMPAT_SAMSUNG_EXYNOS_FIMD); - if (node <= 0) - debug("exynos_fb: Can't get device node for fimd\n"); - - fimd_ctrl = (struct exynos_fb *)fdtdec_get_addr(gd->fdt_blob, node, - "reg"); - if (fimd_ctrl == NULL) - debug("Can't get the FIMD base address\n"); - pvid->fimd_ctrl = fimd_ctrl; - - if (fdtdec_get_bool(gd->fdt_blob, node, "samsung,disable-sysmmu")) - exynos_fimd_disable_sysmmu(); - - offset = exynos_fimd_get_base_offset(); - - rgb_mode = pvid->rgb_mode; - - if (pvid->interface_mode == FIMD_RGB_INTERFACE) { - cfg |= EXYNOS_VIDCON0_VIDOUT_RGB; - writel(cfg, &fimd_ctrl->vidcon0); - - cfg = readl(&fimd_ctrl->vidcon2); - cfg &= ~(EXYNOS_VIDCON2_WB_MASK | - EXYNOS_VIDCON2_TVFORMATSEL_MASK | - EXYNOS_VIDCON2_TVFORMATSEL_YUV_MASK); - cfg |= EXYNOS_VIDCON2_WB_DISABLE; - writel(cfg, &fimd_ctrl->vidcon2); - - /* set polarity */ - cfg = 0; - if (!pvid->vl_clkp) - cfg |= EXYNOS_VIDCON1_IVCLK_RISING_EDGE; - if (!pvid->vl_hsp) - cfg |= EXYNOS_VIDCON1_IHSYNC_INVERT; - if (!pvid->vl_vsp) - cfg |= EXYNOS_VIDCON1_IVSYNC_INVERT; - if (!pvid->vl_dp) - cfg |= EXYNOS_VIDCON1_IVDEN_INVERT; - - writel(cfg, (unsigned int)&fimd_ctrl->vidcon1 + offset); - - /* set timing */ - cfg = EXYNOS_VIDTCON0_VFPD(pvid->vl_vfpd - 1); - cfg |= EXYNOS_VIDTCON0_VBPD(pvid->vl_vbpd - 1); - cfg |= EXYNOS_VIDTCON0_VSPW(pvid->vl_vspw - 1); - writel(cfg, (unsigned int)&fimd_ctrl->vidtcon0 + offset); - - cfg = EXYNOS_VIDTCON1_HFPD(pvid->vl_hfpd - 1); - cfg |= EXYNOS_VIDTCON1_HBPD(pvid->vl_hbpd - 1); - cfg |= EXYNOS_VIDTCON1_HSPW(pvid->vl_hspw - 1); - - writel(cfg, (unsigned int)&fimd_ctrl->vidtcon1 + offset); - - /* set lcd size */ - cfg = EXYNOS_VIDTCON2_HOZVAL(pvid->vl_col - 1) | - EXYNOS_VIDTCON2_LINEVAL(pvid->vl_row - 1) | - EXYNOS_VIDTCON2_HOZVAL_E(pvid->vl_col - 1) | - EXYNOS_VIDTCON2_LINEVAL_E(pvid->vl_row - 1); - - writel(cfg, (unsigned int)&fimd_ctrl->vidtcon2 + offset); - } - - /* set display mode */ - cfg = readl(&fimd_ctrl->vidcon0); - cfg &= ~EXYNOS_VIDCON0_PNRMODE_MASK; - cfg |= (rgb_mode << EXYNOS_VIDCON0_PNRMODE_SHIFT); - writel(cfg, &fimd_ctrl->vidcon0); - - /* set par */ - exynos_fimd_set_par(pvid, pvid->win_id); - - /* set memory address */ - exynos_fimd_set_buffer_address(pvid, pvid->win_id, lcd_base_address); - - /* set buffer size */ - cfg = EXYNOS_VIDADDR_PAGEWIDTH(pvid->vl_col * NBITS(pvid->vl_bpix) / 8) | - EXYNOS_VIDADDR_PAGEWIDTH_E(pvid->vl_col * NBITS(pvid->vl_bpix) / 8) | - EXYNOS_VIDADDR_OFFSIZE(0) | - EXYNOS_VIDADDR_OFFSIZE_E(0); - - writel(cfg, (unsigned int)&fimd_ctrl->vidw00add2 + - EXYNOS_BUFFER_SIZE(pvid->win_id)); - - /* set clock */ - exynos_fimd_set_clock(pvid); - - /* set rgb mode to dual lcd. */ - exynos_fimd_set_dualrgb(pvid, pvid->dual_lcd_enabled); - - /* display on */ - exynos_fimd_lcd_on(pvid); - - /* window on */ - exynos_fimd_window_on(pvid, pvid->win_id); - - exynos_fimd_set_dp_clkcon(pvid, pvid->dp_enabled); -} - -unsigned long exynos_fimd_calc_fbsize(struct vidinfo *pvid) -{ - return pvid->vl_col * pvid->vl_row * (NBITS(pvid->vl_bpix) / 8); -}

This is used for video signals in some drivers so provide a standard way of representing it in an enum.

Signed-off-by: Simon Glass sjg@chromium.org ---

include/video.h | 5 +++++ 1 file changed, 5 insertions(+)

diff --git a/include/video.h b/include/video.h index 5b147ba..41e3cbf 100644 --- a/include/video.h +++ b/include/video.h @@ -23,6 +23,11 @@ struct video_uc_platdata { ulong base; };

+enum video_polarity { + VIDEO_ACTIVE_HIGH, /* Pins are active high */ + VIDEO_ACTIVE_LOW, /* Pins are active low */ +}; + /* * Bits per pixel selector. Each value n is such that the bits-per-pixel is * 2 ^ n

This file currently requires an LCD. Adjust it to work without one.

Signed-off-by: Simon Glass sjg@chromium.org ---

include/libtizen.h | 2 ++ lib/tizen/tizen.c | 2 ++ 2 files changed, 4 insertions(+)

diff --git a/include/libtizen.h b/include/libtizen.h index 6490fb5..55dccff 100644 --- a/include/libtizen.h +++ b/include/libtizen.h @@ -10,6 +10,8 @@

#define HD_RESOLUTION 0

+#ifdef CONFIG_LCD void get_tizen_logo_info(vidinfo_t *vid); +#endif

#endif /* _LIBTIZEN_H_ */ diff --git a/lib/tizen/tizen.c b/lib/tizen/tizen.c index 814ed18..d207f77 100644 --- a/lib/tizen/tizen.c +++ b/lib/tizen/tizen.c @@ -12,6 +12,7 @@ #include "tizen_logo_16bpp.h" #include "tizen_logo_16bpp_gzip.h"

+#ifdef CONFIG_LCD void get_tizen_logo_info(vidinfo_t *vid) { switch (vid->vl_bpix) { @@ -31,3 +32,4 @@ void get_tizen_logo_info(vidinfo_t *vid) break; } } +#endif

Some boards have the LCD enabled but I cannot test operation for the driver model conversion. Disable the LCD on these to avoid build errors.

Signed-off-by: Simon Glass sjg@chromium.org ---

board/samsung/trats/trats.c | 2 ++ board/samsung/universal_c210/universal.c | 2 ++ include/configs/s5pc210_universal.h | 3 --- include/configs/smdk5250.h | 3 +++ include/configs/smdk5420.h | 4 ++++ include/configs/trats.h | 4 ---- include/configs/trats2.h | 4 ---- 7 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c index 54d01ec..66a54d4 100644 --- a/board/samsung/trats/trats.c +++ b/board/samsung/trats/trats.c @@ -596,6 +596,7 @@ int mipi_power(void) return 0; }

+#ifdef CONFIG_LCD void exynos_lcd_misc_init(vidinfo_t *vid) { #ifdef CONFIG_TIZEN @@ -606,3 +607,4 @@ void exynos_lcd_misc_init(vidinfo_t *vid) setenv("lcdinfo", "lcd=s6e8ax0"); #endif } +#endif diff --git a/board/samsung/universal_c210/universal.c b/board/samsung/universal_c210/universal.c index c25b486..950e039 100644 --- a/board/samsung/universal_c210/universal.c +++ b/board/samsung/universal_c210/universal.c @@ -367,6 +367,7 @@ int exynos_init(void) return 0; }

+#ifdef CONFIG_LCD void exynos_lcd_misc_init(vidinfo_t *vid) { #ifdef CONFIG_TIZEN @@ -379,3 +380,4 @@ void exynos_lcd_misc_init(vidinfo_t *vid)

setenv("lcdinfo", "lcd=ld9040"); } +#endif diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index 7bb62ca..8e63407 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -222,9 +222,6 @@ int universal_spi_read(void); /* * LCD Settings */ -#define CONFIG_EXYNOS_FB -#define CONFIG_LCD -#define CONFIG_CMD_BMP #define CONFIG_BMP_16BPP #define CONFIG_LD9040 #define CONFIG_VIDEO_BMP_GZIP diff --git a/include/configs/smdk5250.h b/include/configs/smdk5250.h index f66bb12..92a0833 100644 --- a/include/configs/smdk5250.h +++ b/include/configs/smdk5250.h @@ -13,6 +13,9 @@ #include <configs/exynos5-dt-common.h> #include <configs/exynos5-common.h>

+#undef CONFIG_LCD +#undef CONFIG_EXYNOS_FB +#undef CONFIG_EXYNOS_DP #undef CONFIG_KEYBOARD

#define CONFIG_BOARD_COMMON diff --git a/include/configs/smdk5420.h b/include/configs/smdk5420.h index 9cf886c..5fe21d9 100644 --- a/include/configs/smdk5420.h +++ b/include/configs/smdk5420.h @@ -13,6 +13,10 @@ #include <configs/exynos5-dt-common.h> #include <configs/exynos5-common.h>

+#undef CONFIG_LCD +#undef CONFIG_EXYNOS_FB +#undef CONFIG_EXYNOS_DP + #undef CONFIG_KEYBOARD

#define CONFIG_BOARD_COMMON diff --git a/include/configs/trats.h b/include/configs/trats.h index 5fb991b..0423033 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -247,12 +247,8 @@ #define CONFIG_SYS_WHITE_ON_BLACK

/* LCD */ -#define CONFIG_EXYNOS_FB -#define CONFIG_LCD -#define CONFIG_CMD_BMP #define CONFIG_BMP_16BPP #define CONFIG_FB_ADDR 0x52504000 -#define CONFIG_S6E8AX0 #define CONFIG_EXYNOS_MIPI_DSIM #define CONFIG_VIDEO_BMP_GZIP #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54) diff --git a/include/configs/trats2.h b/include/configs/trats2.h index f12a952..24fbc1a 100644 --- a/include/configs/trats2.h +++ b/include/configs/trats2.h @@ -226,12 +226,8 @@ int get_soft_i2c_sda_pin(void); #define CONFIG_SYS_WHITE_ON_BLACK

/* LCD */ -#define CONFIG_EXYNOS_FB -#define CONFIG_LCD -#define CONFIG_CMD_BMP #define CONFIG_BMP_16BPP #define CONFIG_FB_ADDR 0x52504000 -#define CONFIG_S6E8AX0 #define CONFIG_EXYNOS_MIPI_DSIM #define CONFIG_VIDEO_BMP_GZIP #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54)

This is commonly used for LCD backlight control. Add pinmux support for it on exynos5250 and 5420.

Signed-off-by: Simon Glass sjg@chromium.org ---

arch/arm/mach-exynos/pinmux.c | 6 ++++++ 1 file changed, 6 insertions(+)

diff --git a/arch/arm/mach-exynos/pinmux.c b/arch/arm/mach-exynos/pinmux.c index 12eb79c..fec2df9 100644 --- a/arch/arm/mach-exynos/pinmux.c +++ b/arch/arm/mach-exynos/pinmux.c @@ -506,6 +506,9 @@ static int exynos5_pinmux_config(int peripheral, int flags) */ gpio_set_pull(EXYNOS5_GPIO_X07, S5P_GPIO_PULL_NONE); break; + case PERIPH_ID_PWM0: + gpio_cfg_pin(EXYNOS5_GPIO_B20, S5P_GPIO_FUNC(2)); + break; default: debug("%s: invalid peripheral %d", __func__, peripheral); return -1; @@ -548,6 +551,9 @@ static int exynos5420_pinmux_config(int peripheral, int flags) case PERIPH_ID_I2C10: exynos5420_i2c_config(peripheral); break; + case PERIPH_ID_PWM0: + gpio_cfg_pin(EXYNOS5420_GPIO_B20, S5P_GPIO_FUNC(2)); + break; default: debug("%s: invalid peripheral %d", __func__, peripheral); return -1;

This function controls enabling the EDP PHY. Rename it and drop the existing weak functions, which are confusing.

Signed-off-by: Simon Glass sjg@chromium.org ---

arch/arm/mach-exynos/include/mach/power.h | 2 +- arch/arm/mach-exynos/power.c | 2 +- board/samsung/common/exynos5-dt.c | 5 ----- drivers/video/exynos/exynos_dp.c | 9 ++------- 4 files changed, 4 insertions(+), 14 deletions(-)

diff --git a/arch/arm/mach-exynos/include/mach/power.h b/arch/arm/mach-exynos/include/mach/power.h index 3f97b31..88f70d9 100644 --- a/arch/arm/mach-exynos/include/mach/power.h +++ b/arch/arm/mach-exynos/include/mach/power.h @@ -1717,7 +1717,7 @@ void set_usbdrd_phy_ctrl(unsigned int enable); #define POWER_USB_DRD_PHY_CTRL_EN (1 << 0) #define POWER_USB_DRD_PHY_CTRL_DISABLE (0 << 0)

-void set_dp_phy_ctrl(unsigned int enable); +void exynos_dp_phy_ctrl(unsigned int enable);

#define EXYNOS_DP_PHY_ENABLE (1 << 0)

diff --git a/arch/arm/mach-exynos/power.c b/arch/arm/mach-exynos/power.c index cd2d661..c923460 100644 --- a/arch/arm/mach-exynos/power.c +++ b/arch/arm/mach-exynos/power.c @@ -147,7 +147,7 @@ static void exynos5_dp_phy_control(unsigned int enable) writel(cfg, &power->dptx_phy_control); }

-void set_dp_phy_ctrl(unsigned int enable) +void exynos_dp_phy_ctrl(unsigned int enable) { if (cpu_is_exynos5()) exynos5_dp_phy_control(enable); diff --git a/board/samsung/common/exynos5-dt.c b/board/samsung/common/exynos5-dt.c index 4d9e151..0dcea71 100644 --- a/board/samsung/common/exynos5-dt.c +++ b/board/samsung/common/exynos5-dt.c @@ -235,11 +235,6 @@ void exynos_cfg_lcd_gpio(void) gpio_set_value(EXYNOS5_GPIO_B20, 1); }

-void exynos_set_dp_phy(unsigned int onoff) -{ - set_dp_phy_ctrl(onoff); -} - static int board_dp_set_backlight(int percent) { struct udevice *dev; diff --git a/drivers/video/exynos/exynos_dp.c b/drivers/video/exynos/exynos_dp.c index 0319d99..a812784 100644 --- a/drivers/video/exynos/exynos_dp.c +++ b/drivers/video/exynos/exynos_dp.c @@ -15,6 +15,7 @@ #include <asm/arch/cpu.h> #include <asm/arch/dp_info.h> #include <asm/arch/dp.h> +#include <asm/arch/power.h> #include <fdtdec.h> #include <libfdt.h>

@@ -22,12 +23,6 @@

DECLARE_GLOBAL_DATA_PTR;

-void __exynos_set_dp_phy(unsigned int onoff) -{ -} -void exynos_set_dp_phy(unsigned int onoff) - __attribute__((weak, alias("__exynos_set_dp_phy"))); - static void exynos_dp_disp_info(struct edp_disp_info *disp_info) { disp_info->h_total = disp_info->h_res + disp_info->h_sync_width + @@ -959,7 +954,7 @@ unsigned int exynos_init_dp(void)

exynos_dp_disp_info(&edp_info->disp_info);

- exynos_set_dp_phy(1); + exynos_dp_phy_ctrl(1);

ret = exynos_dp_init_dp(dp_regs); if (ret != EXYNOS_DP_SUCCESS) {

Rename this function to better fit with driver model. It is the private data for the exynos EDP driver.

Signed-off-by: Simon Glass sjg@chromium.org ---

arch/arm/mach-exynos/include/mach/dp_info.h | 4 ++-- drivers/video/exynos/exynos_dp.c | 26 +++++++++++++------------- drivers/video/exynos/exynos_dp_lowlevel.c | 2 +- drivers/video/exynos/exynos_dp_lowlevel.h | 2 +- 4 files changed, 17 insertions(+), 17 deletions(-)

diff --git a/arch/arm/mach-exynos/include/mach/dp_info.h b/arch/arm/mach-exynos/include/mach/dp_info.h index 17e8f56..8ce33d6 100644 --- a/arch/arm/mach-exynos/include/mach/dp_info.h +++ b/arch/arm/mach-exynos/include/mach/dp_info.h @@ -61,7 +61,7 @@ struct edp_video_info { unsigned int color_depth; };

-struct edp_device_info { +struct exynos_dp_priv { struct edp_disp_info disp_info; struct edp_link_train_info lt_info; struct edp_video_info video_info; @@ -185,7 +185,7 @@ enum {

struct exynos_dp_platform_data { - struct edp_device_info *edp_dev_info; + struct exynos_dp_priv *edp_dev_info; };

#ifdef CONFIG_EXYNOS_DP diff --git a/drivers/video/exynos/exynos_dp.c b/drivers/video/exynos/exynos_dp.c index a812784..9bd88b1 100644 --- a/drivers/video/exynos/exynos_dp.c +++ b/drivers/video/exynos/exynos_dp.c @@ -162,7 +162,7 @@ static unsigned int exynos_dp_read_edid(struct exynos_dp *dp_regs) }

static unsigned int exynos_dp_handle_edid(struct exynos_dp *dp_regs, - struct edp_device_info *edp_info) + struct exynos_dp_priv *edp_info) { unsigned char buf[12]; unsigned int ret; @@ -251,7 +251,7 @@ static void exynos_dp_init_training(struct exynos_dp *dp_regs) }

static unsigned int exynos_dp_link_start(struct exynos_dp *dp_regs, - struct edp_device_info *edp_info) + struct exynos_dp_priv *edp_info) { unsigned char buf[5]; unsigned int ret = 0; @@ -376,7 +376,7 @@ static unsigned int exynos_dp_set_enhanced_mode(struct exynos_dp *dp_regs, }

static int exynos_dp_read_dpcd_lane_stat(struct exynos_dp *dp_regs, - struct edp_device_info *edp_info, + struct exynos_dp_priv *edp_info, unsigned char *status) { unsigned int ret, i; @@ -433,7 +433,7 @@ static unsigned int exynos_dp_read_dpcd_adj_req(struct exynos_dp *dp_regs, }

static int exynos_dp_equalizer_err_link(struct exynos_dp *dp_regs, - struct edp_device_info *edp_info) + struct exynos_dp_priv *edp_info) { int ret;

@@ -453,7 +453,7 @@ static int exynos_dp_equalizer_err_link(struct exynos_dp *dp_regs, }

static int exynos_dp_reduce_link_rate(struct exynos_dp *dp_regs, - struct edp_device_info *edp_info) + struct exynos_dp_priv *edp_info) { int ret;

@@ -478,7 +478,7 @@ static int exynos_dp_reduce_link_rate(struct exynos_dp *dp_regs, }

static unsigned int exynos_dp_process_clock_recovery(struct exynos_dp *dp_regs, - struct edp_device_info *edp_info) + struct exynos_dp_priv *edp_info) { unsigned int ret = EXYNOS_DP_SUCCESS; unsigned char lane_stat; @@ -588,7 +588,7 @@ static unsigned int exynos_dp_process_clock_recovery(struct exynos_dp *dp_regs, }

static unsigned int exynos_dp_process_equalizer_training( - struct exynos_dp *dp_regs, struct edp_device_info *edp_info) + struct exynos_dp *dp_regs, struct exynos_dp_priv *edp_info) { unsigned int ret = EXYNOS_DP_SUCCESS; unsigned char lane_stat, adj_req_sw, adj_req_em, i; @@ -697,7 +697,7 @@ static unsigned int exynos_dp_process_equalizer_training( }

static unsigned int exynos_dp_sw_link_training(struct exynos_dp *dp_regs, - struct edp_device_info *edp_info) + struct exynos_dp_priv *edp_info) { unsigned int ret = 0; int training_finished; @@ -748,7 +748,7 @@ static unsigned int exynos_dp_sw_link_training(struct exynos_dp *dp_regs, }

static unsigned int exynos_dp_set_link_train(struct exynos_dp *dp_regs, - struct edp_device_info *edp_info) + struct exynos_dp_priv *edp_info) { unsigned int ret;

@@ -783,7 +783,7 @@ static void exynos_dp_enable_scramble(struct exynos_dp *dp_regs, }

static unsigned int exynos_dp_config_video(struct exynos_dp *dp_regs, - struct edp_device_info *edp_info) + struct exynos_dp_priv *edp_info) { unsigned int ret = 0; unsigned int retry_cnt; @@ -872,7 +872,7 @@ static unsigned int exynos_dp_config_video(struct exynos_dp *dp_regs, return ret; }

-int exynos_dp_parse_dt(const void *blob, struct edp_device_info *edp_info) +int exynos_dp_parse_dt(const void *blob, struct exynos_dp_priv *edp_info) { unsigned int node = fdtdec_next_compatible(blob, 0, COMPAT_SAMSUNG_EXYNOS5_DP); @@ -929,11 +929,11 @@ int exynos_dp_parse_dt(const void *blob, struct edp_device_info *edp_info) unsigned int exynos_init_dp(void) { unsigned int ret; - struct edp_device_info *edp_info; + struct exynos_dp_priv *edp_info; struct exynos_dp *dp_regs; int node;

- edp_info = kzalloc(sizeof(struct edp_device_info), GFP_KERNEL); + edp_info = kzalloc(sizeof(struct exynos_dp_priv), GFP_KERNEL); if (!edp_info) { debug("failed to allocate edp device object.\n"); return -EFAULT; diff --git a/drivers/video/exynos/exynos_dp_lowlevel.c b/drivers/video/exynos/exynos_dp_lowlevel.c index 05e64b6..3d9abdf 100644 --- a/drivers/video/exynos/exynos_dp_lowlevel.c +++ b/drivers/video/exynos/exynos_dp_lowlevel.c @@ -1066,7 +1066,7 @@ void exynos_dp_set_video_color_format(struct exynos_dp *dp_regs, }

int exynos_dp_config_video_bist(struct exynos_dp *dp_regs, - struct edp_device_info *edp_info) + struct exynos_dp_priv *edp_info) { unsigned int reg; unsigned int bist_type = 0; diff --git a/drivers/video/exynos/exynos_dp_lowlevel.h b/drivers/video/exynos/exynos_dp_lowlevel.h index 85459b5..0a7657e 100644 --- a/drivers/video/exynos/exynos_dp_lowlevel.h +++ b/drivers/video/exynos/exynos_dp_lowlevel.h @@ -74,7 +74,7 @@ void exynos_dp_config_video_slave_mode(struct exynos_dp *dp_regs, void exynos_dp_set_video_color_format(struct exynos_dp *dp_regs, struct edp_video_info *video_info); int exynos_dp_config_video_bist(struct exynos_dp *dp_regs, - struct edp_device_info *edp_info); + struct exynos_dp_priv *edp_info); unsigned int exynos_dp_is_slave_video_stream_clock_on( struct exynos_dp *dp_regs); void exynos_dp_set_video_cr_mn(struct exynos_dp *dp_regs, unsigned int type,

Update several boards to use driver model for video. This involves changes to the EDP and FIMD (frame buffer) drivers. Existing PWM, simple-panel and pwm-backlight drivers are used. These work without additional configuration since they use the device tree settings in the same way as Linux.

Boards converted are: - snow - spring - peach-pit - peach-pi

All have been tested. Not converted:

- MIPI display driver - s5pc210_universal - smdk5420 - smdk5250 - trats - trats2

Signed-off-by: Simon Glass sjg@chromium.org ---

arch/arm/mach-exynos/include/mach/dp_info.h | 1 + board/samsung/common/board.c | 15 - configs/peach-pi_defconfig | 3 + configs/peach-pit_defconfig | 3 + configs/snow_defconfig | 3 + configs/spring_defconfig | 3 + drivers/video/exynos/exynos_dp.c | 146 ++++++++-- drivers/video/exynos/exynos_fb.c | 407 ++++++++++++++++------------ drivers/video/simple_panel.c | 2 + include/configs/exynos5-dt-common.h | 5 +- 10 files changed, 373 insertions(+), 215 deletions(-)

diff --git a/arch/arm/mach-exynos/include/mach/dp_info.h b/arch/arm/mach-exynos/include/mach/dp_info.h index 8ce33d6..1079e1e 100644 --- a/arch/arm/mach-exynos/include/mach/dp_info.h +++ b/arch/arm/mach-exynos/include/mach/dp_info.h @@ -72,6 +72,7 @@ struct exynos_dp_priv { unsigned char dpcd_rev; /*support enhanced frame cap */ unsigned char dpcd_efc; + struct exynos_dp *regs; };

enum analog_power_block { diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c index 1334c22..bb6b14b 100644 --- a/board/samsung/common/board.c +++ b/board/samsung/common/board.c @@ -152,21 +152,6 @@ int board_early_init_f(void) board_i2c_init(gd->fdt_blob); #endif

-#if defined(CONFIG_EXYNOS_FB) - /* - * board_init_f(arch/arm/lib/board.c) calls lcd_setmem() which needs - * panel_info.vl_col, panel_info.vl_row and panel_info.vl_bpix, - * to reserve frame-buffer memory at a very early stage. So, we need - * to fill panel_info.vl_col, panel_info.vl_row and panel_info.vl_bpix - * before lcd_setmem() is called. - */ - err = exynos_lcd_early_init(gd->fdt_blob); - if (err) { - debug("LCD early init failed\n"); - return err; - } -#endif - return exynos_early_init_f(); } #endif diff --git a/configs/peach-pi_defconfig b/configs/peach-pi_defconfig index 65c6044..de08d4e 100644 --- a/configs/peach-pi_defconfig +++ b/configs/peach-pi_defconfig @@ -27,6 +27,8 @@ CONFIG_DM_PMIC=y CONFIG_PMIC_TPS65090=y CONFIG_DM_REGULATOR=y CONFIG_REGULATOR_TPS65090=y +CONFIG_DM_PWM=y +CONFIG_PWM_EXYNOS=y CONFIG_SOUND=y CONFIG_I2S=y CONFIG_I2S_SAMSUNG=y @@ -36,6 +38,7 @@ CONFIG_EXYNOS_SPI=y CONFIG_TPM_TIS_INFINEON=y CONFIG_USB=y CONFIG_DM_USB=y +CONFIG_DM_VIDEO=y CONFIG_VIDEO_BRIDGE=y CONFIG_VIDEO_BRIDGE_PARADE_PS862X=y CONFIG_TPM=y diff --git a/configs/peach-pit_defconfig b/configs/peach-pit_defconfig index 272988f..def7fca 100644 --- a/configs/peach-pit_defconfig +++ b/configs/peach-pit_defconfig @@ -27,6 +27,8 @@ CONFIG_DM_PMIC=y CONFIG_PMIC_TPS65090=y CONFIG_DM_REGULATOR=y CONFIG_REGULATOR_TPS65090=y +CONFIG_DM_PWM=y +CONFIG_PWM_EXYNOS=y CONFIG_SOUND=y CONFIG_I2S=y CONFIG_I2S_SAMSUNG=y @@ -36,6 +38,7 @@ CONFIG_EXYNOS_SPI=y CONFIG_TPM_TIS_INFINEON=y CONFIG_USB=y CONFIG_DM_USB=y +CONFIG_DM_VIDEO=y CONFIG_VIDEO_BRIDGE=y CONFIG_VIDEO_BRIDGE_PARADE_PS862X=y CONFIG_TPM=y diff --git a/configs/snow_defconfig b/configs/snow_defconfig index 3d8081b..f1d1313 100644 --- a/configs/snow_defconfig +++ b/configs/snow_defconfig @@ -32,6 +32,8 @@ CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_MAX77686=y CONFIG_REGULATOR_S5M8767=y CONFIG_REGULATOR_TPS65090=y +CONFIG_DM_PWM=y +CONFIG_PWM_EXYNOS=y CONFIG_DEBUG_UART=y CONFIG_DEBUG_UART_S5P=y CONFIG_DEBUG_UART_BASE=0x12c30000 @@ -45,6 +47,7 @@ CONFIG_EXYNOS_SPI=y CONFIG_TPM_TIS_INFINEON=y CONFIG_USB=y CONFIG_DM_USB=y +CONFIG_DM_VIDEO=y CONFIG_VIDEO_BRIDGE=y CONFIG_VIDEO_BRIDGE_PARADE_PS862X=y CONFIG_VIDEO_BRIDGE_NXP_PTN3460=y diff --git a/configs/spring_defconfig b/configs/spring_defconfig index 11cb6e3..1d37069 100644 --- a/configs/spring_defconfig +++ b/configs/spring_defconfig @@ -32,6 +32,8 @@ CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_MAX77686=y CONFIG_REGULATOR_S5M8767=y CONFIG_REGULATOR_TPS65090=y +CONFIG_DM_PWM=y +CONFIG_PWM_EXYNOS=y CONFIG_DEBUG_UART=y CONFIG_DEBUG_UART_S5P=y CONFIG_DEBUG_UART_BASE=0x12c30000 @@ -45,6 +47,7 @@ CONFIG_EXYNOS_SPI=y CONFIG_TPM_TIS_INFINEON=y CONFIG_USB=y CONFIG_DM_USB=y +CONFIG_DM_VIDEO=y CONFIG_VIDEO_BRIDGE=y CONFIG_VIDEO_BRIDGE_PARADE_PS862X=y CONFIG_TPM=y diff --git a/drivers/video/exynos/exynos_dp.c b/drivers/video/exynos/exynos_dp.c index 5f39b0c..8f2699b 100644 --- a/drivers/video/exynos/exynos_dp.c +++ b/drivers/video/exynos/exynos_dp.c @@ -7,17 +7,21 @@ */

#include <config.h> +#include <dm.h> #include <common.h> +#include <display.h> +#include <fdtdec.h> +#include <libfdt.h> #include <malloc.h> +#include <video_bridge.h> #include <linux/compat.h> #include <linux/err.h> #include <asm/arch/clk.h> #include <asm/arch/cpu.h> #include <asm/arch/dp_info.h> #include <asm/arch/dp.h> +#include <asm/arch/pinmux.h> #include <asm/arch/power.h> -#include <fdtdec.h> -#include <libfdt.h>

#include "exynos_dp_lowlevel.h"

@@ -872,15 +876,19 @@ static unsigned int exynos_dp_config_video(struct exynos_dp *regs, return ret; }

-int exynos_dp_parse_dt(const void *blob, struct exynos_dp_priv *priv) +static int exynos_dp_ofdata_to_platdata(struct udevice *dev) { - unsigned int node = fdtdec_next_compatible(blob, 0, - COMPAT_SAMSUNG_EXYNOS5_DP); - if (node <= 0) { - debug("exynos_dp: Can't get device node for dp\n"); - return -ENODEV; - } + struct exynos_dp_priv *priv = dev_get_priv(dev); + const void *blob = gd->fdt_blob; + unsigned int node = dev->of_offset; + fdt_addr_t addr;

+ addr = dev_get_addr(dev); + if (addr == FDT_ADDR_T_NONE) { + debug("Can't get the DP base address\n"); + return -EINVAL; + } + priv->regs = (struct exynos_dp *)addr; priv->disp_info.h_res = fdtdec_get_int(blob, node, "samsung,h-res", 0); priv->disp_info.h_sync_width = fdtdec_get_int(blob, node, @@ -926,34 +934,97 @@ int exynos_dp_parse_dt(const void *blob, struct exynos_dp_priv *priv) return 0; }

-unsigned int exynos_init_dp(void) +static int exynos_dp_bridge_init(struct udevice *dev) { - unsigned int ret; - struct exynos_dp_priv *priv; - struct exynos_dp *regs; - int node; + const int max_tries = 10; + int num_tries; + int ret;

- priv = kzalloc(sizeof(struct exynos_dp_priv), GFP_KERNEL); - if (!priv) { - debug("failed to allocate edp device object.\n"); - return -EFAULT; + debug("%s\n", __func__); + ret = video_bridge_attach(dev); + if (ret) { + debug("video bridge init failed: %d\n", ret); + return ret; }

- if (exynos_dp_parse_dt(gd->fdt_blob, priv)) - debug("unable to parse DP DT node\n"); + /* + * We need to wait for 90ms after bringing up the bridge since there + * is a phantom "high" on the HPD chip during its bootup. The phantom + * high comes within 7ms of de-asserting PD and persists for at least + * 15ms. The real high comes roughly 50ms after PD is de-asserted. The + * phantom high makes it hard for us to know when the NXP chip is up. + */ + mdelay(90);

- node = fdtdec_next_compatible(gd->fdt_blob, 0, - COMPAT_SAMSUNG_EXYNOS5_DP); - if (node <= 0) - debug("exynos_dp: Can't get device node for dp\n"); + for (num_tries = 0; num_tries < max_tries; num_tries++) { + /* Check HPD. If it's high, or we don't have it, all is well */ + ret = video_bridge_check_attached(dev); + if (!ret || ret == -ENOENT) + return 0;

- regs = (struct exynos_dp *)fdtdec_get_addr(gd->fdt_blob, node, - "reg"); - if (regs == NULL) - debug("Can't get the DP base address\n"); + debug("%s: eDP bridge failed to come up; try %d of %d\n", + __func__, num_tries, max_tries); + } + + /* Immediately go into bridge reset if the hp line is not high */ + return -EIO; +} + +static int exynos_dp_bridge_setup(const void *blob) +{ + const int max_tries = 2; + int num_tries; + struct udevice *dev; + int ret; + + /* Configure I2C registers for Parade bridge */ + ret = uclass_get_device(UCLASS_VIDEO_BRIDGE, 0, &dev); + if (ret) { + debug("video bridge init failed: %d\n", ret); + return ret; + } + + if (strncmp(dev->driver->name, "parade", 6)) { + /* Mux HPHPD to the special hotplug detect mode */ + exynos_pinmux_config(PERIPH_ID_DPHPD, 0); + } + + for (num_tries = 0; num_tries < max_tries; num_tries++) { + ret = exynos_dp_bridge_init(dev); + if (!ret) + return 0; + if (num_tries == max_tries - 1) + break; + + /* + * If we're here, the bridge chip failed to initialise. + * Power down the bridge in an attempt to reset. + */ + video_bridge_set_active(dev, false); + + /* + * Arbitrarily wait 300ms here with DP_N low. Don't know for + * sure how long we should wait, but we're being paranoid. + */ + mdelay(300); + }

+ return ret; +} +int exynos_dp_enable(struct udevice *dev, int panel_bpp, + const struct display_timing *timing) +{ + struct exynos_dp_priv *priv = dev_get_priv(dev); + struct exynos_dp *regs = priv->regs; + unsigned int ret; + + debug("%s: start\n", __func__); exynos_dp_disp_info(&priv->disp_info);

+ ret = exynos_dp_bridge_setup(gd->fdt_blob); + if (ret && ret != -ENODEV) + printf("LCD bridge failed to enable: %d\n", ret); + exynos_dp_phy_ctrl(1);

ret = exynos_dp_init_dp(regs); @@ -992,3 +1063,22 @@ unsigned int exynos_init_dp(void)

return ret; } + + +static const struct dm_display_ops exynos_dp_ops = { + .enable = exynos_dp_enable, +}; + +static const struct udevice_id exynos_dp_ids[] = { + { .compatible = "samsung,exynos5-dp" }, + { } +}; + +U_BOOT_DRIVER(exynos_dp) = { + .name = "eexynos_dp", + .id = UCLASS_DISPLAY, + .of_match = exynos_dp_ids, + .ops = &exynos_dp_ops, + .ofdata_to_platdata = exynos_dp_ofdata_to_platdata, + .priv_auto_alloc_size = sizeof(struct exynos_dp_priv), +}; diff --git a/drivers/video/exynos/exynos_fb.c b/drivers/video/exynos/exynos_fb.c index 83b1187..c8fef63 100644 --- a/drivers/video/exynos/exynos_fb.c +++ b/drivers/video/exynos/exynos_fb.c @@ -9,33 +9,98 @@

#include <config.h> #include <common.h> +#include <display.h> #include <div64.h> -#include <lcd.h> +#include <dm.h> #include <fdtdec.h> #include <libfdt.h> +#include <panel.h> +#include <video.h> +#include <video_bridge.h> #include <asm/io.h> #include <asm/arch/cpu.h> #include <asm/arch/clock.h> #include <asm/arch/clk.h> #include <asm/arch/mipi_dsim.h> #include <asm/arch/dp_info.h> +#include <asm/arch/fb.h> +#include <asm/arch/pinmux.h> #include <asm/arch/system.h> #include <asm/gpio.h> #include <asm-generic/errno.h>

-#include "exynos_fb.h" - DECLARE_GLOBAL_DATA_PTR;

-struct vidinfo panel_info = { - /* - * Insert a value here so that we don't end up in the BSS - * Reference: drivers/video/tegra.c - */ - .vl_col = -1, +enum { + FIMD_RGB_INTERFACE = 1, + FIMD_CPU_INTERFACE = 2, +}; + +enum exynos_fb_rgb_mode_t { + MODE_RGB_P = 0, + MODE_BGR_P = 1, + MODE_RGB_S = 2, + MODE_BGR_S = 3, };

-static void exynos_fimd_set_dualrgb(struct vidinfo *priv, unsigned int enabled) +struct exynos_fb_priv { + ushort vl_col; /* Number of columns (i.e. 640) */ + ushort vl_row; /* Number of rows (i.e. 480) */ + ushort vl_rot; /* Rotation of Display (0, 1, 2, 3) */ + ushort vl_width; /* Width of display area in millimeters */ + ushort vl_height; /* Height of display area in millimeters */ + + /* LCD configuration register */ + u_char vl_freq; /* Frequency */ + u_char vl_clkp; /* Clock polarity */ + u_char vl_oep; /* Output Enable polarity */ + u_char vl_hsp; /* Horizontal Sync polarity */ + u_char vl_vsp; /* Vertical Sync polarity */ + u_char vl_dp; /* Data polarity */ + u_char vl_bpix; /* Bits per pixel */ + + /* Horizontal control register. Timing from data sheet */ + u_char vl_hspw; /* Horz sync pulse width */ + u_char vl_hfpd; /* Wait before of line */ + u_char vl_hbpd; /* Wait end of line */ + + /* Vertical control register. */ + u_char vl_vspw; /* Vertical sync pulse width */ + u_char vl_vfpd; /* Wait before of frame */ + u_char vl_vbpd; /* Wait end of frame */ + u_char vl_cmd_allow_len; /* Wait end of frame */ + + unsigned int win_id; + unsigned int init_delay; + unsigned int power_on_delay; + unsigned int reset_delay; + unsigned int interface_mode; + unsigned int mipi_enabled; + unsigned int dp_enabled; + unsigned int cs_setup; + unsigned int wr_setup; + unsigned int wr_act; + unsigned int wr_hold; + unsigned int logo_on; + unsigned int logo_width; + unsigned int logo_height; + int logo_x_offset; + int logo_y_offset; + unsigned long logo_addr; + unsigned int rgb_mode; + unsigned int resolution; + + /* parent clock name(MPLL, EPLL or VPLL) */ + unsigned int pclk_name; + /* ratio value for source clock from parent clock. */ + unsigned int sclk_div; + + unsigned int dual_lcd_enabled; + struct exynos_fb *reg; + struct exynos_platform_mipi_dsim *dsim_platform_data_dt; +}; + +static void exynos_fimd_set_dualrgb(struct exynos_fb_priv *priv, bool enabled) { struct exynos_fb *reg = priv->reg; unsigned int cfg = 0; @@ -52,7 +117,7 @@ static void exynos_fimd_set_dualrgb(struct vidinfo *priv, unsigned int enabled) writel(cfg, &reg->dualrgb); }

-static void exynos_fimd_set_dp_clkcon(struct vidinfo *priv, +static void exynos_fimd_set_dp_clkcon(struct exynos_fb_priv *priv, unsigned int enabled) { struct exynos_fb *reg = priv->reg; @@ -64,7 +129,8 @@ static void exynos_fimd_set_dp_clkcon(struct vidinfo *priv, writel(cfg, &reg->dp_mie_clkcon); }

-static void exynos_fimd_set_par(struct vidinfo *priv, unsigned int win_id) +static void exynos_fimd_set_par(struct exynos_fb_priv *priv, + unsigned int win_id) { struct exynos_fb *reg = priv->reg; unsigned int cfg = 0; @@ -117,7 +183,7 @@ static void exynos_fimd_set_par(struct vidinfo *priv, unsigned int win_id) EXYNOS_VIDOSD(win_id)); }

-static void exynos_fimd_set_buffer_address(struct vidinfo *priv, +static void exynos_fimd_set_buffer_address(struct exynos_fb_priv *priv, unsigned int win_id, ulong lcd_base_addr) { @@ -125,7 +191,7 @@ static void exynos_fimd_set_buffer_address(struct vidinfo *priv, unsigned long start_addr, end_addr;

start_addr = lcd_base_addr; - end_addr = start_addr + ((priv->vl_col * (NBITS(priv->vl_bpix) / 8)) * + end_addr = start_addr + ((priv->vl_col * (VNBITS(priv->vl_bpix) / 8)) * priv->vl_row);

writel(start_addr, (unsigned int)&reg->vidw00add0b0 + @@ -134,7 +200,7 @@ static void exynos_fimd_set_buffer_address(struct vidinfo *priv, EXYNOS_BUFFER_OFFSET(win_id)); }

-static void exynos_fimd_set_clock(struct vidinfo *priv) +static void exynos_fimd_set_clock(struct exynos_fb_priv *priv) { struct exynos_fb *reg = priv->reg; unsigned int cfg = 0, div = 0, remainder, remainder_div; @@ -188,7 +254,7 @@ static void exynos_fimd_set_clock(struct vidinfo *priv) writel(cfg, &reg->vidcon0); }

-void exynos_set_trigger(struct vidinfo *priv) +void exynos_set_trigger(struct exynos_fb_priv *priv) { struct exynos_fb *reg = priv->reg; unsigned int cfg = 0; @@ -200,7 +266,7 @@ void exynos_set_trigger(struct vidinfo *priv) writel(cfg, &reg->trigcon); }

-int exynos_is_i80_frame_done(struct vidinfo *priv) +int exynos_is_i80_frame_done(struct exynos_fb_priv *priv) { struct exynos_fb *reg = priv->reg; unsigned int cfg = 0; @@ -215,7 +281,7 @@ int exynos_is_i80_frame_done(struct vidinfo *priv) return status; }

-static void exynos_fimd_lcd_on(struct vidinfo *priv) +static void exynos_fimd_lcd_on(struct exynos_fb_priv *priv) { struct exynos_fb *reg = priv->reg; unsigned int cfg = 0; @@ -226,7 +292,8 @@ static void exynos_fimd_lcd_on(struct vidinfo *priv) writel(cfg, &reg->vidcon0); }

-static void exynos_fimd_window_on(struct vidinfo *priv, unsigned int win_id) +static void exynos_fimd_window_on(struct exynos_fb_priv *priv, + unsigned int win_id) { struct exynos_fb *reg = priv->reg; unsigned int cfg = 0; @@ -243,7 +310,7 @@ static void exynos_fimd_window_on(struct vidinfo *priv, unsigned int win_id) writel(cfg, &reg->winshmap); }

-void exynos_fimd_lcd_off(struct vidinfo *priv) +void exynos_fimd_lcd_off(struct exynos_fb_priv *priv) { struct exynos_fb *reg = priv->reg; unsigned int cfg = 0; @@ -253,7 +320,7 @@ void exynos_fimd_lcd_off(struct vidinfo *priv) writel(cfg, &reg->vidcon0); }

-void exynos_fimd_window_off(struct vidinfo *priv, unsigned int win_id) +void exynos_fimd_window_off(struct exynos_fb_priv *priv, unsigned int win_id) { struct exynos_fb *reg = priv->reg; unsigned int cfg = 0; @@ -307,24 +374,16 @@ void exynos_fimd_disable_sysmmu(void) } }

-void exynos_fimd_lcd_init(struct vidinfo *priv, ulong lcd_base_address) +void exynos_fimd_lcd_init(struct udevice *dev) { - struct exynos_fb *reg; + struct exynos_fb_priv *priv = dev_get_priv(dev); + struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); + struct exynos_fb *reg = priv->reg; unsigned int cfg = 0, rgb_mode; unsigned int offset; unsigned int node;

- node = fdtdec_next_compatible(gd->fdt_blob, - 0, COMPAT_SAMSUNG_EXYNOS_FIMD); - if (node <= 0) - debug("exynos_fb: Can't get device node for fimd\n"); - - reg = (struct exynos_fb *)fdtdec_get_addr(gd->fdt_blob, node, - "reg"); - if (reg == NULL) - debug("Can't get the FIMD base address\n"); - priv->reg = reg; - + node = dev->of_offset; if (fdtdec_get_bool(gd->fdt_blob, node, "samsung,disable-sysmmu")) exynos_fimd_disable_sysmmu();

@@ -387,13 +446,13 @@ void exynos_fimd_lcd_init(struct vidinfo *priv, ulong lcd_base_address) exynos_fimd_set_par(priv, priv->win_id);

/* set memory address */ - exynos_fimd_set_buffer_address(priv, priv->win_id, lcd_base_address); + exynos_fimd_set_buffer_address(priv, priv->win_id, plat->base);

/* set buffer size */ cfg = EXYNOS_VIDADDR_PAGEWIDTH(priv->vl_col * - NBITS(priv->vl_bpix) / 8) | + VNBITS(priv->vl_bpix) / 8) | EXYNOS_VIDADDR_PAGEWIDTH_E(priv->vl_col * - NBITS(priv->vl_bpix) / 8) | + VNBITS(priv->vl_bpix) / 8) | EXYNOS_VIDADDR_OFFSIZE(0) | EXYNOS_VIDADDR_OFFSIZE_E(0);

@@ -415,26 +474,9 @@ void exynos_fimd_lcd_init(struct vidinfo *priv, ulong lcd_base_address) exynos_fimd_set_dp_clkcon(priv, priv->dp_enabled); }

-unsigned long exynos_fimd_calc_fbsize(struct vidinfo *priv) -{ - return priv->vl_col * priv->vl_row * (NBITS(priv->vl_bpix) / 8); -} - -ushort *configuration_get_cmap(void) -{ -#if defined(CONFIG_LCD_LOGO) - return bmp_logo_palette; -#else - return NULL; -#endif -} - -static void exynos_lcd_init(struct vidinfo *vid, ulong lcd_base) +unsigned long exynos_fimd_calc_fbsize(struct exynos_fb_priv *priv) { - exynos_fimd_lcd_init(vid, lcd_base); - - /* Enable flushing after LCD writes if requested */ - lcd_set_flush_dcache(1); + return priv->vl_col * priv->vl_row * (VNBITS(priv->vl_bpix) / 8); }

__weak void exynos_cfg_lcd_gpio(void) @@ -470,217 +512,242 @@ __weak int exynos_lcd_misc_init(struct vidinfo *vid) return 0; }

-static void lcd_panel_on(struct vidinfo *vid) +int exynos_fb_ofdata_to_platdata(struct udevice *dev) { - struct gpio_desc pwm_out_gpio; - struct gpio_desc bl_en_gpio; - unsigned int node; - - udelay(vid->init_delay); - - exynos_backlight_reset(); - - exynos_cfg_lcd_gpio(); - - exynos_lcd_power_on(); - - udelay(vid->power_on_delay); - - if (vid->dp_enabled) - exynos_init_dp(); - - exynos_reset_lcd(); - - udelay(vid->reset_delay); - - exynos_backlight_on(1); - - node = fdtdec_next_compatible(gd->fdt_blob, 0, - COMPAT_SAMSUNG_EXYNOS_FIMD); - if (node <= 0) { - debug("FIMD: Can't get device node for FIMD\n"); - return; - } - gpio_request_by_name_nodev(gd->fdt_blob, node, "samsung,pwm-out-gpio", - 0, &pwm_out_gpio, - GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE); - - gpio_request_by_name_nodev(gd->fdt_blob, node, "samsung,bl-en-gpio", 0, - &bl_en_gpio, - GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE); - - exynos_cfg_ldo(); + struct exynos_fb_priv *priv = dev_get_priv(dev); + unsigned int node = dev->of_offset; + const void *blob = gd->fdt_blob; + fdt_addr_t addr;

- exynos_enable_ldo(1); - - if (vid->mipi_enabled) - exynos_mipi_dsi_init(panel_info.dsim_platform_data_dt); -} - -int exynos_lcd_early_init(const void *blob) -{ - unsigned int node; - node = fdtdec_next_compatible(blob, 0, COMPAT_SAMSUNG_EXYNOS_FIMD); - if (node <= 0) { - debug("exynos_fb: Can't get device node for fimd\n"); - return -ENODEV; + addr = dev_get_addr(dev); + if (addr == FDT_ADDR_T_NONE) { + debug("Can't get the FIMD base address\n"); + return -EINVAL; } + priv->reg = (struct exynos_fb *)addr;

- panel_info.vl_col = fdtdec_get_int(blob, node, "samsung,vl-col", 0); - if (panel_info.vl_col == 0) { + priv->vl_col = fdtdec_get_int(blob, node, "samsung,vl-col", 0); + if (priv->vl_col == 0) { debug("Can't get XRES\n"); return -ENXIO; }

- panel_info.vl_row = fdtdec_get_int(blob, node, "samsung,vl-row", 0); - if (panel_info.vl_row == 0) { + priv->vl_row = fdtdec_get_int(blob, node, "samsung,vl-row", 0); + if (priv->vl_row == 0) { debug("Can't get YRES\n"); return -ENXIO; }

- panel_info.vl_width = fdtdec_get_int(blob, node, + priv->vl_width = fdtdec_get_int(blob, node, "samsung,vl-width", 0);

- panel_info.vl_height = fdtdec_get_int(blob, node, + priv->vl_height = fdtdec_get_int(blob, node, "samsung,vl-height", 0);

- panel_info.vl_freq = fdtdec_get_int(blob, node, "samsung,vl-freq", 0); - if (panel_info.vl_freq == 0) { + priv->vl_freq = fdtdec_get_int(blob, node, "samsung,vl-freq", 0); + if (priv->vl_freq == 0) { debug("Can't get refresh rate\n"); return -ENXIO; }

if (fdtdec_get_bool(blob, node, "samsung,vl-clkp")) - panel_info.vl_clkp = CONFIG_SYS_LOW; + priv->vl_clkp = VIDEO_ACTIVE_LOW;

if (fdtdec_get_bool(blob, node, "samsung,vl-oep")) - panel_info.vl_oep = CONFIG_SYS_LOW; + priv->vl_oep = VIDEO_ACTIVE_LOW;

if (fdtdec_get_bool(blob, node, "samsung,vl-hsp")) - panel_info.vl_hsp = CONFIG_SYS_LOW; + priv->vl_hsp = VIDEO_ACTIVE_LOW;

if (fdtdec_get_bool(blob, node, "samsung,vl-vsp")) - panel_info.vl_vsp = CONFIG_SYS_LOW; + priv->vl_vsp = VIDEO_ACTIVE_LOW;

if (fdtdec_get_bool(blob, node, "samsung,vl-dp")) - panel_info.vl_dp = CONFIG_SYS_LOW; + priv->vl_dp = VIDEO_ACTIVE_LOW;

- panel_info.vl_bpix = fdtdec_get_int(blob, node, "samsung,vl-bpix", 0); - if (panel_info.vl_bpix == 0) { + priv->vl_bpix = fdtdec_get_int(blob, node, "samsung,vl-bpix", 0); + if (priv->vl_bpix == 0) { debug("Can't get bits per pixel\n"); return -ENXIO; }

- panel_info.vl_hspw = fdtdec_get_int(blob, node, "samsung,vl-hspw", 0); - if (panel_info.vl_hspw == 0) { + priv->vl_hspw = fdtdec_get_int(blob, node, "samsung,vl-hspw", 0); + if (priv->vl_hspw == 0) { debug("Can't get hsync width\n"); return -ENXIO; }

- panel_info.vl_hfpd = fdtdec_get_int(blob, node, "samsung,vl-hfpd", 0); - if (panel_info.vl_hfpd == 0) { + priv->vl_hfpd = fdtdec_get_int(blob, node, "samsung,vl-hfpd", 0); + if (priv->vl_hfpd == 0) { debug("Can't get right margin\n"); return -ENXIO; }

- panel_info.vl_hbpd = (u_char)fdtdec_get_int(blob, node, + priv->vl_hbpd = (u_char)fdtdec_get_int(blob, node, "samsung,vl-hbpd", 0); - if (panel_info.vl_hbpd == 0) { + if (priv->vl_hbpd == 0) { debug("Can't get left margin\n"); return -ENXIO; }

- panel_info.vl_vspw = (u_char)fdtdec_get_int(blob, node, + priv->vl_vspw = (u_char)fdtdec_get_int(blob, node, "samsung,vl-vspw", 0); - if (panel_info.vl_vspw == 0) { + if (priv->vl_vspw == 0) { debug("Can't get vsync width\n"); return -ENXIO; }

- panel_info.vl_vfpd = fdtdec_get_int(blob, node, + priv->vl_vfpd = fdtdec_get_int(blob, node, "samsung,vl-vfpd", 0); - if (panel_info.vl_vfpd == 0) { + if (priv->vl_vfpd == 0) { debug("Can't get lower margin\n"); return -ENXIO; }

- panel_info.vl_vbpd = fdtdec_get_int(blob, node, "samsung,vl-vbpd", 0); - if (panel_info.vl_vbpd == 0) { + priv->vl_vbpd = fdtdec_get_int(blob, node, "samsung,vl-vbpd", 0); + if (priv->vl_vbpd == 0) { debug("Can't get upper margin\n"); return -ENXIO; }

- panel_info.vl_cmd_allow_len = fdtdec_get_int(blob, node, + priv->vl_cmd_allow_len = fdtdec_get_int(blob, node, "samsung,vl-cmd-allow-len", 0);

- panel_info.win_id = fdtdec_get_int(blob, node, "samsung,winid", 0); - panel_info.init_delay = fdtdec_get_int(blob, node, + priv->win_id = fdtdec_get_int(blob, node, "samsung,winid", 0); + priv->init_delay = fdtdec_get_int(blob, node, "samsung,init-delay", 0); - panel_info.power_on_delay = fdtdec_get_int(blob, node, + priv->power_on_delay = fdtdec_get_int(blob, node, "samsung,power-on-delay", 0); - panel_info.reset_delay = fdtdec_get_int(blob, node, + priv->reset_delay = fdtdec_get_int(blob, node, "samsung,reset-delay", 0); - panel_info.interface_mode = fdtdec_get_int(blob, node, + priv->interface_mode = fdtdec_get_int(blob, node, "samsung,interface-mode", 0); - panel_info.mipi_enabled = fdtdec_get_int(blob, node, + priv->mipi_enabled = fdtdec_get_int(blob, node, "samsung,mipi-enabled", 0); - panel_info.dp_enabled = fdtdec_get_int(blob, node, + priv->dp_enabled = fdtdec_get_int(blob, node, "samsung,dp-enabled", 0); - panel_info.cs_setup = fdtdec_get_int(blob, node, + priv->cs_setup = fdtdec_get_int(blob, node, "samsung,cs-setup", 0); - panel_info.wr_setup = fdtdec_get_int(blob, node, + priv->wr_setup = fdtdec_get_int(blob, node, "samsung,wr-setup", 0); - panel_info.wr_act = fdtdec_get_int(blob, node, "samsung,wr-act", 0); - panel_info.wr_hold = fdtdec_get_int(blob, node, "samsung,wr-hold", 0); + priv->wr_act = fdtdec_get_int(blob, node, "samsung,wr-act", 0); + priv->wr_hold = fdtdec_get_int(blob, node, "samsung,wr-hold", 0);

- panel_info.logo_on = fdtdec_get_int(blob, node, "samsung,logo-on", 0); - if (panel_info.logo_on) { - panel_info.logo_width = fdtdec_get_int(blob, node, + priv->logo_on = fdtdec_get_int(blob, node, "samsung,logo-on", 0); + if (priv->logo_on) { + priv->logo_width = fdtdec_get_int(blob, node, "samsung,logo-width", 0); - panel_info.logo_height = fdtdec_get_int(blob, node, + priv->logo_height = fdtdec_get_int(blob, node, "samsung,logo-height", 0); - panel_info.logo_addr = fdtdec_get_int(blob, node, + priv->logo_addr = fdtdec_get_int(blob, node, "samsung,logo-addr", 0); }

- panel_info.rgb_mode = fdtdec_get_int(blob, node, + priv->rgb_mode = fdtdec_get_int(blob, node, "samsung,rgb-mode", 0); - panel_info.pclk_name = fdtdec_get_int(blob, node, + priv->pclk_name = fdtdec_get_int(blob, node, "samsung,pclk-name", 0); - panel_info.sclk_div = fdtdec_get_int(blob, node, + priv->sclk_div = fdtdec_get_int(blob, node, "samsung,sclk-div", 0); - panel_info.dual_lcd_enabled = fdtdec_get_int(blob, node, + priv->dual_lcd_enabled = fdtdec_get_int(blob, node, "samsung,dual-lcd-enabled", 0);

return 0; }

-void lcd_ctrl_init(void *lcdbase) +static int exynos_fb_probe(struct udevice *dev) { + struct video_priv *uc_priv = dev_get_uclass_priv(dev); + struct exynos_fb_priv *priv = dev_get_priv(dev); + struct udevice *panel, *bridge; + struct udevice *dp; + int ret; + + debug("%s: start\n", __func__); set_system_display_ctrl(); set_lcd_clk();

#ifdef CONFIG_EXYNOS_MIPI_DSIM exynos_init_dsim_platform_data(&panel_info); #endif - exynos_lcd_misc_init(&panel_info); + exynos_fimd_lcd_init(dev);

- exynos_lcd_init(&panel_info, (ulong)lcdbase); -} + ret = uclass_first_device(UCLASS_PANEL, &panel); + if (ret) { + printf("LCD panel failed to probe\n"); + return ret; + } + if (!panel) { + printf("LCD panel not found\n"); + return -ENODEV; + }

-void lcd_enable(void) -{ - if (panel_info.logo_on) { - memset((void *)gd->fb_base, 0, - panel_info.vl_width * panel_info.vl_height * - (NBITS(panel_info.vl_bpix) >> 3)); + ret = uclass_first_device(UCLASS_DISPLAY, &dp); + if (ret) { + debug("%s: Display device error %d\n", __func__, ret); + return ret; + } + if (!dev) { + debug("%s: Display device missing\n", __func__); + return -ENODEV; + } + ret = display_enable(dp, 18, NULL); + if (ret) { + debug("%s: Display enable error %d\n", __func__, ret); + return ret; }

- lcd_panel_on(&panel_info); + /* backlight / pwm */ + ret = panel_enable_backlight(panel); + if (ret) { + debug("%s: backlight error: %d\n", __func__, ret); + return ret; + } + + ret = uclass_get_device(UCLASS_VIDEO_BRIDGE, 0, &bridge); + if (!ret) + ret = video_bridge_set_backlight(bridge, 80); + if (ret) { + debug("%s: No video bridge, or no backlight on bridge\n", + __func__); + exynos_pinmux_config(PERIPH_ID_PWM0, 0); + } + + uc_priv->xsize = priv->vl_col; + uc_priv->ysize = priv->vl_row; + uc_priv->bpix = priv->vl_bpix; + + /* Enable flushing after LCD writes if requested */ + video_set_flush_dcache(dev, true); + + return 0; }

-/* dummy function */ -void lcd_setcolreg(ushort regno, ushort red, ushort green, ushort blue) +static int exynos_fb_bind(struct udevice *dev) { - return; + struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); + + /* This is the maximum panel size we expect to see */ + plat->size = 1920 * 1080 * 2; + + return 0; } + +static const struct video_ops exynos_fb_ops = { +}; + +static const struct udevice_id exynos_fb_ids[] = { + { .compatible = "samsung,exynos-fimd" }, + { } +}; + +U_BOOT_DRIVER(exynos_fb) = { + .name = "exynos_fb", + .id = UCLASS_VIDEO, + .of_match = exynos_fb_ids, + .ops = &exynos_fb_ops, + .bind = exynos_fb_bind, + .probe = exynos_fb_probe, + .ofdata_to_platdata = exynos_fb_ofdata_to_platdata, + .priv_auto_alloc_size = sizeof(struct exynos_fb_priv), +}; diff --git a/drivers/video/simple_panel.c b/drivers/video/simple_panel.c index c73f242..f57cd71 100644 --- a/drivers/video/simple_panel.c +++ b/drivers/video/simple_panel.c @@ -86,6 +86,8 @@ static const struct panel_ops simple_panel_ops = { static const struct udevice_id simple_panel_ids[] = { { .compatible = "simple-panel" }, { .compatible = "auo,b133xtn01" }, + { .compatible = "auo,b116xw03" }, + { .compatible = "auo,b133htn01" }, { } };

diff --git a/include/configs/exynos5-dt-common.h b/include/configs/exynos5-dt-common.h index 8b61a52..3d81f94 100644 --- a/include/configs/exynos5-dt-common.h +++ b/include/configs/exynos5-dt-common.h @@ -13,8 +13,8 @@ #undef EXYNOS_DEVICE_SETTINGS #define EXYNOS_DEVICE_SETTINGS \ "stdin=serial,cros-ec-keyb\0" \ - "stdout=serial,lcd\0" \ - "stderr=serial,lcd\0" + "stdout=serial,vidconsole\0" \ + "stderr=serial,vidconsole\0"

#define CONFIG_EXYNOS5_DT

@@ -32,6 +32,7 @@ #define CONFIG_EXYNOS_FB #define CONFIG_EXYNOS_DP #define LCD_BPP LCD_COLOR16 +#define CONFIG_SYS_WHITE_ON_BLACK #endif

/* Enable keyboard */