[PATCH 0/2] arm: kirkwood: Dockstar: Convert the board Ethernet to Driver Model.
- Enable DM Ethernet. - Turn on CONFIG_SYS_THUMB_BUILD to keep u-boot image size within 512K (ENV_OFFSET is at 512K in NAND). - Use Ethernet PHY names from device tree. And also look up Ethernet PHY addr from device tree. - This patch series depends on http://patchwork.ozlabs.org/project/uboot/patch/20210806044910.23500-2-mibod...
Tony Dinh (2): arm: kirkwood: Dockstar: Add DM Ethernet arm: kirkwood: Dockstar: Use Ethernet PHY name and address from device tree
board/Seagate/dockstar/dockstar.c | 25 +++++++++++++------------ configs/dockstar_defconfig | 3 +++ 2 files changed, 16 insertions(+), 12 deletions(-)
- Add DM_ETH and associated configs - Add SYS_THUMB_BUILD to keep u-boot image size within 512K (ENV_OFFSET is at 512K in NAND).
Signed-off-by: Tony Dinh mibodhi@gmail.com ---
configs/dockstar_defconfig | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/configs/dockstar_defconfig b/configs/dockstar_defconfig index 8d43609cd1..eca35d7e41 100644 --- a/configs/dockstar_defconfig +++ b/configs/dockstar_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y +CONFIG_SYS_THUMB_BUILD=y CONFIG_ARCH_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 @@ -42,3 +43,5 @@ CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y +CONFIG_DM_ETH=y +CONFIG_NET_RANDOM_ETHADDR=y
In DM Ethernet, the old "egiga0" name is no longer valid, so replace with Ethernet PHY name from device tree. Also, read Ethernet PHY address from device tree.
Signed-off-by: Tony Dinh mibodhi@gmail.com ---
board/Seagate/dockstar/dockstar.c | 25 +++++++++++++------------ 1 file changed, 13 insertions(+), 12 deletions(-)
diff --git a/board/Seagate/dockstar/dockstar.c b/board/Seagate/dockstar/dockstar.c index fb69193158..e853f942cf 100644 --- a/board/Seagate/dockstar/dockstar.c +++ b/board/Seagate/dockstar/dockstar.c @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* + * Copyright (C) 2021 Tony Dinh mibodhi@gmail.com * Copyright (C) 2010 Eric C. Cooper ecc@cmu.edu * * Based on sheevaplug.c originally written by @@ -19,6 +20,7 @@ #include <asm/global_data.h> #include <asm/io.h> #include <asm/mach-types.h> +#include <fdt_support_net.h> #include "dockstar.h"
DECLARE_GLOBAL_DATA_PTR; @@ -110,31 +112,30 @@ int board_init(void) void reset_phy(void) { u16 reg; - u16 devadr; - char *name = "egiga0"; + int phyaddr; + char *name = "ethernet-controller@72000"; + char *eth0_path = "/ocp@f1000000/ethernet-controller@72000/ethernet0-port@0";
if (miiphy_set_current_dev(name)) return;
- /* command to read PHY dev address */ - if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) { - printf("Err..%s could not read PHY dev address\n", - __FUNCTION__); + /* Look up PHY addr */ + phyaddr = fdt_get_phy_addr(eth0_path); + if (phyaddr < 0) return; - }
/* * Enable RGMII delay on Tx and Rx for CPU port * Ref: sec 4.7.2 of chip datasheet */ - miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2); - miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, ®); + miiphy_write(name, phyaddr, MV88E1116_PGADR_REG, 2); + miiphy_read(name, phyaddr, MV88E1116_MAC_CTRL_REG, ®); reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL); - miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg); - miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0); + miiphy_write(name, phyaddr, MV88E1116_MAC_CTRL_REG, reg); + miiphy_write(name, phyaddr, MV88E1116_PGADR_REG, 0);
/* reset the phy */ - miiphy_reset(name, devadr); + miiphy_reset(name, phyaddr);
printf("88E1116 Initialized on %s\n", name); }
participants (1)
-
Tony Dinh