[PATCH] spi: cadence_spi: Add octal and quad write support
In Commit d64077202158 ("spi: cadence_qspi: Move to spi-mem framework") it removes setting to quad write bit by accident. This commit restores it back and also adding checking for octal support.
Fixes: d64077202158 ("spi: cadence_qspi: Move to spi-mem framework")
Signed-off-by: Ley Foon Tan ley.foon.tan@intel.com --- drivers/spi/cadence_qspi_apb.c | 6 ++++++ 1 file changed, 6 insertions(+)
diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c index f9675f75a401..aaf5f600c6dc 100644 --- a/drivers/spi/cadence_qspi_apb.c +++ b/drivers/spi/cadence_qspi_apb.c @@ -689,6 +689,12 @@ int cadence_qspi_apb_write_setup(struct cadence_spi_platdata *plat,
/* Configure the opcode */ reg = op->cmd.opcode << CQSPI_REG_WR_INSTR_OPCODE_LSB; + + if (op->data.buswidth == 8) + reg |= CQSPI_INST_TYPE_OCTAL << CQSPI_REG_WR_INSTR_TYPE_DATA_LSB; + else if (op->data.buswidth == 4) + reg |= CQSPI_INST_TYPE_QUAD << CQSPI_REG_WR_INSTR_TYPE_DATA_LSB; + writel(reg, plat->regbase + CQSPI_REG_WR_INSTR);
writel(op->addr.val, plat->regbase + CQSPI_REG_INDIRECTWRSTARTADDR);
Hi Ley,
On 22/05/20 03:53PM, Ley Foon Tan wrote:
In Commit d64077202158 ("spi: cadence_qspi: Move to spi-mem framework") it removes setting to quad write bit by accident. This commit restores it back and also adding checking for octal support.
Fixes: d64077202158 ("spi: cadence_qspi: Move to spi-mem framework")
I sent a patch to add Octal DTR support for this controller [0]. It should also fix this problem (check cadence_qspi_set_protocol()).
[0] https://patchwork.ozlabs.org/project/uboot/patch/20200522124509.6901-5-p.yad...
-----Original Message----- From: Pratyush Yadav p.yadav@ti.com Sent: Wednesday, May 27, 2020 9:07 PM To: Tan, Ley Foon ley.foon.tan@intel.com Cc: u-boot@lists.denx.de; Jagan Teki jagan@amarulasolutions.com; Ley Foon Tan lftan.linux@gmail.com; Vignesh Raghavendra vigneshr@ti.com; See, Chin Liang chin.liang.see@intel.com; Simon Goldschmidt simon.k.r.goldschmidt@gmail.com; Ang, Chee Hong chee.hong.ang@intel.com Subject: Re: [PATCH] spi: cadence_spi: Add octal and quad write support
Hi Ley,
On 22/05/20 03:53PM, Ley Foon Tan wrote:
In Commit d64077202158 ("spi: cadence_qspi: Move to spi-mem framework") it removes setting to quad write bit by accident. This commit restores it back and also adding checking for octal support.
Fixes: d64077202158 ("spi: cadence_qspi: Move to spi-mem framework")
I sent a patch to add Octal DTR support for this controller [0]. It should also fix this problem (check cadence_qspi_set_protocol()).
[0] https://patchwork.ozlabs.org/project/uboot/patch/20200522124509.6901- 5-p.yadav@ti.com/
Hi
I have tried your patches with uboot/master, but it has compilation error below.
drivers/built-in.o: In function `spi_flash_std_remove': drivers/mtd/spi/sf_probe.c:160: undefined reference to `spi_nor_remove' drivers/mtd/spi/sf_probe.c:160:(.text.spi_flash_std_remove+0x10): relocation truncated to fit: R_AARCH64_JUMP26 against undefined symbol `spi_nor_remove' drivers/built-in.o:(.rodata.spi_nor_ids+0x258): undefined reference to `mt35xu512aba_fixups' drivers/built-in.o:(.rodata.spi_nor_ids+0x578): undefined reference to `s28hs512t_fixups'
Regards Ley Foon
On 28/05/20 06:54AM, Tan, Ley Foon wrote:
-----Original Message----- From: Pratyush Yadav p.yadav@ti.com Sent: Wednesday, May 27, 2020 9:07 PM To: Tan, Ley Foon ley.foon.tan@intel.com Cc: u-boot@lists.denx.de; Jagan Teki jagan@amarulasolutions.com; Ley Foon Tan lftan.linux@gmail.com; Vignesh Raghavendra vigneshr@ti.com; See, Chin Liang chin.liang.see@intel.com; Simon Goldschmidt simon.k.r.goldschmidt@gmail.com; Ang, Chee Hong chee.hong.ang@intel.com Subject: Re: [PATCH] spi: cadence_spi: Add octal and quad write support
Hi Ley,
On 22/05/20 03:53PM, Ley Foon Tan wrote:
In Commit d64077202158 ("spi: cadence_qspi: Move to spi-mem framework") it removes setting to quad write bit by accident. This commit restores it back and also adding checking for octal support.
Fixes: d64077202158 ("spi: cadence_qspi: Move to spi-mem framework")
I sent a patch to add Octal DTR support for this controller [0]. It should also fix this problem (check cadence_qspi_set_protocol()).
[0] https://patchwork.ozlabs.org/project/uboot/patch/20200522124509.6901- 5-p.yadav@ti.com/
Hi
I have tried your patches with uboot/master, but it has compilation error below.
drivers/built-in.o: In function `spi_flash_std_remove': drivers/mtd/spi/sf_probe.c:160: undefined reference to `spi_nor_remove' drivers/mtd/spi/sf_probe.c:160:(.text.spi_flash_std_remove+0x10): relocation truncated to fit: R_AARCH64_JUMP26 against undefined symbol `spi_nor_remove'
Curious. spi_nor_remove() is not inside an #ifdef, so I wonder why it would be an undefined reference.
drivers/built-in.o:(.rodata.spi_nor_ids+0x258): undefined reference to `mt35xu512aba_fixups' drivers/built-in.o:(.rodata.spi_nor_ids+0x578): undefined reference to `s28hs512t_fixups'
Both these fixups are wrapped in #ifdefs, but I don't see any mis-match anywhere. If say CONFIG_SPI_FLASH_STMICRO is enabled, mt35xu512aba_fixups should be defined.
I suspect spi-nor-core.c is not being built. Are you using spi-nor-tiny instead of spi-nor-core (CONFIG_SPL_SPI_FLASH_TINY)?
-----Original Message----- From: Pratyush Yadav p.yadav@ti.com Sent: Thursday, May 28, 2020 5:17 PM To: Tan, Ley Foon ley.foon.tan@intel.com Cc: u-boot@lists.denx.de; Jagan Teki jagan@amarulasolutions.com; Ley Foon Tan lftan.linux@gmail.com; Vignesh Raghavendra vigneshr@ti.com; See, Chin Liang chin.liang.see@intel.com; Simon Goldschmidt simon.k.r.goldschmidt@gmail.com; Ang, Chee Hong chee.hong.ang@intel.com Subject: Re: [PATCH] spi: cadence_spi: Add octal and quad write support
On 28/05/20 06:54AM, Tan, Ley Foon wrote:
-----Original Message----- From: Pratyush Yadav p.yadav@ti.com Sent: Wednesday, May 27, 2020 9:07 PM To: Tan, Ley Foon ley.foon.tan@intel.com Cc: u-boot@lists.denx.de; Jagan Teki jagan@amarulasolutions.com; Ley Foon Tan lftan.linux@gmail.com; Vignesh Raghavendra vigneshr@ti.com; See, Chin Liang chin.liang.see@intel.com; Simon Goldschmidt simon.k.r.goldschmidt@gmail.com; Ang, Chee Hong chee.hong.ang@intel.com Subject: Re: [PATCH] spi: cadence_spi: Add octal and quad write support
Hi Ley,
On 22/05/20 03:53PM, Ley Foon Tan wrote:
In Commit d64077202158 ("spi: cadence_qspi: Move to spi-mem framework") it removes setting to quad write bit by accident. This commit restores it back and also adding checking for octal support.
Fixes: d64077202158 ("spi: cadence_qspi: Move to spi-mem framework")
I sent a patch to add Octal DTR support for this controller [0]. It should also fix this problem (check cadence_qspi_set_protocol()).
[0]
https://patchwork.ozlabs.org/project/uboot/patch/20200522124509.6901
5-p.yadav@ti.com/
Hi
I have tried your patches with uboot/master, but it has compilation error
below.
drivers/built-in.o: In function `spi_flash_std_remove': drivers/mtd/spi/sf_probe.c:160: undefined reference to `spi_nor_remove' drivers/mtd/spi/sf_probe.c:160:(.text.spi_flash_std_remove+0x10):
relocation truncated to fit: R_AARCH64_JUMP26 against undefined symbol `spi_nor_remove'
Curious. spi_nor_remove() is not inside an #ifdef, so I wonder why it would be an undefined reference.
drivers/built-in.o:(.rodata.spi_nor_ids+0x258): undefined reference to
`mt35xu512aba_fixups'
drivers/built-in.o:(.rodata.spi_nor_ids+0x578): undefined reference to
`s28hs512t_fixups'
Both these fixups are wrapped in #ifdefs, but I don't see any mis-match anywhere. If say CONFIG_SPI_FLASH_STMICRO is enabled, mt35xu512aba_fixups should be defined.
I suspect spi-nor-core.c is not being built. Are you using spi-nor-tiny instead of spi-nor-core (CONFIG_SPL_SPI_FLASH_TINY)?
Yes, CONFIG_SPL_SPI_FLASH_TINY is enabled. You might want to try compile with CONFIG_SPL_SPI_FLASH_TINY enabled.
Regards Ley Foon
participants (3)
-
Ley Foon Tan -
Pratyush Yadav -
Tan, Ley Foon