[U-Boot] [PATCH 1/5] mmc: sh_sdhi: Fix Kconfig entry
The Kconfig entry depends on RMOBILE, but this was renamed to ARCH_RMOBILE in commit 1cc95f6e1b38 (ARM: Rmobile: Rename CONFIG_RMOBILE to CONFIG_ARCH_RMOBILE) . Fix this omission.
Signed-off-by: Marek Vasut marek.vasut+renesas@gmail.com Cc: Hiroyuki Yokoyama hiroyuki.yokoyama.vx@renesas.com Cc: Nobuhiro Iwamatsu iwamatsu@nigauri.org Cc: Jaehoon Chung jh80.chung@samsung.com --- drivers/mmc/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index 6ac26dd137..b2d70a37bd 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -159,7 +159,7 @@ config MMC_OMAP36XX_PINS
config SH_SDHI bool "SuperH/Renesas ARM SoCs on-chip SDHI host controller support" - depends on RMOBILE + depends on ARCH_RMOBILE help Support for the on-chip SDHI host controller on SuperH/Renesas ARM SoCs platform
From: Kouei Abe kouei.abe.cp@renesas.com
When setting interrupt mask after command starting, an unintended interrupt status sometimes occurs.
Signed-off-by: Kouei Abe kouei.abe.cp@renesas.com Signed-off-by: Hiroyuki Yokoyama hiroyuki.yokoyama.vx@renesas.com Cc: Hiroyuki Yokoyama hiroyuki.yokoyama.vx@renesas.com Cc: Nobuhiro Iwamatsu iwamatsu@nigauri.org Cc: Jaehoon Chung jh80.chung@samsung.com --- drivers/mmc/sh_sdhi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/sh_sdhi.c b/drivers/mmc/sh_sdhi.c index 25224e2e1d..7f0b4c2603 100644 --- a/drivers/mmc/sh_sdhi.c +++ b/drivers/mmc/sh_sdhi.c @@ -546,8 +546,6 @@ static int sh_sdhi_start_cmd(struct sh_sdhi_host *host, break; }
- sh_sdhi_writew(host, SDHI_CMD, (unsigned short)(opc & CMD_MASK)); - host->wait_int = 0; sh_sdhi_writew(host, SDHI_INFO1_MASK, ~INFO1M_RESP_END & sh_sdhi_readw(host, SDHI_INFO1_MASK)); @@ -557,6 +555,8 @@ static int sh_sdhi_start_cmd(struct sh_sdhi_host *host, INFO2M_RESP_TIMEOUT | INFO2M_ILA) & sh_sdhi_readw(host, SDHI_INFO2_MASK));
+ sh_sdhi_writew(host, SDHI_CMD, (unsigned short)(opc & CMD_MASK)); + time = sh_sdhi_wait_interrupt_flag(host); if (!time) return sh_sdhi_error_manage(host);
Hi,
2017-05-13 22:51 GMT+09:00 Marek Vasut marek.vasut@gmail.com:
From: Kouei Abe kouei.abe.cp@renesas.com
When setting interrupt mask after command starting, an unintended interrupt status sometimes occurs.
Signed-off-by: Kouei Abe kouei.abe.cp@renesas.com Signed-off-by: Hiroyuki Yokoyama hiroyuki.yokoyama.vx@renesas.com Cc: Hiroyuki Yokoyama hiroyuki.yokoyama.vx@renesas.com Cc: Nobuhiro Iwamatsu iwamatsu@nigauri.org Cc: Jaehoon Chung jh80.chung@samsung.com
Reviewed-by: Nobuhiro Iwamatsu iwamatsu@nigauri.org
drivers/mmc/sh_sdhi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/sh_sdhi.c b/drivers/mmc/sh_sdhi.c index 25224e2e1d..7f0b4c2603 100644 --- a/drivers/mmc/sh_sdhi.c +++ b/drivers/mmc/sh_sdhi.c @@ -546,8 +546,6 @@ static int sh_sdhi_start_cmd(struct sh_sdhi_host *host, break; }
sh_sdhi_writew(host, SDHI_CMD, (unsigned short)(opc & CMD_MASK));host->wait_int = 0; sh_sdhi_writew(host, SDHI_INFO1_MASK, ~INFO1M_RESP_END & sh_sdhi_readw(host, SDHI_INFO1_MASK));@@ -557,6 +555,8 @@ static int sh_sdhi_start_cmd(struct sh_sdhi_host *host, INFO2M_RESP_TIMEOUT | INFO2M_ILA) & sh_sdhi_readw(host, SDHI_INFO2_MASK));
sh_sdhi_writew(host, SDHI_CMD, (unsigned short)(opc & CMD_MASK));time = sh_sdhi_wait_interrupt_flag(host); if (!time) return sh_sdhi_error_manage(host);-- 2.11.0
On 05/13/2017 10:51 PM, Marek Vasut wrote:
From: Kouei Abe kouei.abe.cp@renesas.com
When setting interrupt mask after command starting, an unintended interrupt status sometimes occurs.
Signed-off-by: Kouei Abe kouei.abe.cp@renesas.com Signed-off-by: Hiroyuki Yokoyama hiroyuki.yokoyama.vx@renesas.com Cc: Hiroyuki Yokoyama hiroyuki.yokoyama.vx@renesas.com Cc: Nobuhiro Iwamatsu iwamatsu@nigauri.org Cc: Jaehoon Chung jh80.chung@samsung.com
Reviewed-by: Jaehoon Chung jh80.chung@samsung.com
drivers/mmc/sh_sdhi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/sh_sdhi.c b/drivers/mmc/sh_sdhi.c index 25224e2e1d..7f0b4c2603 100644 --- a/drivers/mmc/sh_sdhi.c +++ b/drivers/mmc/sh_sdhi.c @@ -546,8 +546,6 @@ static int sh_sdhi_start_cmd(struct sh_sdhi_host *host, break; }
- sh_sdhi_writew(host, SDHI_CMD, (unsigned short)(opc & CMD_MASK));
- host->wait_int = 0; sh_sdhi_writew(host, SDHI_INFO1_MASK, ~INFO1M_RESP_END & sh_sdhi_readw(host, SDHI_INFO1_MASK));
@@ -557,6 +555,8 @@ static int sh_sdhi_start_cmd(struct sh_sdhi_host *host, INFO2M_RESP_TIMEOUT | INFO2M_ILA) & sh_sdhi_readw(host, SDHI_INFO2_MASK));
- sh_sdhi_writew(host, SDHI_CMD, (unsigned short)(opc & CMD_MASK));
- time = sh_sdhi_wait_interrupt_flag(host); if (!time) return sh_sdhi_error_manage(host);
From: Kouei Abe kouei.abe.cp@renesas.com
Renesas SDHI SD/MMC driver has 16-bit width bus access to SD_BUF. This adds 64-bit width bus access to SD_BUF.
Signed-off-by: Kouei Abe kouei.abe.cp@renesas.com Cc: Hiroyuki Yokoyama hiroyuki.yokoyama.vx@renesas.com Cc: Nobuhiro Iwamatsu iwamatsu@nigauri.org Cc: Jaehoon Chung jh80.chung@samsung.com --- arch/arm/mach-rmobile/include/mach/sh_sdhi.h | 8 +++-- drivers/mmc/sh_sdhi.c | 53 ++++++++++++++++++++++------ 2 files changed, 48 insertions(+), 13 deletions(-)
diff --git a/arch/arm/mach-rmobile/include/mach/sh_sdhi.h b/arch/arm/mach-rmobile/include/mach/sh_sdhi.h index 057bf3f8bb..a5ea45b707 100644 --- a/arch/arm/mach-rmobile/include/mach/sh_sdhi.h +++ b/arch/arm/mach-rmobile/include/mach/sh_sdhi.h @@ -1,9 +1,9 @@ /* * drivers/mmc/sh-sdhi.h * - * SD/MMC driver for Reneas rmobile ARM SoCs + * SD/MMC driver for Renesas rmobile ARM SoCs * - * Copyright (C) 2013-2014 Renesas Electronics Corporation + * Copyright (C) 2013-2017 Renesas Electronics Corporation * Copyright (C) 2008-2009 Renesas Solutions Corp. * * SPDX-License-Identifier: GPL-2.0 @@ -162,7 +162,9 @@ #define CLKDEV_INIT 400000 /* 100 - 400 KHz */
/* For quirk */ -#define SH_SDHI_QUIRK_16BIT_BUF (1) +#define SH_SDHI_QUIRK_16BIT_BUF BIT(0) +#define SH_SDHI_QUIRK_64BIT_BUF BIT(1) + int sh_sdhi_init(unsigned long addr, int ch, unsigned long quirks);
#endif /* _SH_SDHI_H */ diff --git a/drivers/mmc/sh_sdhi.c b/drivers/mmc/sh_sdhi.c index 7f0b4c2603..d1dd0f0fc3 100644 --- a/drivers/mmc/sh_sdhi.c +++ b/drivers/mmc/sh_sdhi.c @@ -3,7 +3,7 @@ * * SD/MMC driver for Renesas rmobile ARM SoCs. * - * Copyright (C) 2011,2013-2014 Renesas Electronics Corporation + * Copyright (C) 2011,2013-2017 Renesas Electronics Corporation * Copyright (C) 2014 Nobuhiro Iwamatsu nobuhiro.iwamatsu.yj@renesas.com * Copyright (C) 2008-2009 Renesas Solutions Corp. * @@ -29,6 +29,17 @@ struct sh_sdhi_host { unsigned char sd_error; unsigned char detect_waiting; }; + +static inline void sh_sdhi_writeq(struct sh_sdhi_host *host, int reg, u64 val) +{ + writeq(val, host->addr + (reg << host->bus_shift)); +} + +static inline u64 sh_sdhi_readq(struct sh_sdhi_host *host, int reg) +{ + return readq(host->addr + (reg << host->bus_shift)); +} + static inline void sh_sdhi_writew(struct sh_sdhi_host *host, int reg, u16 val) { writew(val, host->addr + (reg << host->bus_shift)); @@ -261,6 +272,7 @@ static int sh_sdhi_single_read(struct sh_sdhi_host *host, struct mmc_data *data) long time; unsigned short blocksize, i; unsigned short *p = (unsigned short *)data->dest; + u64 *q = (u64 *)data->dest;
if ((unsigned long)p & 0x00000001) { debug(DRIVER_NAME": %s: The data pointer is unaligned.", @@ -281,8 +293,12 @@ static int sh_sdhi_single_read(struct sh_sdhi_host *host, struct mmc_data *data)
host->wait_int = 0; blocksize = sh_sdhi_readw(host, SDHI_SIZE); - for (i = 0; i < blocksize / 2; i++) - *p++ = sh_sdhi_readw(host, SDHI_BUF0); + if (host->quirks & SH_SDHI_QUIRK_64BIT_BUF) + for (i = 0; i < blocksize / 8; i++) + *q++ = sh_sdhi_readq(host, SDHI_BUF0); + else + for (i = 0; i < blocksize / 2; i++) + *p++ = sh_sdhi_readw(host, SDHI_BUF0);
time = sh_sdhi_wait_interrupt_flag(host); if (time == 0 || host->sd_error != 0) @@ -297,6 +313,7 @@ static int sh_sdhi_multi_read(struct sh_sdhi_host *host, struct mmc_data *data) long time; unsigned short blocksize, i, sec; unsigned short *p = (unsigned short *)data->dest; + u64 *q = (u64 *)data->dest;
if ((unsigned long)p & 0x00000001) { debug(DRIVER_NAME": %s: The data pointer is unaligned.", @@ -319,8 +336,12 @@ static int sh_sdhi_multi_read(struct sh_sdhi_host *host, struct mmc_data *data)
host->wait_int = 0; blocksize = sh_sdhi_readw(host, SDHI_SIZE); - for (i = 0; i < blocksize / 2; i++) - *p++ = sh_sdhi_readw(host, SDHI_BUF0); + if (host->quirks & SH_SDHI_QUIRK_64BIT_BUF) + for (i = 0; i < blocksize / 8; i++) + *q++ = sh_sdhi_readq(host, SDHI_BUF0); + else + for (i = 0; i < blocksize / 2; i++) + *p++ = sh_sdhi_readw(host, SDHI_BUF0); }
return 0; @@ -332,6 +353,7 @@ static int sh_sdhi_single_write(struct sh_sdhi_host *host, long time; unsigned short blocksize, i; const unsigned short *p = (const unsigned short *)data->src; + const u64 *q = (const u64 *)data->src;
if ((unsigned long)p & 0x00000001) { debug(DRIVER_NAME": %s: The data pointer is unaligned.", @@ -356,8 +378,12 @@ static int sh_sdhi_single_write(struct sh_sdhi_host *host,
host->wait_int = 0; blocksize = sh_sdhi_readw(host, SDHI_SIZE); - for (i = 0; i < blocksize / 2; i++) - sh_sdhi_writew(host, SDHI_BUF0, *p++); + if (host->quirks & SH_SDHI_QUIRK_64BIT_BUF) + for (i = 0; i < blocksize / 8; i++) + sh_sdhi_writeq(host, SDHI_BUF0, *q++); + else + for (i = 0; i < blocksize / 2; i++) + sh_sdhi_writew(host, SDHI_BUF0, *p++);
time = sh_sdhi_wait_interrupt_flag(host); if (time == 0 || host->sd_error != 0) @@ -372,6 +398,7 @@ static int sh_sdhi_multi_write(struct sh_sdhi_host *host, struct mmc_data *data) long time; unsigned short i, sec, blocksize; const unsigned short *p = (const unsigned short *)data->src; + const u64 *q = (const u64 *)data->src;
debug("%s: blocks = %d, blocksize = %d\n", __func__, data->blocks, data->blocksize); @@ -388,8 +415,12 @@ static int sh_sdhi_multi_write(struct sh_sdhi_host *host, struct mmc_data *data)
host->wait_int = 0; blocksize = sh_sdhi_readw(host, SDHI_SIZE); - for (i = 0; i < blocksize / 2; i++) - sh_sdhi_writew(host, SDHI_BUF0, *p++); + if (host->quirks & SH_SDHI_QUIRK_64BIT_BUF) + for (i = 0; i < blocksize / 8; i++) + sh_sdhi_writeq(host, SDHI_BUF0, *q++); + else + for (i = 0; i < blocksize / 2; i++) + sh_sdhi_writew(host, SDHI_BUF0, *p++); }
return 0; @@ -687,7 +718,9 @@ int sh_sdhi_init(unsigned long addr, int ch, unsigned long quirks) host->addr = addr; host->quirks = quirks;
- if (host->quirks & SH_SDHI_QUIRK_16BIT_BUF) + if (host->quirks & SH_SDHI_QUIRK_64BIT_BUF) + host->bus_shift = 2; + else if (host->quirks & SH_SDHI_QUIRK_16BIT_BUF) host->bus_shift = 1;
return ret;
Hi!
2017-05-13 22:51 GMT+09:00 Marek Vasut marek.vasut@gmail.com:
From: Kouei Abe kouei.abe.cp@renesas.com
Renesas SDHI SD/MMC driver has 16-bit width bus access to SD_BUF. This adds 64-bit width bus access to SD_BUF.
Signed-off-by: Kouei Abe kouei.abe.cp@renesas.com Cc: Hiroyuki Yokoyama hiroyuki.yokoyama.vx@renesas.com Cc: Nobuhiro Iwamatsu iwamatsu@nigauri.org Cc: Jaehoon Chung jh80.chung@samsung.com
Reviewed-by: Nobuhiro Iwamatsu iwamatsu@nigauri.org
arch/arm/mach-rmobile/include/mach/sh_sdhi.h | 8 +++-- drivers/mmc/sh_sdhi.c | 53 ++++++++++++++++++++++------ 2 files changed, 48 insertions(+), 13 deletions(-)
diff --git a/arch/arm/mach-rmobile/include/mach/sh_sdhi.h b/arch/arm/mach-rmobile/include/mach/sh_sdhi.h index 057bf3f8bb..a5ea45b707 100644 --- a/arch/arm/mach-rmobile/include/mach/sh_sdhi.h +++ b/arch/arm/mach-rmobile/include/mach/sh_sdhi.h @@ -1,9 +1,9 @@ /*
- drivers/mmc/sh-sdhi.h
- SD/MMC driver for Reneas rmobile ARM SoCs
- SD/MMC driver for Renesas rmobile ARM SoCs
- Copyright (C) 2013-2014 Renesas Electronics Corporation
- Copyright (C) 2013-2017 Renesas Electronics Corporation
- Copyright (C) 2008-2009 Renesas Solutions Corp.
- SPDX-License-Identifier: GPL-2.0
@@ -162,7 +162,9 @@ #define CLKDEV_INIT 400000 /* 100 - 400 KHz */
/* For quirk */ -#define SH_SDHI_QUIRK_16BIT_BUF (1) +#define SH_SDHI_QUIRK_16BIT_BUF BIT(0) +#define SH_SDHI_QUIRK_64BIT_BUF BIT(1)
int sh_sdhi_init(unsigned long addr, int ch, unsigned long quirks);
#endif /* _SH_SDHI_H */ diff --git a/drivers/mmc/sh_sdhi.c b/drivers/mmc/sh_sdhi.c index 7f0b4c2603..d1dd0f0fc3 100644 --- a/drivers/mmc/sh_sdhi.c +++ b/drivers/mmc/sh_sdhi.c @@ -3,7 +3,7 @@
- SD/MMC driver for Renesas rmobile ARM SoCs.
- Copyright (C) 2011,2013-2014 Renesas Electronics Corporation
- Copyright (C) 2011,2013-2017 Renesas Electronics Corporation
- Copyright (C) 2014 Nobuhiro Iwamatsu nobuhiro.iwamatsu.yj@renesas.com
- Copyright (C) 2008-2009 Renesas Solutions Corp.
@@ -29,6 +29,17 @@ struct sh_sdhi_host { unsigned char sd_error; unsigned char detect_waiting; };
+static inline void sh_sdhi_writeq(struct sh_sdhi_host *host, int reg, u64 val) +{
writeq(val, host->addr + (reg << host->bus_shift));+}
+static inline u64 sh_sdhi_readq(struct sh_sdhi_host *host, int reg) +{
return readq(host->addr + (reg << host->bus_shift));+}
static inline void sh_sdhi_writew(struct sh_sdhi_host *host, int reg, u16 val) { writew(val, host->addr + (reg << host->bus_shift)); @@ -261,6 +272,7 @@ static int sh_sdhi_single_read(struct sh_sdhi_host *host, struct mmc_data *data) long time; unsigned short blocksize, i; unsigned short *p = (unsigned short *)data->dest;
u64 *q = (u64 *)data->dest; if ((unsigned long)p & 0x00000001) { debug(DRIVER_NAME": %s: The data pointer is unaligned.",@@ -281,8 +293,12 @@ static int sh_sdhi_single_read(struct sh_sdhi_host *host, struct mmc_data *data)
host->wait_int = 0; blocksize = sh_sdhi_readw(host, SDHI_SIZE);
for (i = 0; i < blocksize / 2; i++)*p++ = sh_sdhi_readw(host, SDHI_BUF0);
if (host->quirks & SH_SDHI_QUIRK_64BIT_BUF)for (i = 0; i < blocksize / 8; i++)*q++ = sh_sdhi_readq(host, SDHI_BUF0);elsefor (i = 0; i < blocksize / 2; i++)*p++ = sh_sdhi_readw(host, SDHI_BUF0); time = sh_sdhi_wait_interrupt_flag(host); if (time == 0 || host->sd_error != 0)@@ -297,6 +313,7 @@ static int sh_sdhi_multi_read(struct sh_sdhi_host *host, struct mmc_data *data) long time; unsigned short blocksize, i, sec; unsigned short *p = (unsigned short *)data->dest;
u64 *q = (u64 *)data->dest; if ((unsigned long)p & 0x00000001) { debug(DRIVER_NAME": %s: The data pointer is unaligned.",@@ -319,8 +336,12 @@ static int sh_sdhi_multi_read(struct sh_sdhi_host *host, struct mmc_data *data)
host->wait_int = 0; blocksize = sh_sdhi_readw(host, SDHI_SIZE);
for (i = 0; i < blocksize / 2; i++)*p++ = sh_sdhi_readw(host, SDHI_BUF0);
if (host->quirks & SH_SDHI_QUIRK_64BIT_BUF)for (i = 0; i < blocksize / 8; i++)*q++ = sh_sdhi_readq(host, SDHI_BUF0);elsefor (i = 0; i < blocksize / 2; i++)*p++ = sh_sdhi_readw(host, SDHI_BUF0); } return 0;@@ -332,6 +353,7 @@ static int sh_sdhi_single_write(struct sh_sdhi_host *host, long time; unsigned short blocksize, i; const unsigned short *p = (const unsigned short *)data->src;
const u64 *q = (const u64 *)data->src; if ((unsigned long)p & 0x00000001) { debug(DRIVER_NAME": %s: The data pointer is unaligned.",@@ -356,8 +378,12 @@ static int sh_sdhi_single_write(struct sh_sdhi_host *host,
host->wait_int = 0; blocksize = sh_sdhi_readw(host, SDHI_SIZE);
for (i = 0; i < blocksize / 2; i++)sh_sdhi_writew(host, SDHI_BUF0, *p++);
if (host->quirks & SH_SDHI_QUIRK_64BIT_BUF)for (i = 0; i < blocksize / 8; i++)sh_sdhi_writeq(host, SDHI_BUF0, *q++);elsefor (i = 0; i < blocksize / 2; i++)sh_sdhi_writew(host, SDHI_BUF0, *p++); time = sh_sdhi_wait_interrupt_flag(host); if (time == 0 || host->sd_error != 0)@@ -372,6 +398,7 @@ static int sh_sdhi_multi_write(struct sh_sdhi_host *host, struct mmc_data *data) long time; unsigned short i, sec, blocksize; const unsigned short *p = (const unsigned short *)data->src;
const u64 *q = (const u64 *)data->src; debug("%s: blocks = %d, blocksize = %d\n", __func__, data->blocks, data->blocksize);@@ -388,8 +415,12 @@ static int sh_sdhi_multi_write(struct sh_sdhi_host *host, struct mmc_data *data)
host->wait_int = 0; blocksize = sh_sdhi_readw(host, SDHI_SIZE);
for (i = 0; i < blocksize / 2; i++)sh_sdhi_writew(host, SDHI_BUF0, *p++);
if (host->quirks & SH_SDHI_QUIRK_64BIT_BUF)for (i = 0; i < blocksize / 8; i++)sh_sdhi_writeq(host, SDHI_BUF0, *q++);elsefor (i = 0; i < blocksize / 2; i++)sh_sdhi_writew(host, SDHI_BUF0, *p++); } return 0;@@ -687,7 +718,9 @@ int sh_sdhi_init(unsigned long addr, int ch, unsigned long quirks) host->addr = addr; host->quirks = quirks;
if (host->quirks & SH_SDHI_QUIRK_16BIT_BUF)
if (host->quirks & SH_SDHI_QUIRK_64BIT_BUF)host->bus_shift = 2;else if (host->quirks & SH_SDHI_QUIRK_16BIT_BUF) host->bus_shift = 1; return ret;-- 2.11.0
On 05/13/2017 10:51 PM, Marek Vasut wrote:
From: Kouei Abe kouei.abe.cp@renesas.com
Renesas SDHI SD/MMC driver has 16-bit width bus access to SD_BUF. This adds 64-bit width bus access to SD_BUF.
Signed-off-by: Kouei Abe kouei.abe.cp@renesas.com Cc: Hiroyuki Yokoyama hiroyuki.yokoyama.vx@renesas.com Cc: Nobuhiro Iwamatsu iwamatsu@nigauri.org Cc: Jaehoon Chung jh80.chung@samsung.com
Reviewed-by: Jaehoon Chung jh80.chung@samsung.com
arch/arm/mach-rmobile/include/mach/sh_sdhi.h | 8 +++-- drivers/mmc/sh_sdhi.c | 53 ++++++++++++++++++++++------ 2 files changed, 48 insertions(+), 13 deletions(-)
diff --git a/arch/arm/mach-rmobile/include/mach/sh_sdhi.h b/arch/arm/mach-rmobile/include/mach/sh_sdhi.h index 057bf3f8bb..a5ea45b707 100644 --- a/arch/arm/mach-rmobile/include/mach/sh_sdhi.h +++ b/arch/arm/mach-rmobile/include/mach/sh_sdhi.h @@ -1,9 +1,9 @@ /*
- drivers/mmc/sh-sdhi.h
- SD/MMC driver for Reneas rmobile ARM SoCs
- SD/MMC driver for Renesas rmobile ARM SoCs
- Copyright (C) 2013-2014 Renesas Electronics Corporation
- Copyright (C) 2013-2017 Renesas Electronics Corporation
- Copyright (C) 2008-2009 Renesas Solutions Corp.
- SPDX-License-Identifier: GPL-2.0
@@ -162,7 +162,9 @@ #define CLKDEV_INIT 400000 /* 100 - 400 KHz */
/* For quirk */ -#define SH_SDHI_QUIRK_16BIT_BUF (1) +#define SH_SDHI_QUIRK_16BIT_BUF BIT(0) +#define SH_SDHI_QUIRK_64BIT_BUF BIT(1)
int sh_sdhi_init(unsigned long addr, int ch, unsigned long quirks);
#endif /* _SH_SDHI_H */ diff --git a/drivers/mmc/sh_sdhi.c b/drivers/mmc/sh_sdhi.c index 7f0b4c2603..d1dd0f0fc3 100644 --- a/drivers/mmc/sh_sdhi.c +++ b/drivers/mmc/sh_sdhi.c @@ -3,7 +3,7 @@
- SD/MMC driver for Renesas rmobile ARM SoCs.
- Copyright (C) 2011,2013-2014 Renesas Electronics Corporation
- Copyright (C) 2011,2013-2017 Renesas Electronics Corporation
- Copyright (C) 2014 Nobuhiro Iwamatsu nobuhiro.iwamatsu.yj@renesas.com
- Copyright (C) 2008-2009 Renesas Solutions Corp.
@@ -29,6 +29,17 @@ struct sh_sdhi_host { unsigned char sd_error; unsigned char detect_waiting; };
+static inline void sh_sdhi_writeq(struct sh_sdhi_host *host, int reg, u64 val) +{
- writeq(val, host->addr + (reg << host->bus_shift));
+}
+static inline u64 sh_sdhi_readq(struct sh_sdhi_host *host, int reg) +{
- return readq(host->addr + (reg << host->bus_shift));
+}
static inline void sh_sdhi_writew(struct sh_sdhi_host *host, int reg, u16 val) { writew(val, host->addr + (reg << host->bus_shift)); @@ -261,6 +272,7 @@ static int sh_sdhi_single_read(struct sh_sdhi_host *host, struct mmc_data *data) long time; unsigned short blocksize, i; unsigned short *p = (unsigned short *)data->dest;
u64 *q = (u64 *)data->dest;
if ((unsigned long)p & 0x00000001) { debug(DRIVER_NAME": %s: The data pointer is unaligned.",
@@ -281,8 +293,12 @@ static int sh_sdhi_single_read(struct sh_sdhi_host *host, struct mmc_data *data)
host->wait_int = 0; blocksize = sh_sdhi_readw(host, SDHI_SIZE);
- for (i = 0; i < blocksize / 2; i++)
*p++ = sh_sdhi_readw(host, SDHI_BUF0);
if (host->quirks & SH_SDHI_QUIRK_64BIT_BUF)
for (i = 0; i < blocksize / 8; i++)*q++ = sh_sdhi_readq(host, SDHI_BUF0);else
for (i = 0; i < blocksize / 2; i++)*p++ = sh_sdhi_readw(host, SDHI_BUF0);time = sh_sdhi_wait_interrupt_flag(host); if (time == 0 || host->sd_error != 0)
@@ -297,6 +313,7 @@ static int sh_sdhi_multi_read(struct sh_sdhi_host *host, struct mmc_data *data) long time; unsigned short blocksize, i, sec; unsigned short *p = (unsigned short *)data->dest;
u64 *q = (u64 *)data->dest;
if ((unsigned long)p & 0x00000001) { debug(DRIVER_NAME": %s: The data pointer is unaligned.",
@@ -319,8 +336,12 @@ static int sh_sdhi_multi_read(struct sh_sdhi_host *host, struct mmc_data *data)
host->wait_int = 0; blocksize = sh_sdhi_readw(host, SDHI_SIZE);
for (i = 0; i < blocksize / 2; i++)*p++ = sh_sdhi_readw(host, SDHI_BUF0);
if (host->quirks & SH_SDHI_QUIRK_64BIT_BUF)for (i = 0; i < blocksize / 8; i++)*q++ = sh_sdhi_readq(host, SDHI_BUF0);elsefor (i = 0; i < blocksize / 2; i++)*p++ = sh_sdhi_readw(host, SDHI_BUF0);}
return 0;
@@ -332,6 +353,7 @@ static int sh_sdhi_single_write(struct sh_sdhi_host *host, long time; unsigned short blocksize, i; const unsigned short *p = (const unsigned short *)data->src;
const u64 *q = (const u64 *)data->src;
if ((unsigned long)p & 0x00000001) { debug(DRIVER_NAME": %s: The data pointer is unaligned.",
@@ -356,8 +378,12 @@ static int sh_sdhi_single_write(struct sh_sdhi_host *host,
host->wait_int = 0; blocksize = sh_sdhi_readw(host, SDHI_SIZE);
- for (i = 0; i < blocksize / 2; i++)
sh_sdhi_writew(host, SDHI_BUF0, *p++);
if (host->quirks & SH_SDHI_QUIRK_64BIT_BUF)
for (i = 0; i < blocksize / 8; i++)sh_sdhi_writeq(host, SDHI_BUF0, *q++);else
for (i = 0; i < blocksize / 2; i++)sh_sdhi_writew(host, SDHI_BUF0, *p++);time = sh_sdhi_wait_interrupt_flag(host); if (time == 0 || host->sd_error != 0)
@@ -372,6 +398,7 @@ static int sh_sdhi_multi_write(struct sh_sdhi_host *host, struct mmc_data *data) long time; unsigned short i, sec, blocksize; const unsigned short *p = (const unsigned short *)data->src;
const u64 *q = (const u64 *)data->src;
debug("%s: blocks = %d, blocksize = %d\n", __func__, data->blocks, data->blocksize);
@@ -388,8 +415,12 @@ static int sh_sdhi_multi_write(struct sh_sdhi_host *host, struct mmc_data *data)
host->wait_int = 0; blocksize = sh_sdhi_readw(host, SDHI_SIZE);
for (i = 0; i < blocksize / 2; i++)sh_sdhi_writew(host, SDHI_BUF0, *p++);
if (host->quirks & SH_SDHI_QUIRK_64BIT_BUF)for (i = 0; i < blocksize / 8; i++)sh_sdhi_writeq(host, SDHI_BUF0, *q++);elsefor (i = 0; i < blocksize / 2; i++)sh_sdhi_writew(host, SDHI_BUF0, *p++);}
return 0;
@@ -687,7 +718,9 @@ int sh_sdhi_init(unsigned long addr, int ch, unsigned long quirks) host->addr = addr; host->quirks = quirks;
- if (host->quirks & SH_SDHI_QUIRK_16BIT_BUF)
if (host->quirks & SH_SDHI_QUIRK_64BIT_BUF)
host->bus_shift = 2;else if (host->quirks & SH_SDHI_QUIRK_16BIT_BUF) host->bus_shift = 1;
return ret;
Hi
On 05/13/2017 10:51 PM, Marek Vasut wrote:
From: Kouei Abe kouei.abe.cp@renesas.com
Renesas SDHI SD/MMC driver has 16-bit width bus access to SD_BUF. This adds 64-bit width bus access to SD_BUF.
aarch64: + r8a7795_salvator-x +board/renesas/salvator-x/salvator-x.c: In function 'board_mmc_init': +board/renesas/salvator-x/salvator-x.c:196:7: error: 'SH_SDHI_QUIRK_64BIT_BUF' undeclared (first use in this function) + SH_SDHI_QUIRK_64BIT_BUF); + ^~~~~~~~~~~~~~~~~~~~~~~ +board/renesas/salvator-x/salvator-x.c:196:7: note: each undeclared identifier is reported only once for each function it appears in +make[2]: *** [board/renesas/salvator-x/salvator-x.o] Error 1 +make[1]: *** [board/renesas/salvator-x] Error 2 +make[1]: *** wait: No child processes. Stop. +make: *** [sub-make] Error 2
Could you fix this?
Best Regards, Jaehoon Chung
Signed-off-by: Kouei Abe kouei.abe.cp@renesas.com Cc: Hiroyuki Yokoyama hiroyuki.yokoyama.vx@renesas.com Cc: Nobuhiro Iwamatsu iwamatsu@nigauri.org Cc: Jaehoon Chung jh80.chung@samsung.com Reviewed-by: Nobuhiro Iwamatsu iwamatsu@nigauri.org Reviewed-by: Jaehoon Chung jh80.chung@samsung.com
arch/arm/mach-rmobile/include/mach/sh_sdhi.h | 8 +++-- drivers/mmc/sh_sdhi.c | 53 ++++++++++++++++++++++------ 2 files changed, 48 insertions(+), 13 deletions(-)
diff --git a/arch/arm/mach-rmobile/include/mach/sh_sdhi.h b/arch/arm/mach-rmobile/include/mach/sh_sdhi.h index 057bf3f8bb..a5ea45b707 100644 --- a/arch/arm/mach-rmobile/include/mach/sh_sdhi.h +++ b/arch/arm/mach-rmobile/include/mach/sh_sdhi.h @@ -1,9 +1,9 @@ /*
- drivers/mmc/sh-sdhi.h
- SD/MMC driver for Reneas rmobile ARM SoCs
- SD/MMC driver for Renesas rmobile ARM SoCs
- Copyright (C) 2013-2014 Renesas Electronics Corporation
- Copyright (C) 2013-2017 Renesas Electronics Corporation
- Copyright (C) 2008-2009 Renesas Solutions Corp.
- SPDX-License-Identifier: GPL-2.0
@@ -162,7 +162,9 @@ #define CLKDEV_INIT 400000 /* 100 - 400 KHz */
/* For quirk */ -#define SH_SDHI_QUIRK_16BIT_BUF (1) +#define SH_SDHI_QUIRK_16BIT_BUF BIT(0) +#define SH_SDHI_QUIRK_64BIT_BUF BIT(1)
int sh_sdhi_init(unsigned long addr, int ch, unsigned long quirks);
#endif /* _SH_SDHI_H */ diff --git a/drivers/mmc/sh_sdhi.c b/drivers/mmc/sh_sdhi.c index 7f0b4c2603..d1dd0f0fc3 100644 --- a/drivers/mmc/sh_sdhi.c +++ b/drivers/mmc/sh_sdhi.c @@ -3,7 +3,7 @@
- SD/MMC driver for Renesas rmobile ARM SoCs.
- Copyright (C) 2011,2013-2014 Renesas Electronics Corporation
- Copyright (C) 2011,2013-2017 Renesas Electronics Corporation
- Copyright (C) 2014 Nobuhiro Iwamatsu nobuhiro.iwamatsu.yj@renesas.com
- Copyright (C) 2008-2009 Renesas Solutions Corp.
@@ -29,6 +29,17 @@ struct sh_sdhi_host { unsigned char sd_error; unsigned char detect_waiting; };
+static inline void sh_sdhi_writeq(struct sh_sdhi_host *host, int reg, u64 val) +{
- writeq(val, host->addr + (reg << host->bus_shift));
+}
+static inline u64 sh_sdhi_readq(struct sh_sdhi_host *host, int reg) +{
- return readq(host->addr + (reg << host->bus_shift));
+}
static inline void sh_sdhi_writew(struct sh_sdhi_host *host, int reg, u16 val) { writew(val, host->addr + (reg << host->bus_shift)); @@ -261,6 +272,7 @@ static int sh_sdhi_single_read(struct sh_sdhi_host *host, struct mmc_data *data) long time; unsigned short blocksize, i; unsigned short *p = (unsigned short *)data->dest;
u64 *q = (u64 *)data->dest;
if ((unsigned long)p & 0x00000001) { debug(DRIVER_NAME": %s: The data pointer is unaligned.",
@@ -281,8 +293,12 @@ static int sh_sdhi_single_read(struct sh_sdhi_host *host, struct mmc_data *data)
host->wait_int = 0; blocksize = sh_sdhi_readw(host, SDHI_SIZE);
- for (i = 0; i < blocksize / 2; i++)
*p++ = sh_sdhi_readw(host, SDHI_BUF0);
if (host->quirks & SH_SDHI_QUIRK_64BIT_BUF)
for (i = 0; i < blocksize / 8; i++)*q++ = sh_sdhi_readq(host, SDHI_BUF0);else
for (i = 0; i < blocksize / 2; i++)*p++ = sh_sdhi_readw(host, SDHI_BUF0);time = sh_sdhi_wait_interrupt_flag(host); if (time == 0 || host->sd_error != 0)
@@ -297,6 +313,7 @@ static int sh_sdhi_multi_read(struct sh_sdhi_host *host, struct mmc_data *data) long time; unsigned short blocksize, i, sec; unsigned short *p = (unsigned short *)data->dest;
u64 *q = (u64 *)data->dest;
if ((unsigned long)p & 0x00000001) { debug(DRIVER_NAME": %s: The data pointer is unaligned.",
@@ -319,8 +336,12 @@ static int sh_sdhi_multi_read(struct sh_sdhi_host *host, struct mmc_data *data)
host->wait_int = 0; blocksize = sh_sdhi_readw(host, SDHI_SIZE);
for (i = 0; i < blocksize / 2; i++)*p++ = sh_sdhi_readw(host, SDHI_BUF0);
if (host->quirks & SH_SDHI_QUIRK_64BIT_BUF)for (i = 0; i < blocksize / 8; i++)*q++ = sh_sdhi_readq(host, SDHI_BUF0);elsefor (i = 0; i < blocksize / 2; i++)*p++ = sh_sdhi_readw(host, SDHI_BUF0);}
return 0;
@@ -332,6 +353,7 @@ static int sh_sdhi_single_write(struct sh_sdhi_host *host, long time; unsigned short blocksize, i; const unsigned short *p = (const unsigned short *)data->src;
const u64 *q = (const u64 *)data->src;
if ((unsigned long)p & 0x00000001) { debug(DRIVER_NAME": %s: The data pointer is unaligned.",
@@ -356,8 +378,12 @@ static int sh_sdhi_single_write(struct sh_sdhi_host *host,
host->wait_int = 0; blocksize = sh_sdhi_readw(host, SDHI_SIZE);
- for (i = 0; i < blocksize / 2; i++)
sh_sdhi_writew(host, SDHI_BUF0, *p++);
if (host->quirks & SH_SDHI_QUIRK_64BIT_BUF)
for (i = 0; i < blocksize / 8; i++)sh_sdhi_writeq(host, SDHI_BUF0, *q++);else
for (i = 0; i < blocksize / 2; i++)sh_sdhi_writew(host, SDHI_BUF0, *p++);time = sh_sdhi_wait_interrupt_flag(host); if (time == 0 || host->sd_error != 0)
@@ -372,6 +398,7 @@ static int sh_sdhi_multi_write(struct sh_sdhi_host *host, struct mmc_data *data) long time; unsigned short i, sec, blocksize; const unsigned short *p = (const unsigned short *)data->src;
const u64 *q = (const u64 *)data->src;
debug("%s: blocks = %d, blocksize = %d\n", __func__, data->blocks, data->blocksize);
@@ -388,8 +415,12 @@ static int sh_sdhi_multi_write(struct sh_sdhi_host *host, struct mmc_data *data)
host->wait_int = 0; blocksize = sh_sdhi_readw(host, SDHI_SIZE);
for (i = 0; i < blocksize / 2; i++)sh_sdhi_writew(host, SDHI_BUF0, *p++);
if (host->quirks & SH_SDHI_QUIRK_64BIT_BUF)for (i = 0; i < blocksize / 8; i++)sh_sdhi_writeq(host, SDHI_BUF0, *q++);elsefor (i = 0; i < blocksize / 2; i++)sh_sdhi_writew(host, SDHI_BUF0, *p++);}
return 0;
@@ -687,7 +718,9 @@ int sh_sdhi_init(unsigned long addr, int ch, unsigned long quirks) host->addr = addr; host->quirks = quirks;
- if (host->quirks & SH_SDHI_QUIRK_16BIT_BUF)
if (host->quirks & SH_SDHI_QUIRK_64BIT_BUF)
host->bus_shift = 2;else if (host->quirks & SH_SDHI_QUIRK_16BIT_BUF) host->bus_shift = 1;
return ret;
From: Kouei Abe kouei.abe.cp@renesas.com
Renesas SDHI SD/MMC driver did not support MMC version 5.0 devices. This adds MMC version 5.0 device support.
Signed-off-by: Kouei Abe kouei.abe.cp@renesas.com Signed-off-by: Hiroyuki Yokoyama hiroyuki.yokoyama.vx@renesas.com Signed-off-by: Marek Vasut marek.vasut+renesas@gmail.com Cc: Hiroyuki Yokoyama hiroyuki.yokoyama.vx@renesas.com Cc: Nobuhiro Iwamatsu iwamatsu@nigauri.org Cc: Jaehoon Chung jh80.chung@samsung.com --- arch/arm/mach-rmobile/include/mach/sh_sdhi.h | 7 ++++++- drivers/mmc/sh_sdhi.c | 24 +++++++++++++++++++----- 2 files changed, 25 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-rmobile/include/mach/sh_sdhi.h b/arch/arm/mach-rmobile/include/mach/sh_sdhi.h index a5ea45b707..1fb0648b12 100644 --- a/arch/arm/mach-rmobile/include/mach/sh_sdhi.h +++ b/arch/arm/mach-rmobile/include/mach/sh_sdhi.h @@ -50,8 +50,10 @@ /* SDHI CMD VALUE */ #define CMD_MASK 0x0000ffff #define SDHI_APP 0x0040 +#define SDHI_MMC_SEND_OP_COND 0x0701 #define SDHI_SD_APP_SEND_SCR 0x0073 #define SDHI_SD_SWITCH 0x1C06 +#define SDHI_MMC_SEND_EXT_CSD 0x1C08
/* SDHI_PORTSEL */ #define USE_1PORT (1 << 8) /* 1 port */ @@ -120,7 +122,10 @@ #define CLK_ENABLE (1 << 8)
/* SDHI_OPTION */ -#define OPT_BUS_WIDTH_1 (1 << 15) /* bus width = 1 bit */ +#define OPT_BUS_WIDTH_M (5 << 13) /* 101b (15-13bit) */ +#define OPT_BUS_WIDTH_1 (4 << 13) /* bus width = 1 bit */ +#define OPT_BUS_WIDTH_4 (0 << 13) /* bus width = 4 bit */ +#define OPT_BUS_WIDTH_8 (1 << 13) /* bus width = 8 bit */
/* SDHI_ERR_STS1 */ #define ERR_STS1_CRC_ERROR ((1 << 11) | (1 << 10) | (1 << 9) | \ diff --git a/drivers/mmc/sh_sdhi.c b/drivers/mmc/sh_sdhi.c index d1dd0f0fc3..c64beb6e2a 100644 --- a/drivers/mmc/sh_sdhi.c +++ b/drivers/mmc/sh_sdhi.c @@ -489,6 +489,13 @@ static unsigned short sh_sdhi_set_cmd(struct sh_sdhi_host *host, else /* SD_SWITCH */ opc = SDHI_SD_SWITCH; break; + case MMC_CMD_SEND_OP_COND: + opc = SDHI_MMC_SEND_OP_COND; + break; + case MMC_CMD_SEND_EXT_CSD: + if (data) + opc = SDHI_MMC_SEND_EXT_CSD; + break; default: break; } @@ -513,6 +520,7 @@ static unsigned short sh_sdhi_data_trans(struct sh_sdhi_host *host, case MMC_CMD_READ_SINGLE_BLOCK: case SDHI_SD_APP_SEND_SCR: case SDHI_SD_SWITCH: /* SD_SWITCH */ + case SDHI_MMC_SEND_EXT_CSD: ret = sh_sdhi_single_read(host, data); break; default: @@ -648,12 +656,18 @@ static int sh_sdhi_set_ios(struct mmc *mmc) if (ret) return -EINVAL;
- if (mmc->bus_width == 4) - sh_sdhi_writew(host, SDHI_OPTION, ~OPT_BUS_WIDTH_1 & - sh_sdhi_readw(host, SDHI_OPTION)); + if (mmc->bus_width == 8) + sh_sdhi_writew(host, SDHI_OPTION, + OPT_BUS_WIDTH_8 | (~OPT_BUS_WIDTH_M & + sh_sdhi_readw(host, SDHI_OPTION))); + else if (mmc->bus_width == 4) + sh_sdhi_writew(host, SDHI_OPTION, + OPT_BUS_WIDTH_4 | (~OPT_BUS_WIDTH_M & + sh_sdhi_readw(host, SDHI_OPTION))); else - sh_sdhi_writew(host, SDHI_OPTION, OPT_BUS_WIDTH_1 | - sh_sdhi_readw(host, SDHI_OPTION)); + sh_sdhi_writew(host, SDHI_OPTION, + OPT_BUS_WIDTH_1 | (~OPT_BUS_WIDTH_M & + sh_sdhi_readw(host, SDHI_OPTION)));
debug("clock = %d, buswidth = %d\n", mmc->clock, mmc->bus_width);
Hi,
2017-05-13 22:51 GMT+09:00 Marek Vasut marek.vasut@gmail.com:
From: Kouei Abe kouei.abe.cp@renesas.com
Renesas SDHI SD/MMC driver did not support MMC version 5.0 devices. This adds MMC version 5.0 device support.
Signed-off-by: Kouei Abe kouei.abe.cp@renesas.com Signed-off-by: Hiroyuki Yokoyama hiroyuki.yokoyama.vx@renesas.com Signed-off-by: Marek Vasut marek.vasut+renesas@gmail.com Cc: Hiroyuki Yokoyama hiroyuki.yokoyama.vx@renesas.com Cc: Nobuhiro Iwamatsu iwamatsu@nigauri.org Cc: Jaehoon Chung jh80.chung@samsung.com
Reviewed-by: Nobuhiro Iwamatsu iwamatsu@nigauri.org
arch/arm/mach-rmobile/include/mach/sh_sdhi.h | 7 ++++++- drivers/mmc/sh_sdhi.c | 24 +++++++++++++++++++----- 2 files changed, 25 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-rmobile/include/mach/sh_sdhi.h b/arch/arm/mach-rmobile/include/mach/sh_sdhi.h index a5ea45b707..1fb0648b12 100644 --- a/arch/arm/mach-rmobile/include/mach/sh_sdhi.h +++ b/arch/arm/mach-rmobile/include/mach/sh_sdhi.h @@ -50,8 +50,10 @@ /* SDHI CMD VALUE */ #define CMD_MASK 0x0000ffff #define SDHI_APP 0x0040 +#define SDHI_MMC_SEND_OP_COND 0x0701 #define SDHI_SD_APP_SEND_SCR 0x0073 #define SDHI_SD_SWITCH 0x1C06 +#define SDHI_MMC_SEND_EXT_CSD 0x1C08
/* SDHI_PORTSEL */ #define USE_1PORT (1 << 8) /* 1 port */ @@ -120,7 +122,10 @@ #define CLK_ENABLE (1 << 8)
/* SDHI_OPTION */ -#define OPT_BUS_WIDTH_1 (1 << 15) /* bus width = 1 bit */ +#define OPT_BUS_WIDTH_M (5 << 13) /* 101b (15-13bit) */ +#define OPT_BUS_WIDTH_1 (4 << 13) /* bus width = 1 bit */ +#define OPT_BUS_WIDTH_4 (0 << 13) /* bus width = 4 bit */ +#define OPT_BUS_WIDTH_8 (1 << 13) /* bus width = 8 bit */
/* SDHI_ERR_STS1 */ #define ERR_STS1_CRC_ERROR ((1 << 11) | (1 << 10) | (1 << 9) | \ diff --git a/drivers/mmc/sh_sdhi.c b/drivers/mmc/sh_sdhi.c index d1dd0f0fc3..c64beb6e2a 100644 --- a/drivers/mmc/sh_sdhi.c +++ b/drivers/mmc/sh_sdhi.c @@ -489,6 +489,13 @@ static unsigned short sh_sdhi_set_cmd(struct sh_sdhi_host *host, else /* SD_SWITCH */ opc = SDHI_SD_SWITCH; break;
case MMC_CMD_SEND_OP_COND:opc = SDHI_MMC_SEND_OP_COND;break;case MMC_CMD_SEND_EXT_CSD:if (data)opc = SDHI_MMC_SEND_EXT_CSD;break; default: break; }@@ -513,6 +520,7 @@ static unsigned short sh_sdhi_data_trans(struct sh_sdhi_host *host, case MMC_CMD_READ_SINGLE_BLOCK: case SDHI_SD_APP_SEND_SCR: case SDHI_SD_SWITCH: /* SD_SWITCH */
case SDHI_MMC_SEND_EXT_CSD: ret = sh_sdhi_single_read(host, data); break; default:@@ -648,12 +656,18 @@ static int sh_sdhi_set_ios(struct mmc *mmc) if (ret) return -EINVAL;
if (mmc->bus_width == 4)sh_sdhi_writew(host, SDHI_OPTION, ~OPT_BUS_WIDTH_1 &sh_sdhi_readw(host, SDHI_OPTION));
if (mmc->bus_width == 8)sh_sdhi_writew(host, SDHI_OPTION,OPT_BUS_WIDTH_8 | (~OPT_BUS_WIDTH_M &sh_sdhi_readw(host, SDHI_OPTION)));else if (mmc->bus_width == 4)sh_sdhi_writew(host, SDHI_OPTION,OPT_BUS_WIDTH_4 | (~OPT_BUS_WIDTH_M &sh_sdhi_readw(host, SDHI_OPTION))); else
sh_sdhi_writew(host, SDHI_OPTION, OPT_BUS_WIDTH_1 |sh_sdhi_readw(host, SDHI_OPTION));
sh_sdhi_writew(host, SDHI_OPTION,OPT_BUS_WIDTH_1 | (~OPT_BUS_WIDTH_M &sh_sdhi_readw(host, SDHI_OPTION))); debug("clock = %d, buswidth = %d\n", mmc->clock, mmc->bus_width);-- 2.11.0
On 05/13/2017 10:51 PM, Marek Vasut wrote:
From: Kouei Abe kouei.abe.cp@renesas.com
Renesas SDHI SD/MMC driver did not support MMC version 5.0 devices. This adds MMC version 5.0 device support.
Signed-off-by: Kouei Abe kouei.abe.cp@renesas.com Signed-off-by: Hiroyuki Yokoyama hiroyuki.yokoyama.vx@renesas.com Signed-off-by: Marek Vasut marek.vasut+renesas@gmail.com Cc: Hiroyuki Yokoyama hiroyuki.yokoyama.vx@renesas.com Cc: Nobuhiro Iwamatsu iwamatsu@nigauri.org Cc: Jaehoon Chung jh80.chung@samsung.com
arch/arm/mach-rmobile/include/mach/sh_sdhi.h | 7 ++++++- drivers/mmc/sh_sdhi.c | 24 +++++++++++++++++++----- 2 files changed, 25 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-rmobile/include/mach/sh_sdhi.h b/arch/arm/mach-rmobile/include/mach/sh_sdhi.h index a5ea45b707..1fb0648b12 100644 --- a/arch/arm/mach-rmobile/include/mach/sh_sdhi.h +++ b/arch/arm/mach-rmobile/include/mach/sh_sdhi.h @@ -50,8 +50,10 @@ /* SDHI CMD VALUE */ #define CMD_MASK 0x0000ffff #define SDHI_APP 0x0040 +#define SDHI_MMC_SEND_OP_COND 0x0701 #define SDHI_SD_APP_SEND_SCR 0x0073 #define SDHI_SD_SWITCH 0x1C06 +#define SDHI_MMC_SEND_EXT_CSD 0x1C08
/* SDHI_PORTSEL */ #define USE_1PORT (1 << 8) /* 1 port */ @@ -120,7 +122,10 @@ #define CLK_ENABLE (1 << 8)
/* SDHI_OPTION */ -#define OPT_BUS_WIDTH_1 (1 << 15) /* bus width = 1 bit */ +#define OPT_BUS_WIDTH_M (5 << 13) /* 101b (15-13bit) */
What is WIDTH_M?
+#define OPT_BUS_WIDTH_1 (4 << 13) /* bus width = 1 bit */ +#define OPT_BUS_WIDTH_4 (0 << 13) /* bus width = 4 bit */ +#define OPT_BUS_WIDTH_8 (1 << 13) /* bus width = 8 bit */
/* SDHI_ERR_STS1 */ #define ERR_STS1_CRC_ERROR ((1 << 11) | (1 << 10) | (1 << 9) | \ diff --git a/drivers/mmc/sh_sdhi.c b/drivers/mmc/sh_sdhi.c index d1dd0f0fc3..c64beb6e2a 100644 --- a/drivers/mmc/sh_sdhi.c +++ b/drivers/mmc/sh_sdhi.c @@ -489,6 +489,13 @@ static unsigned short sh_sdhi_set_cmd(struct sh_sdhi_host *host, else /* SD_SWITCH */ opc = SDHI_SD_SWITCH; break;
- case MMC_CMD_SEND_OP_COND:
opc = SDHI_MMC_SEND_OP_COND;break;- case MMC_CMD_SEND_EXT_CSD:
if (data)opc = SDHI_MMC_SEND_EXT_CSD;break;@@ -513,6 +520,7 @@ static unsigned short sh_sdhi_data_trans(struct sh_sdhi_host *host, case MMC_CMD_READ_SINGLE_BLOCK: case SDHI_SD_APP_SEND_SCR: case SDHI_SD_SWITCH: /* SD_SWITCH */
- case SDHI_MMC_SEND_EXT_CSD: ret = sh_sdhi_single_read(host, data); break; default:
@@ -648,12 +656,18 @@ static int sh_sdhi_set_ios(struct mmc *mmc) if (ret) return -EINVAL;
- if (mmc->bus_width == 4)
sh_sdhi_writew(host, SDHI_OPTION, ~OPT_BUS_WIDTH_1 &sh_sdhi_readw(host, SDHI_OPTION));
- if (mmc->bus_width == 8)
sh_sdhi_writew(host, SDHI_OPTION,OPT_BUS_WIDTH_8 | (~OPT_BUS_WIDTH_M &sh_sdhi_readw(host, SDHI_OPTION)));- else if (mmc->bus_width == 4)
sh_sdhi_writew(host, SDHI_OPTION,OPT_BUS_WIDTH_4 | (~OPT_BUS_WIDTH_M &sh_sdhi_readw(host, SDHI_OPTION)));
sh_sdhi_writew(host, SDHI_OPTION, OPT_BUS_WIDTH_1 |sh_sdhi_readw(host, SDHI_OPTION));
sh_sdhi_writew(host, SDHI_OPTION,OPT_BUS_WIDTH_1 | (~OPT_BUS_WIDTH_M &sh_sdhi_readw(host, SDHI_OPTION)));debug("clock = %d, buswidth = %d\n", mmc->clock, mmc->bus_width);
From: Kouei Abe kouei.abe.cp@renesas.com
R-Car Gen3 series have four SD card interfaces (SDHI0 to SDHI3), two of which can also be used as MMC interfaces (SDHI2 and SDHI3). This adds High-speed mode SD clock frequency between 25MHz and 50MHz, 8bit/4bit bus width, high capacity and low voltage device support.
Signed-off-by: Kouei Abe kouei.abe.cp@renesas.com Cc: Hiroyuki Yokoyama hiroyuki.yokoyama.vx@renesas.com Cc: Nobuhiro Iwamatsu iwamatsu@nigauri.org Cc: Jaehoon Chung jh80.chung@samsung.com --- drivers/mmc/sh_sdhi.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+)
diff --git a/drivers/mmc/sh_sdhi.c b/drivers/mmc/sh_sdhi.c index c64beb6e2a..d181b63905 100644 --- a/drivers/mmc/sh_sdhi.c +++ b/drivers/mmc/sh_sdhi.c @@ -698,6 +698,19 @@ static const struct mmc_ops sh_sdhi_ops = { .init = sh_sdhi_initialize, };
+#ifdef CONFIG_RCAR_GEN3 +static struct mmc_config sh_sdhi_cfg = { + .name = DRIVER_NAME, + .ops = &sh_sdhi_ops, + .f_min = CLKDEV_INIT, + .f_max = CLKDEV_HS_DATA, + .voltages = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34, + .host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT | MMC_MODE_HS | + MMC_MODE_HS_52MHz, + .part_type = PART_TYPE_DOS, + .b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT, +}; +#else static struct mmc_config sh_sdhi_cfg = { .name = DRIVER_NAME, .ops = &sh_sdhi_ops, @@ -708,6 +721,7 @@ static struct mmc_config sh_sdhi_cfg = { .part_type = PART_TYPE_DOS, .b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT, }; +#endif
int sh_sdhi_init(unsigned long addr, int ch, unsigned long quirks) {
Hi,
2017-05-13 22:51 GMT+09:00 Marek Vasut marek.vasut@gmail.com:
From: Kouei Abe kouei.abe.cp@renesas.com
R-Car Gen3 series have four SD card interfaces (SDHI0 to SDHI3), two of which can also be used as MMC interfaces (SDHI2 and SDHI3). This adds High-speed mode SD clock frequency between 25MHz and 50MHz, 8bit/4bit bus width, high capacity and low voltage device support.
Signed-off-by: Kouei Abe kouei.abe.cp@renesas.com Cc: Hiroyuki Yokoyama hiroyuki.yokoyama.vx@renesas.com Cc: Nobuhiro Iwamatsu iwamatsu@nigauri.org Cc: Jaehoon Chung jh80.chung@samsung.com
Reviewed-by: Nobuhiro Iwamatsu iwamatsu@nigauri.org
drivers/mmc/sh_sdhi.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+)
diff --git a/drivers/mmc/sh_sdhi.c b/drivers/mmc/sh_sdhi.c index c64beb6e2a..d181b63905 100644 --- a/drivers/mmc/sh_sdhi.c +++ b/drivers/mmc/sh_sdhi.c @@ -698,6 +698,19 @@ static const struct mmc_ops sh_sdhi_ops = { .init = sh_sdhi_initialize, };
+#ifdef CONFIG_RCAR_GEN3 +static struct mmc_config sh_sdhi_cfg = {
.name = DRIVER_NAME,.ops = &sh_sdhi_ops,.f_min = CLKDEV_INIT,.f_max = CLKDEV_HS_DATA,.voltages = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,.host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT | MMC_MODE_HS |MMC_MODE_HS_52MHz,.part_type = PART_TYPE_DOS,.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT,+}; +#else static struct mmc_config sh_sdhi_cfg = { .name = DRIVER_NAME, .ops = &sh_sdhi_ops, @@ -708,6 +721,7 @@ static struct mmc_config sh_sdhi_cfg = { .part_type = PART_TYPE_DOS, .b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT, }; +#endif
int sh_sdhi_init(unsigned long addr, int ch, unsigned long quirks) { -- 2.11.0
On 05/13/2017 10:51 PM, Marek Vasut wrote:
From: Kouei Abe kouei.abe.cp@renesas.com
R-Car Gen3 series have four SD card interfaces (SDHI0 to SDHI3), two of which can also be used as MMC interfaces (SDHI2 and SDHI3). This adds High-speed mode SD clock frequency between 25MHz and 50MHz, 8bit/4bit bus width, high capacity and low voltage device support.
Signed-off-by: Kouei Abe kouei.abe.cp@renesas.com Cc: Hiroyuki Yokoyama hiroyuki.yokoyama.vx@renesas.com Cc: Nobuhiro Iwamatsu iwamatsu@nigauri.org Cc: Jaehoon Chung jh80.chung@samsung.com
Reviewed-by: Jaehoon Chung jh80.chung@samsung.com
drivers/mmc/sh_sdhi.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+)
diff --git a/drivers/mmc/sh_sdhi.c b/drivers/mmc/sh_sdhi.c index c64beb6e2a..d181b63905 100644 --- a/drivers/mmc/sh_sdhi.c +++ b/drivers/mmc/sh_sdhi.c @@ -698,6 +698,19 @@ static const struct mmc_ops sh_sdhi_ops = { .init = sh_sdhi_initialize, };
+#ifdef CONFIG_RCAR_GEN3 +static struct mmc_config sh_sdhi_cfg = {
- .name = DRIVER_NAME,
- .ops = &sh_sdhi_ops,
- .f_min = CLKDEV_INIT,
- .f_max = CLKDEV_HS_DATA,
- .voltages = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
- .host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT | MMC_MODE_HS |
MMC_MODE_HS_52MHz,- .part_type = PART_TYPE_DOS,
- .b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT,
+}; +#else static struct mmc_config sh_sdhi_cfg = { .name = DRIVER_NAME, .ops = &sh_sdhi_ops, @@ -708,6 +721,7 @@ static struct mmc_config sh_sdhi_cfg = { .part_type = PART_TYPE_DOS, .b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT, }; +#endif
int sh_sdhi_init(unsigned long addr, int ch, unsigned long quirks) {
Hi!
2017-05-13 22:51 GMT+09:00 Marek Vasut marek.vasut@gmail.com:
The Kconfig entry depends on RMOBILE, but this was renamed to ARCH_RMOBILE in commit 1cc95f6e1b38 (ARM: Rmobile: Rename CONFIG_RMOBILE to CONFIG_ARCH_RMOBILE) . Fix this omission.
Signed-off-by: Marek Vasut marek.vasut+renesas@gmail.com Cc: Hiroyuki Yokoyama hiroyuki.yokoyama.vx@renesas.com Cc: Nobuhiro Iwamatsu iwamatsu@nigauri.org Cc: Jaehoon Chung jh80.chung@samsung.com
Reviewed-by: Nobuhiro Iwamatsu iwamatsu@nigauri.org
drivers/mmc/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index 6ac26dd137..b2d70a37bd 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -159,7 +159,7 @@ config MMC_OMAP36XX_PINS
config SH_SDHI bool "SuperH/Renesas ARM SoCs on-chip SDHI host controller support"
depends on RMOBILE
depends on ARCH_RMOBILE help Support for the on-chip SDHI host controller on SuperH/Renesas ARM SoCs platform-- 2.11.0
On 05/13/2017 10:51 PM, Marek Vasut wrote:
The Kconfig entry depends on RMOBILE, but this was renamed to ARCH_RMOBILE in commit 1cc95f6e1b38 (ARM: Rmobile: Rename CONFIG_RMOBILE to CONFIG_ARCH_RMOBILE) . Fix this omission.
Signed-off-by: Marek Vasut marek.vasut+renesas@gmail.com Cc: Hiroyuki Yokoyama hiroyuki.yokoyama.vx@renesas.com Cc: Nobuhiro Iwamatsu iwamatsu@nigauri.org Cc: Jaehoon Chung jh80.chung@samsung.com
Reviewed-by: Jaehoon Chung jh80.chung@samsung.com
drivers/mmc/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index 6ac26dd137..b2d70a37bd 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -159,7 +159,7 @@ config MMC_OMAP36XX_PINS
config SH_SDHI bool "SuperH/Renesas ARM SoCs on-chip SDHI host controller support"
- depends on RMOBILE
- depends on ARCH_RMOBILE help Support for the on-chip SDHI host controller on SuperH/Renesas ARM SoCs platform
Hi, Jaehoon.
Could you pickup this patch series to your mmc repository, and PR to u-boot?
Best regards, Nobuhiro
2017-05-25 22:39 GMT+09:00 Jaehoon Chung jh80.chung@samsung.com:
On 05/13/2017 10:51 PM, Marek Vasut wrote:
The Kconfig entry depends on RMOBILE, but this was renamed to ARCH_RMOBILE in commit 1cc95f6e1b38 (ARM: Rmobile: Rename CONFIG_RMOBILE to CONFIG_ARCH_RMOBILE) . Fix this omission.
Signed-off-by: Marek Vasut marek.vasut+renesas@gmail.com Cc: Hiroyuki Yokoyama hiroyuki.yokoyama.vx@renesas.com Cc: Nobuhiro Iwamatsu iwamatsu@nigauri.org Cc: Jaehoon Chung jh80.chung@samsung.com
Reviewed-by: Jaehoon Chung jh80.chung@samsung.com
drivers/mmc/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index 6ac26dd137..b2d70a37bd 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -159,7 +159,7 @@ config MMC_OMAP36XX_PINS
config SH_SDHI bool "SuperH/Renesas ARM SoCs on-chip SDHI host controller support"
depends on RMOBILE
depends on ARCH_RMOBILE help Support for the on-chip SDHI host controller on SuperH/Renesas ARM SoCs platform
On 05/31/2017 07:59 AM, Nobuhiro Iwamatsu wrote:
Hi, Jaehoon.
Could you pickup this patch series to your mmc repository, and PR to u-boot?
Sure, I will pick this patch series. After that, i will do PR.. But i have sent the PR about a few days ago..but it doesn't accept yet.. After accepting it, i will resend PR.
Thanks!
Best Regards, Jaehoon Chung
Best regards, Nobuhiro
2017-05-25 22:39 GMT+09:00 Jaehoon Chung jh80.chung@samsung.com:
On 05/13/2017 10:51 PM, Marek Vasut wrote:
The Kconfig entry depends on RMOBILE, but this was renamed to ARCH_RMOBILE in commit 1cc95f6e1b38 (ARM: Rmobile: Rename CONFIG_RMOBILE to CONFIG_ARCH_RMOBILE) . Fix this omission.
Signed-off-by: Marek Vasut marek.vasut+renesas@gmail.com Cc: Hiroyuki Yokoyama hiroyuki.yokoyama.vx@renesas.com Cc: Nobuhiro Iwamatsu iwamatsu@nigauri.org Cc: Jaehoon Chung jh80.chung@samsung.com
Reviewed-by: Jaehoon Chung jh80.chung@samsung.com
drivers/mmc/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index 6ac26dd137..b2d70a37bd 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -159,7 +159,7 @@ config MMC_OMAP36XX_PINS
config SH_SDHI bool "SuperH/Renesas ARM SoCs on-chip SDHI host controller support"
depends on RMOBILE
depends on ARCH_RMOBILE help Support for the on-chip SDHI host controller on SuperH/Renesas ARM SoCs platform
Hi!
2017-05-31 11:06 GMT+09:00 Jaehoon Chung jh80.chung@samsung.com:
On 05/31/2017 07:59 AM, Nobuhiro Iwamatsu wrote:
Hi, Jaehoon.
Could you pickup this patch series to your mmc repository, and PR to u-boot?
Sure, I will pick this patch series. After that, i will do PR.. But i have sent the PR about a few days ago..but it doesn't accept yet.. After accepting it, i will resend PR.
I see. Thanks for your great work!
Thanks!
Best Regards, Jaehoon Chung
Best regards, Nobuhiro
Best regards, Nobuhiro
2017-05-25 22:39 GMT+09:00 Jaehoon Chung jh80.chung@samsung.com:
On 05/13/2017 10:51 PM, Marek Vasut wrote:
The Kconfig entry depends on RMOBILE, but this was renamed to ARCH_RMOBILE in commit 1cc95f6e1b38 (ARM: Rmobile: Rename CONFIG_RMOBILE to CONFIG_ARCH_RMOBILE) . Fix this omission.
Signed-off-by: Marek Vasut marek.vasut+renesas@gmail.com Cc: Hiroyuki Yokoyama hiroyuki.yokoyama.vx@renesas.com Cc: Nobuhiro Iwamatsu iwamatsu@nigauri.org Cc: Jaehoon Chung jh80.chung@samsung.com
Reviewed-by: Jaehoon Chung jh80.chung@samsung.com
drivers/mmc/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index 6ac26dd137..b2d70a37bd 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -159,7 +159,7 @@ config MMC_OMAP36XX_PINS
config SH_SDHI bool "SuperH/Renesas ARM SoCs on-chip SDHI host controller support"
depends on RMOBILE
depends on ARCH_RMOBILE help Support for the on-chip SDHI host controller on SuperH/Renesas ARM SoCs platform
On 05/31/2017 07:07 AM, Nobuhiro Iwamatsu wrote:
Hi!
2017-05-31 11:06 GMT+09:00 Jaehoon Chung jh80.chung@samsung.com:
On 05/31/2017 07:59 AM, Nobuhiro Iwamatsu wrote:
Hi, Jaehoon.
Could you pickup this patch series to your mmc repository, and PR to u-boot?
Sure, I will pick this patch series. After that, i will do PR.. But i have sent the PR about a few days ago..but it doesn't accept yet.. After accepting it, i will resend PR.
I see. Thanks for your great work!
Hi, any news ? RC1 is out and I don't see this in RC1 .
Hi,
On 2017년 06월 05일 20:57, Marek Vasut wrote:
On 05/31/2017 07:07 AM, Nobuhiro Iwamatsu wrote:
Hi!
2017-05-31 11:06 GMT+09:00 Jaehoon Chung jh80.chung@samsung.com:
On 05/31/2017 07:59 AM, Nobuhiro Iwamatsu wrote:
Hi, Jaehoon.
Could you pickup this patch series to your mmc repository, and PR to u-boot?
Sure, I will pick this patch series. After that, i will do PR.. But i have sent the PR about a few days ago..but it doesn't accept yet.. After accepting it, i will resend PR.
I see. Thanks for your great work!
Hi, any news ? RC1 is out and I don't see this in RC1 .
When i had tested the buildman, there are build error with [PATCH 3/5]
aarch64: + r8a7795_salvator-x +board/renesas/salvator-x/salvator-x.c: In function 'board_mmc_init': +board/renesas/salvator-x/salvator-x.c:196:7: error: 'SH_SDHI_QUIRK_64BIT_BUF' undeclared (first use in this function) + SH_SDHI_QUIRK_64BIT_BUF); + ^~~~~~~~~~~~~~~~~~~~~~~ +board/renesas/salvator-x/salvator-x.c:196:7: note: each undeclared identifier is reported only once for each function it appears in +make[2]: *** [board/renesas/salvator-x/salvator-x.o] Error 1 +make[1]: *** [board/renesas/salvator-x] Error 2 +make[1]: *** wait: No child processes. Stop. +make: *** [sub-make] Error 2
So i had sent the email about fixing it..i didn't check with latest u-boot. but at that time, i could not apply it with building error.
Best Regards, Jaehoon Chung
On 06/05/2017 03:11 PM, Jaehoon Chung wrote:
Hi,
Hi,
On 2017년 06월 05일 20:57, Marek Vasut wrote:
On 05/31/2017 07:07 AM, Nobuhiro Iwamatsu wrote:
Hi!
2017-05-31 11:06 GMT+09:00 Jaehoon Chung jh80.chung@samsung.com:
On 05/31/2017 07:59 AM, Nobuhiro Iwamatsu wrote:
Hi, Jaehoon.
Could you pickup this patch series to your mmc repository, and PR to u-boot?
Sure, I will pick this patch series. After that, i will do PR.. But i have sent the PR about a few days ago..but it doesn't accept yet.. After accepting it, i will resend PR.
I see. Thanks for your great work!
Hi, any news ? RC1 is out and I don't see this in RC1 .
When i had tested the buildman, there are build error with [PATCH 3/5]
aarch64: + r8a7795_salvator-x +board/renesas/salvator-x/salvator-x.c: In function 'board_mmc_init': +board/renesas/salvator-x/salvator-x.c:196:7: error: 'SH_SDHI_QUIRK_64BIT_BUF' undeclared (first use in this function)
SH_SDHI_QUIRK_64BIT_BUF);^~~~~~~~~~~~~~~~~~~~~~~+board/renesas/salvator-x/salvator-x.c:196:7: note: each undeclared identifier is reported only once for each function it appears in +make[2]: *** [board/renesas/salvator-x/salvator-x.o] Error 1 +make[1]: *** [board/renesas/salvator-x] Error 2 +make[1]: *** wait: No child processes. Stop. +make: *** [sub-make] Error 2
So i had sent the email about fixing it.
I didn't receive that email.
i didn't check with latest u-boot. but at that time, i could not apply it with building error.
Builds fine for me after applying all the patches on u-boot/master , commit dd31be21bf .
I guess what you see is that if you apply only 1/5 , the build will choke on issue which is already present. The fix is simple really, apply the patches in the order 2,3,4,5,1 and you won't trigger the issue and your build will pass. In fact, patch 3 adds the missing macro and thus fixes the issue which patch 1 triggers. I don't think this requires me to resubmit the patches with no changes in them. Then you can send PR.
Hi Marek,
On 06/05/2017 10:32 PM, Marek Vasut wrote:
On 06/05/2017 03:11 PM, Jaehoon Chung wrote:
Hi,
Hi,
On 2017년 06월 05일 20:57, Marek Vasut wrote:
On 05/31/2017 07:07 AM, Nobuhiro Iwamatsu wrote:
Hi!
2017-05-31 11:06 GMT+09:00 Jaehoon Chung jh80.chung@samsung.com:
On 05/31/2017 07:59 AM, Nobuhiro Iwamatsu wrote:
Hi, Jaehoon.
Could you pickup this patch series to your mmc repository, and PR to u-boot?
Sure, I will pick this patch series. After that, i will do PR.. But i have sent the PR about a few days ago..but it doesn't accept yet.. After accepting it, i will resend PR.
I see. Thanks for your great work!
Hi, any news ? RC1 is out and I don't see this in RC1 .
When i had tested the buildman, there are build error with [PATCH 3/5]
aarch64: + r8a7795_salvator-x +board/renesas/salvator-x/salvator-x.c: In function 'board_mmc_init': +board/renesas/salvator-x/salvator-x.c:196:7: error: 'SH_SDHI_QUIRK_64BIT_BUF' undeclared (first use in this function)
SH_SDHI_QUIRK_64BIT_BUF);^~~~~~~~~~~~~~~~~~~~~~~+board/renesas/salvator-x/salvator-x.c:196:7: note: each undeclared identifier is reported only once for each function it appears in +make[2]: *** [board/renesas/salvator-x/salvator-x.o] Error 1 +make[1]: *** [board/renesas/salvator-x] Error 2 +make[1]: *** wait: No child processes. Stop. +make: *** [sub-make] Error 2
So i had sent the email about fixing it.
I didn't receive that email.
i didn't check with latest u-boot. but at that time, i could not apply it with building error.
Builds fine for me after applying all the patches on u-boot/master , commit dd31be21bf .
I guess what you see is that if you apply only 1/5 , the build will choke on issue which is already present. The fix is simple really, apply the patches in the order 2,3,4,5,1 and you won't trigger the issue and your build will pass. In fact, patch 3 adds the missing macro and thus fixes the issue which patch 1 triggers. I don't think this requires me to resubmit the patches with no changes in them. Then you can send PR.
Applied to u-boot-mmc after ordering 2,3,4,5,1. Will send PR. At that time, i will add you.
Best Regards, Jaehoon Chung
On 06/07/2017 05:29 AM, Jaehoon Chung wrote:
Hi Marek,
On 06/05/2017 10:32 PM, Marek Vasut wrote:
On 06/05/2017 03:11 PM, Jaehoon Chung wrote:
Hi,
Hi,
On 2017년 06월 05일 20:57, Marek Vasut wrote:
On 05/31/2017 07:07 AM, Nobuhiro Iwamatsu wrote:
Hi!
2017-05-31 11:06 GMT+09:00 Jaehoon Chung jh80.chung@samsung.com:
On 05/31/2017 07:59 AM, Nobuhiro Iwamatsu wrote: > Hi, Jaehoon. > > Could you pickup this patch series to your mmc repository, and PR to u-boot?
Sure, I will pick this patch series. After that, i will do PR.. But i have sent the PR about a few days ago..but it doesn't accept yet.. After accepting it, i will resend PR.
I see. Thanks for your great work!
Hi, any news ? RC1 is out and I don't see this in RC1 .
When i had tested the buildman, there are build error with [PATCH 3/5]
aarch64: + r8a7795_salvator-x +board/renesas/salvator-x/salvator-x.c: In function 'board_mmc_init': +board/renesas/salvator-x/salvator-x.c:196:7: error: 'SH_SDHI_QUIRK_64BIT_BUF' undeclared (first use in this function)
SH_SDHI_QUIRK_64BIT_BUF);^~~~~~~~~~~~~~~~~~~~~~~+board/renesas/salvator-x/salvator-x.c:196:7: note: each undeclared identifier is reported only once for each function it appears in +make[2]: *** [board/renesas/salvator-x/salvator-x.o] Error 1 +make[1]: *** [board/renesas/salvator-x] Error 2 +make[1]: *** wait: No child processes. Stop. +make: *** [sub-make] Error 2
So i had sent the email about fixing it.
I didn't receive that email.
i didn't check with latest u-boot. but at that time, i could not apply it with building error.
Builds fine for me after applying all the patches on u-boot/master , commit dd31be21bf .
I guess what you see is that if you apply only 1/5 , the build will choke on issue which is already present. The fix is simple really, apply the patches in the order 2,3,4,5,1 and you won't trigger the issue and your build will pass. In fact, patch 3 adds the missing macro and thus fixes the issue which patch 1 triggers. I don't think this requires me to resubmit the patches with no changes in them. Then you can send PR.
Applied to u-boot-mmc after ordering 2,3,4,5,1. Will send PR. At that time, i will add you.
Excellent, thanks.
participants (4)
-
Jaehoon Chung -
Jaehoon Chung -
Marek Vasut -
Nobuhiro Iwamatsu