[U-Boot] [PATCH v2 1/3] common: Display >=4GiB memory bank size
bd->bi_dram[] has both start address and size defined as 32-bit, which is not the case on some platforms where >=4GiB memory bank is used. Change them to support such memory banks.
Signed-off-by: Bin Meng bmeng.cn@gmail.com
---
Changes in v2: - Drop patches which are already applied - Change start to phys_addr_t - Change debug output to either %016llx or %08lx
common/board_f.c | 9 ++++++++- include/asm-generic/u-boot.h | 4 ++-- 2 files changed, 10 insertions(+), 3 deletions(-)
diff --git a/common/board_f.c b/common/board_f.c index 6d922b8..eb24f6c 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -206,7 +206,14 @@ static int show_dram_config(void) debug("\nRAM Configuration:\n"); for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) { size += gd->bd->bi_dram[i].size; - debug("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start); + + if (gd->bd->bi_dram[i].start >= 0x100000000ULL) { + debug("Bank #%d: %016llx ", i, + (unsigned long long)(gd->bd->bi_dram[i].start)); + } else { + debug("Bank #%d: %08lx ", i, + (unsigned long)(gd->bd->bi_dram[i].start)); + } #ifdef DEBUG print_size(gd->bd->bi_dram[i].size, "\n"); #endif diff --git a/include/asm-generic/u-boot.h b/include/asm-generic/u-boot.h index c918049..9f3351d 100644 --- a/include/asm-generic/u-boot.h +++ b/include/asm-generic/u-boot.h @@ -130,8 +130,8 @@ typedef struct bd_info { ulong bi_boot_params; /* where this board expects params */ #ifdef CONFIG_NR_DRAM_BANKS struct { /* RAM configuration */ - ulong start; - ulong size; + phys_addr_t start; + phys_size_t size; } bi_dram[CONFIG_NR_DRAM_BANKS]; #endif /* CONFIG_NR_DRAM_BANKS */ } bd_t;
Remove DEBUG in drivers/pci/pci_compat.c.
Signed-off-by: Bin Meng bmeng.cn@gmail.com
---
Changes in v2: - New patch to remove DEBUG from pci_compat.c
drivers/pci/pci_compat.c | 1 - 1 file changed, 1 deletion(-)
diff --git a/drivers/pci/pci_compat.c b/drivers/pci/pci_compat.c index 05c3510..712c48f 100644 --- a/drivers/pci/pci_compat.c +++ b/drivers/pci/pci_compat.c @@ -5,7 +5,6 @@ * * SPDX-License-Identifier: GPL-2.0+ */ -#define DEBUG #include <common.h> #include <dm.h> #include <errno.h>
On 2 August 2015 at 21:33, Bin Meng bmeng.cn@gmail.com wrote:
Remove DEBUG in drivers/pci/pci_compat.c.
Signed-off-by: Bin Meng bmeng.cn@gmail.com
Changes in v2:
- New patch to remove DEBUG from pci_compat.c
drivers/pci/pci_compat.c | 1 - 1 file changed, 1 deletion(-)
Acked-by: Simon Glass sjg@chromium.org
On 5 August 2015 at 08:40, Simon Glass sjg@chromium.org wrote:
On 2 August 2015 at 21:33, Bin Meng bmeng.cn@gmail.com wrote:
Remove DEBUG in drivers/pci/pci_compat.c.
Signed-off-by: Bin Meng bmeng.cn@gmail.com
Changes in v2:
- New patch to remove DEBUG from pci_compat.c
drivers/pci/pci_compat.c | 1 - 1 file changed, 1 deletion(-)
Acked-by: Simon Glass sjg@chromium.org
Applied to u-boot-x86, thanks!
Document the development flow on figuring out PIRQ information during the U-Boot porting.
Signed-off-by: Bin Meng bmeng.cn@gmail.com
---
Changes in v2: - New patch to document how to write PIRQ information in the device tree
doc/README.x86 | 41 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+)
diff --git a/doc/README.x86 b/doc/README.x86 index 00b3ed0..af2459c 100644 --- a/doc/README.x86 +++ b/doc/README.x86 @@ -668,6 +668,46 @@ boot progress. This can be good for debugging. If not, you can try to get serial working as early as possible. The early debug serial port may be useful here. See setup_early_uart() for an example.
+During the U-Boot porting, one of the important steps is to write correct PIRQ +routing information in the board device tree. Without it, device drivers in the +Linux kernel won't function correctly due to interrupt is not working. Please +refer to U-Boot doc [14] for the device tree bindings of Intel interrupt router. +Here we have more details on the intel,pirq-routing property below. + + intel,pirq-routing = < + PCI_BDF(0, 2, 0) INTA PIRQA + ... + >; + +As you see each entry has 3 cells. For the first one, we need describe all pci +devices mounted on the board. For SoC devices, normally there is a chapter on +the chipset datasheet which lists all the available PCI devices. For example on +Bay Trail, this is chapter 4.3 (PCI configuration space). For the second one, we +can get the interrupt pin either from datasheet or hardware via U-Boot shell. +The reliable source is the hardware as sometimes chipset datasheet is not 100% +up-to-date. Type 'pci header' plus the device's pci bus/device/function number +from U-Boot shell below. + + => pci header 0.1e.1 + vendor ID = 0x8086 + device ID = 0x0f08 + ... + interrupt line = 0x09 + interrupt pin = 0x04 + ... + +It shows this PCI device is using INTD pin as it reports 4 in the interrupt pin +register. Repeat this until you get interrupt pins for all the devices. The last +cell is the PIRQ line which a particular interrupt pin is mapped to. On Intel +chipset, the power-up default mapping is INTA/B/C/D maps to PIRQA/B/C/D. This +can be changed by registers in LPC bridge. So far Intel FSP does not touch those +registers so we can write down the PIRQ according to the default mapping rule. + +Once we get the PIRQ routing information in the device tree, the interrupt +allocation and assignment will be done by U-Boot automatically. Now you can +enable CONFIG_GENERATE_PIRQ_TABLE for testing Linux kernel using i8259 PIC and +CONFIG_GENERATE_MP_TABLE for testing Linux kernel using local APIC and I/O APIC. + TODO List --------- - Audio @@ -689,3 +729,4 @@ References [11] https://en.wikipedia.org/wiki/GUID_Partition_Table [12] http://events.linuxfoundation.org/sites/events/files/slides/chromeos_and_diy... [13] http://events.linuxfoundation.org/sites/events/files/slides/elce-2014.pdf +[14] doc/device-tree-bindings/misc/intel,irq-router.txt
On 2 August 2015 at 21:33, Bin Meng bmeng.cn@gmail.com wrote:
Document the development flow on figuring out PIRQ information during the U-Boot porting.
Signed-off-by: Bin Meng bmeng.cn@gmail.com
Changes in v2:
- New patch to document how to write PIRQ information in the device tree
doc/README.x86 | 41 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+)
Excellent. Thanks.
Acked-by: Simon Glass sjg@chromium.org
On 5 August 2015 at 08:40, Simon Glass sjg@chromium.org wrote:
On 2 August 2015 at 21:33, Bin Meng bmeng.cn@gmail.com wrote:
Document the development flow on figuring out PIRQ information during the U-Boot porting.
Signed-off-by: Bin Meng bmeng.cn@gmail.com
Changes in v2:
- New patch to document how to write PIRQ information in the device tree
doc/README.x86 | 41 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+)
Excellent. Thanks.
Acked-by: Simon Glass sjg@chromium.org
Applied to u-boot-x86, thanks!
On 2 August 2015 at 21:33, Bin Meng bmeng.cn@gmail.com wrote:
bd->bi_dram[] has both start address and size defined as 32-bit, which is not the case on some platforms where >=4GiB memory bank is used. Change them to support such memory banks.
Signed-off-by: Bin Meng bmeng.cn@gmail.com
Changes in v2:
- Drop patches which are already applied
- Change start to phys_addr_t
- Change debug output to either %016llx or %08lx
common/board_f.c | 9 ++++++++- include/asm-generic/u-boot.h | 4 ++-- 2 files changed, 10 insertions(+), 3 deletions(-)
Acked-by: Simon Glass sjg@chromium.org
Hi Bin,
On 5 August 2015 at 08:38, Simon Glass sjg@chromium.org wrote:
On 2 August 2015 at 21:33, Bin Meng bmeng.cn@gmail.com wrote:
bd->bi_dram[] has both start address and size defined as 32-bit, which is not the case on some platforms where >=4GiB memory bank is used. Change them to support such memory banks.
Signed-off-by: Bin Meng bmeng.cn@gmail.com
Changes in v2:
- Drop patches which are already applied
- Change start to phys_addr_t
- Change debug output to either %016llx or %08lx
common/board_f.c | 9 ++++++++- include/asm-generic/u-boot.h | 4 ++-- 2 files changed, 10 insertions(+), 3 deletions(-)
Acked-by: Simon Glass sjg@chromium.org
Unfortunately this one gives an error with grasshopper:
buildman grasshopper boards.cfg is up to date. Nothing to do. Building current source for 1 boards (1 thread, 32 jobs per thread) avr32: + grasshopper +common/board_f.c: In function 'show_dram_config': +common/board_f.c:211: warning: comparison is always false due to limited range of data type
Can you please take a look?
Regards, Simon
participants (2)
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Bin Meng -
Simon Glass