An ADATA 16GB Industrial MLC card has so much capacitance on the Vcc pin that the usual toggling of regulator to power the card off and on is insufficient. When the card is calibrated into UHS SDR104 mode, it will remain in that mode across the power cycle and subsequent attempt to communicate with the card will fail.

The test with this card is to insert it into an SDHI slot and perform "mmc dev 0 ; mmc dev 0", where the second "mmc dev 0" will fail.

Fix this problem by increasing the off-on delay from 0 to 20 mS.

Signed-off-by: Marek Vasut marek.vasut+renesas@gmail.com Cc: Nobuhiro Iwamatsu iwamatsu@nigauri.org --- arch/arm/dts/r8a7795-h3ulcb-u-boot.dts | 4 ++++ arch/arm/dts/r8a7795-salvator-x-u-boot.dts | 8 ++++++++ arch/arm/dts/r8a7796-m3ulcb-u-boot.dts | 4 ++++ arch/arm/dts/r8a7796-salvator-x-u-boot.dts | 8 ++++++++ arch/arm/dts/r8a77965-salvator-x-u-boot.dts | 8 ++++++++ arch/arm/dts/r8a77990-ebisu-u-boot.dts | 2 ++ 6 files changed, 34 insertions(+)

diff --git a/arch/arm/dts/r8a7795-h3ulcb-u-boot.dts b/arch/arm/dts/r8a7795-h3ulcb-u-boot.dts index 4f5410f1e8..3c8b011b3f 100644 --- a/arch/arm/dts/r8a7795-h3ulcb-u-boot.dts +++ b/arch/arm/dts/r8a7795-h3ulcb-u-boot.dts @@ -19,6 +19,10 @@ }; };

+&vcc_sdhi0 { + u-boot,off-on-delay-us = <20000>; +}; + &sdhi2_pins { groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds"; power-source = <1800>; diff --git a/arch/arm/dts/r8a7795-salvator-x-u-boot.dts b/arch/arm/dts/r8a7795-salvator-x-u-boot.dts index 8ad21ca4f9..8e08e05cf2 100644 --- a/arch/arm/dts/r8a7795-salvator-x-u-boot.dts +++ b/arch/arm/dts/r8a7795-salvator-x-u-boot.dts @@ -8,6 +8,14 @@ #include "r8a7795-salvator-x.dts" #include "r8a7795-u-boot.dtsi"

+&vcc_sdhi0 { + u-boot,off-on-delay-us = <20000>; +}; + +&vcc_sdhi3 { + u-boot,off-on-delay-us = <20000>; +}; + &sdhi2_pins { groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds"; power-source = <1800>; diff --git a/arch/arm/dts/r8a7796-m3ulcb-u-boot.dts b/arch/arm/dts/r8a7796-m3ulcb-u-boot.dts index 843be4b67e..dd9e518ac7 100644 --- a/arch/arm/dts/r8a7796-m3ulcb-u-boot.dts +++ b/arch/arm/dts/r8a7796-m3ulcb-u-boot.dts @@ -19,6 +19,10 @@ }; };

+&vcc_sdhi0 { + u-boot,off-on-delay-us = <20000>; +}; + &sdhi2_pins { groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds"; power-source = <1800>; diff --git a/arch/arm/dts/r8a7796-salvator-x-u-boot.dts b/arch/arm/dts/r8a7796-salvator-x-u-boot.dts index 7614a810b6..be657a9f07 100644 --- a/arch/arm/dts/r8a7796-salvator-x-u-boot.dts +++ b/arch/arm/dts/r8a7796-salvator-x-u-boot.dts @@ -8,6 +8,14 @@ #include "r8a7796-salvator-x.dts" #include "r8a7796-u-boot.dtsi"

+&vcc_sdhi0 { + u-boot,off-on-delay-us = <20000>; +}; + +&vcc_sdhi3 { + u-boot,off-on-delay-us = <20000>; +}; + &sdhi2_pins { groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds"; power-source = <1800>; diff --git a/arch/arm/dts/r8a77965-salvator-x-u-boot.dts b/arch/arm/dts/r8a77965-salvator-x-u-boot.dts index bd32a25409..efa122203e 100644 --- a/arch/arm/dts/r8a77965-salvator-x-u-boot.dts +++ b/arch/arm/dts/r8a77965-salvator-x-u-boot.dts @@ -8,6 +8,14 @@ #include "r8a77965-salvator-x.dts" #include "r8a77965-u-boot.dtsi"

+&vcc_sdhi0 { + u-boot,off-on-delay-us = <20000>; +}; + +&vcc_sdhi3 { + u-boot,off-on-delay-us = <20000>; +}; + &sdhi2_pins { groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds"; power-source = <1800>; diff --git a/arch/arm/dts/r8a77990-ebisu-u-boot.dts b/arch/arm/dts/r8a77990-ebisu-u-boot.dts index e31b602630..27cfdab22c 100644 --- a/arch/arm/dts/r8a77990-ebisu-u-boot.dts +++ b/arch/arm/dts/r8a77990-ebisu-u-boot.dts @@ -36,6 +36,7 @@

gpio = <&gpio5 17 GPIO_ACTIVE_HIGH>; enable-active-high; + u-boot,off-on-delay-us = <20000>; };

vccq_sdhi0: regulator-vccq-sdhi0 { @@ -60,6 +61,7 @@

gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>; enable-active-high; + u-boot,off-on-delay-us = <20000>; };

vccq_sdhi1: regulator-vccq-sdhi1 {