[U-Boot] Please pull u-boot-sunxi master
Hi Tom,
Here is the first sunxi pull-req for v2016.09, the big one here is Chen-Yu's PSCI cleanup, this also touches non sunxi specific files but it seemed best to me merge this through the sunxi tree.
Besides this, it contains a h3 ethernet driver, a few misc. fixes and 1 new board.
Note I'm going on vacation for 2 weeks starting coming Monday, so I won't be available for any (quick) followup in case of any problems with the PSCI support. If there are problems, then please contact Chen-Yu (in the Cc) directly.
The following changes since commit 3a592a1349ac3961b0f4f2db0a8d9f128225d897:
Revert "armv8: Enable CPUECTLR.SMPEN for coherency" (2016-07-14 17:36:18 -0400)
are available in the git repository at:
http://git.denx.de/u-boot-sunxi.git master
for you to fetch changes up to b7073965a343fca2bcde4195fbba664c98f309d8:
ARM: PSCI: Make psci_get_cpu_stack_top local to armv7/psci.S (2016-07-15 15:54:58 +0200)
---------------------------------------------------------------- Amit Singh Tomar (1): net: Add EMAC driver for H3/A83T/A64 SoCs.
Bernhard Nortmann (1): sunxi: FEL - Add the ability to recognize and auto-import uEnv-style data
Chen-Yu Tsai (15): ARM: PSCI: Split out common stack setup code from psci_arch_init sunxi: Move remaining PSCI assembly code to C sunxi: Add missing CONFIG_ARMV7_PSCI_NR_CPUS for sun7i ARM: Page align secure section only when it is executed in situ ARM: PSCI: Add missing CONFIG_ARMV7_PSCI_NR_CPUS for PSCI enabled platforms ARM: Add an empty secure stack section ARM: PSCI: Allocate PSCI stack in secure stack section ARM: PSCI: Remove unused psci_text_end symbol ARM: Add CONFIG_ARMV7_SECURE_MAX_SIZE and check size of secure section sunxi: Define CONFIG_ARMV7_SECURE_MAX_SIZE for sun6i/sun7i ARM: Move __secure definition to common asm/secure.h ARM: Add secure section for initialized data ARM: PSCI: Add helper functions to access per-CPU target PC storage ARM: PSCI: Switch to per-CPU target PC storage in secure data section ARM: PSCI: Make psci_get_cpu_stack_top local to armv7/psci.S
Hans de Goede (6): sunxi: Add support for multiple ethadrr-esses sunxi: Remove some unnecessary #ifdefs sunxi: Use BROM stored boot_media value to determine our boot-source sunxi: orangepi_pc: Add support for eMMC found on the Orange Pi PC Plus sunxi: Sync sun8i-h3-orangepi-plus.dts with upstream sunxi: Add defconfig and dts file for the Orange Pi Lite SBC
Siarhei Siamashka (1): sunxi: Support booting from SPI flash
Tobias Doerffel (1): sunxi: mmc: increase status register polling rate for data transfers
arch/arm/config.mk | 4 +- arch/arm/cpu/armv7/Makefile | 2 +- arch/arm/cpu/armv7/ls102xa/psci.S | 26 +- arch/arm/cpu/armv7/mx7/psci-mx7.c | 2 +- arch/arm/cpu/armv7/mx7/psci.S | 31 +- arch/arm/cpu/armv7/nonsec_virt.S | 7 +- arch/arm/cpu/armv7/psci-common.c | 39 ++ arch/arm/cpu/armv7/psci.S | 55 +- arch/arm/cpu/armv7/sunxi/Makefile | 1 - arch/arm/cpu/armv7/sunxi/psci.c | 9 +- arch/arm/cpu/armv7/sunxi/psci_head.S | 66 --- arch/arm/cpu/u-boot.lds | 60 +- arch/arm/dts/Makefile | 1 + arch/arm/dts/sun50i-a64-pine64-plus.dts | 13 + arch/arm/dts/sun50i-a64.dtsi | 33 ++ arch/arm/dts/sun8i-h3-orangepi-2.dts | 13 + arch/arm/dts/sun8i-h3-orangepi-lite.dts | 178 ++++++ arch/arm/dts/sun8i-h3-orangepi-pc.dts | 12 + arch/arm/dts/sun8i-h3-orangepi-plus.dts | 127 +---- arch/arm/dts/sun8i-h3.dtsi | 35 ++ arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 4 +- arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 3 +- arch/arm/include/asm/arch-sunxi/gpio.h | 3 + arch/arm/include/asm/arch-sunxi/mmc.h | 1 - arch/arm/include/asm/arch-sunxi/spl.h | 9 +- arch/arm/include/asm/armv7.h | 2 + arch/arm/include/asm/psci.h | 9 +- arch/arm/include/asm/secure.h | 3 + arch/arm/lib/sections.c | 2 + arch/arm/mach-sunxi/board.c | 29 +- arch/arm/mach-tegra/psci.S | 16 +- board/sunxi/MAINTAINERS | 1 + board/sunxi/board.c | 98 +++- common/spl/spl.c | 4 +- configs/orangepi_lite_defconfig | 15 + configs/orangepi_pc_defconfig | 3 + configs/pine64_plus_defconfig | 1 + drivers/mmc/sunxi_mmc.c | 27 +- drivers/mtd/spi/Kconfig | 12 + drivers/mtd/spi/Makefile | 1 + drivers/mtd/spi/sunxi_spi_spl.c | 283 +++++++++ drivers/net/Kconfig | 9 + drivers/net/Makefile | 1 + drivers/net/sun8i_emac.c | 789 ++++++++++++++++++++++++++ include/configs/jetson-tk1.h | 1 + include/configs/ls1021aqds.h | 1 + include/configs/ls1021atwr.h | 1 + include/configs/sun6i.h | 1 + include/configs/sun7i.h | 2 + include/configs/sunxi-common.h | 5 + 50 files changed, 1716 insertions(+), 334 deletions(-) create mode 100644 arch/arm/cpu/armv7/psci-common.c delete mode 100644 arch/arm/cpu/armv7/sunxi/psci_head.S create mode 100644 arch/arm/dts/sun8i-h3-orangepi-lite.dts create mode 100644 configs/orangepi_lite_defconfig create mode 100644 drivers/mtd/spi/sunxi_spi_spl.c create mode 100644 drivers/net/sun8i_emac.c
Regards,
Hans
The code had assumed 4 CPUS before and now we have this configurable. For now, set this to the previous default.
Cc: Chander Kashyap k.chander@samsung.com Cc: Steve Rae steve.rae@raedomain.com Cc: Minkyu Kang mk7.kang@samsung.com Signed-off-by: Tom Rini trini@konsulko.com --- include/configs/arndale.h | 1 + include/configs/bcm_ep_board.h | 1 + include/configs/vexpress_ca15_tc2.h | 1 + 3 files changed, 3 insertions(+)
diff --git a/include/configs/arndale.h b/include/configs/arndale.h index b08f341..18e59fc 100644 --- a/include/configs/arndale.h +++ b/include/configs/arndale.h @@ -45,6 +45,7 @@
#define CONFIG_S5P_PA_SYSRAM 0x02020000 #define CONFIG_SMP_PEN_ADDR CONFIG_S5P_PA_SYSRAM +#define CONFIG_ARMV7_PSCI_NR_CPUS 4
/* The PERIPHBASE in the CBAR register is wrong on the Arndale, so override it */ #define CONFIG_ARM_GIC_BASE_ADDRESS 0x10480000 diff --git a/include/configs/bcm_ep_board.h b/include/configs/bcm_ep_board.h index d5888e8..50cd743 100644 --- a/include/configs/bcm_ep_board.h +++ b/include/configs/bcm_ep_board.h @@ -93,5 +93,6 @@ /* Misc utility code */ #define CONFIG_BOUNCE_BUFFER #define CONFIG_CRC32_VERIFY +#define CONFIG_ARMV7_PSCI_NR_CPUS 4
#endif /* __BCM_EP_BOARD_H */ diff --git a/include/configs/vexpress_ca15_tc2.h b/include/configs/vexpress_ca15_tc2.h index b509a9c..9583e8c 100644 --- a/include/configs/vexpress_ca15_tc2.h +++ b/include/configs/vexpress_ca15_tc2.h @@ -16,5 +16,6 @@
#define CONFIG_SYSFLAGS_ADDR 0x1c010030 #define CONFIG_SMP_PEN_ADDR CONFIG_SYSFLAGS_ADDR +#define CONFIG_ARMV7_PSCI_NR_CPUS 4
#endif
Hi,
On 15-07-16 21:32, Tom Rini wrote:
The code had assumed 4 CPUS before and now we have this configurable. For now, set this to the previous default.
Cc: Chander Kashyap k.chander@samsung.com Cc: Steve Rae steve.rae@raedomain.com Cc: Minkyu Kang mk7.kang@samsung.com Signed-off-by: Tom Rini trini@konsulko.com
Looks good to me:
Reviewed-by: Hans de Goede hdegoede@redhat.com
Regards,
Hans
include/configs/arndale.h | 1 + include/configs/bcm_ep_board.h | 1 + include/configs/vexpress_ca15_tc2.h | 1 + 3 files changed, 3 insertions(+)
diff --git a/include/configs/arndale.h b/include/configs/arndale.h index b08f341..18e59fc 100644 --- a/include/configs/arndale.h +++ b/include/configs/arndale.h @@ -45,6 +45,7 @@
#define CONFIG_S5P_PA_SYSRAM 0x02020000 #define CONFIG_SMP_PEN_ADDR CONFIG_S5P_PA_SYSRAM +#define CONFIG_ARMV7_PSCI_NR_CPUS 4
/* The PERIPHBASE in the CBAR register is wrong on the Arndale, so override it */ #define CONFIG_ARM_GIC_BASE_ADDRESS 0x10480000 diff --git a/include/configs/bcm_ep_board.h b/include/configs/bcm_ep_board.h index d5888e8..50cd743 100644 --- a/include/configs/bcm_ep_board.h +++ b/include/configs/bcm_ep_board.h @@ -93,5 +93,6 @@ /* Misc utility code */ #define CONFIG_BOUNCE_BUFFER #define CONFIG_CRC32_VERIFY +#define CONFIG_ARMV7_PSCI_NR_CPUS 4
#endif /* __BCM_EP_BOARD_H */ diff --git a/include/configs/vexpress_ca15_tc2.h b/include/configs/vexpress_ca15_tc2.h index b509a9c..9583e8c 100644 --- a/include/configs/vexpress_ca15_tc2.h +++ b/include/configs/vexpress_ca15_tc2.h @@ -16,5 +16,6 @@
#define CONFIG_SYSFLAGS_ADDR 0x1c010030 #define CONFIG_SMP_PEN_ADDR CONFIG_SYSFLAGS_ADDR +#define CONFIG_ARMV7_PSCI_NR_CPUS 4
#endif
On Fri, Jul 15, 2016 at 03:32:39PM -0400, Tom Rini wrote:
The code had assumed 4 CPUS before and now we have this configurable. For now, set this to the previous default.
Cc: Chander Kashyap k.chander@samsung.com Cc: Steve Rae steve.rae@raedomain.com Cc: Minkyu Kang mk7.kang@samsung.com Signed-off-by: Tom Rini trini@konsulko.com
Applied to u-boot/master, thanks!
On Fri, Jul 15, 2016 at 04:29:28PM +0200, Hans de Goede wrote:
Hi Tom,
Here is the first sunxi pull-req for v2016.09, the big one here is Chen-Yu's PSCI cleanup, this also touches non sunxi specific files but it seemed best to me merge this through the sunxi tree.
Besides this, it contains a h3 ethernet driver, a few misc. fixes and 1 new board.
Note I'm going on vacation for 2 weeks starting coming Monday, so I won't be available for any (quick) followup in case of any problems with the PSCI support. If there are problems, then please contact Chen-Yu (in the Cc) directly.
The following changes since commit 3a592a1349ac3961b0f4f2db0a8d9f128225d897:
Revert "armv8: Enable CPUECTLR.SMPEN for coherency" (2016-07-14 17:36:18 -0400)
are available in the git repository at:
http://git.denx.de/u-boot-sunxi.git master
for you to fetch changes up to b7073965a343fca2bcde4195fbba664c98f309d8:
ARM: PSCI: Make psci_get_cpu_stack_top local to armv7/psci.S (2016-07-15 15:54:58 +0200)
Applied to u-boot/master, thanks!
But please note: +(pine64_plus) himport_r(&env_htab, (char *)spl->fel_script_address, +(pine64_plus) ^ w+(pine64_plus) ../board/sunxi/board.c: In function ‘parse_spl_header’: w+(pine64_plus) ../board/sunxi/board.c:601:24: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
It's not obvious to me what's going on in what's passed over to us in this case when it is a 64bit target, so I'm just going to allow the warning for now.
Am 16.07.2016 um 15:52 schrieb Tom Rini:
+(pine64_plus) himport_r(&env_htab, (char *)spl->fel_script_address, +(pine64_plus) ^ w+(pine64_plus) ../board/sunxi/board.c: In function ‘parse_spl_header’: w+(pine64_plus) ../board/sunxi/board.c:601:24: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
It's not obvious to me what's going on in what's passed over to us in this case when it is a 64bit target, so I'm just going to allow the warning for now.
Sounds like trying to cast int to char*, which requires inserting a uintptr_t cast first.
Regards, Andreas
On Sat, Jul 16, 2016 at 07:54:35PM +0200, Andreas Färber wrote:
Am 16.07.2016 um 15:52 schrieb Tom Rini:
+(pine64_plus) himport_r(&env_htab, (char *)spl->fel_script_address, +(pine64_plus) ^ w+(pine64_plus) ../board/sunxi/board.c: In function ‘parse_spl_header’: w+(pine64_plus) ../board/sunxi/board.c:601:24: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
It's not obvious to me what's going on in what's passed over to us in this case when it is a 64bit target, so I'm just going to allow the warning for now.
Sounds like trying to cast int to char*, which requires inserting a uintptr_t cast first.
Yes, but the question I had is, can we really say that fel_script_address is a uint32_t on 64bit platforms?
participants (3)
-
Andreas Färber -
Hans de Goede -
Tom Rini