[U-Boot] [PATCH] mx27: add function enable_caches
Signed-off-by: Philippe Reynes tremyfr@yahoo.fr --- arch/arm/cpu/arm926ejs/mx27/generic.c | 6 ++++++ 1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mx27/generic.c b/arch/arm/cpu/arm926ejs/mx27/generic.c index 41bb84b..4239fa0 100644 --- a/arch/arm/cpu/arm926ejs/mx27/generic.c +++ b/arch/arm/cpu/arm926ejs/mx27/generic.c @@ -380,3 +380,9 @@ void mx27_sd2_init_pins(void)
} #endif /* CONFIG_MXC_MMC */ + +void enable_caches(void) +{ + /* Enable D-cache. I-cache is already enabled in start.S */ + dcache_enable(); +}
Signed-off-by: Eric Jarrige eric.jarrige@armadeus.org --- arch/arm/cpu/arm926ejs/mx27/generic.c | 2 ++ arch/arm/include/asm/arch-mx27/clock.h | 1 + 2 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mx27/generic.c b/arch/arm/cpu/arm926ejs/mx27/generic.c index 4239fa0..25e1250 100644 --- a/arch/arm/cpu/arm926ejs/mx27/generic.c +++ b/arch/arm/cpu/arm926ejs/mx27/generic.c @@ -159,6 +159,8 @@ unsigned int mxc_get_clock(enum mxc_clock clk) switch (clk) { case MXC_ARM_CLK: return imx_get_armclk(); + case MXC_I2C_CLK: + return imx_get_ahbclk()/2; case MXC_UART_CLK: return imx_get_perclk1(); case MXC_FEC_CLK: diff --git a/arch/arm/include/asm/arch-mx27/clock.h b/arch/arm/include/asm/arch-mx27/clock.h index fd062d3..2b03a41 100644 --- a/arch/arm/include/asm/arch-mx27/clock.h +++ b/arch/arm/include/asm/arch-mx27/clock.h @@ -26,6 +26,7 @@
enum mxc_clock { MXC_ARM_CLK, + MXC_I2C_CLK, MXC_UART_CLK, MXC_ESDHC_CLK, MXC_FEC_CLK,
Add some missing constant (chip select, ...)
Signed-off-by: Philippe Reynes tremyfr@yahoo.fr Signed-off-by: Eric Jarrige eric.jarrige@armadeus.org --- arch/arm/cpu/arm926ejs/mx27/asm-offsets.c | 5 +++++ arch/arm/include/asm/arch-mx27/imx-regs.h | 3 ++- 2 files changed, 7 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c b/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c index f3a8d7b..215c562 100644 --- a/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c +++ b/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c @@ -41,5 +41,10 @@ int main(void) DEFINE(ESDCFG1_ROF, offsetof(struct esdramc_regs, esdcfg1)); DEFINE(ESDMISC_ROF, offsetof(struct esdramc_regs, esdmisc));
+ DEFINE(GPCR, IMX_SYSTEM_CTL_BASE + + offsetof(struct system_control_regs, gpcr)); + DEFINE(FMCR, IMX_SYSTEM_CTL_BASE + + offsetof(struct system_control_regs, fmcr)); + return 0; } diff --git a/arch/arm/include/asm/arch-mx27/imx-regs.h b/arch/arm/include/asm/arch-mx27/imx-regs.h index 8867e9f..707ca4b 100644 --- a/arch/arm/include/asm/arch-mx27/imx-regs.h +++ b/arch/arm/include/asm/arch-mx27/imx-regs.h @@ -185,7 +185,7 @@ struct iim_regs { struct fuse_bank { u32 fuse_regs[0x20]; u32 fuse_rsvd[0xe0]; - } bank[1]; + } bank[2]; };
struct fuse_bank0_regs { @@ -225,6 +225,7 @@ struct fuse_bank0_regs { #define IIM_BASE_ADDR IMX_IIM_BASE #define IMX_FEC_BASE (0x2b000 + IMX_IO_BASE)
+#define IMX_NFC_BASE (0xD8000000) #define IMX_ESD_BASE (0xD8001000) #define IMX_WEIM_BASE (0xD8002000)
participants (1)
-
Philippe Reynes