At present there are only 8-bit and 32-bit read/write routines in the rtc uclass driver. This adds the 16-bit support.

Signed-off-by: Bin Meng bmeng.cn@gmail.com ---

drivers/rtc/rtc-uclass.c | 30 ++++++++++++++++++++++++++++++ include/rtc.h | 20 ++++++++++++++++++++ 2 files changed, 50 insertions(+)

diff --git a/drivers/rtc/rtc-uclass.c b/drivers/rtc/rtc-uclass.c index 300e9b3..89312c5 100644 --- a/drivers/rtc/rtc-uclass.c +++ b/drivers/rtc/rtc-uclass.c @@ -60,6 +60,36 @@ int rtc_write8(struct udevice *dev, unsigned int reg, int val) return ops->write8(dev, reg, val); }

+int rtc_read16(struct udevice *dev, unsigned int reg, u16 *valuep) +{ + u16 value = 0; + int ret; + int i; + + for (i = 0; i < sizeof(value); i++) { + ret = rtc_read8(dev, reg + i); + if (ret < 0) + return ret; + value |= ret << (i << 3); + } + + *valuep = value; + return 0; +} + +int rtc_write16(struct udevice *dev, unsigned int reg, u16 value) +{ + int i, ret; + + for (i = 0; i < sizeof(value); i++) { + ret = rtc_write8(dev, reg + i, (value >> (i << 3)) & 0xff); + if (ret) + return ret; + } + + return 0; +} + int rtc_read32(struct udevice *dev, unsigned int reg, u32 *valuep) { u32 value = 0; diff --git a/include/rtc.h b/include/rtc.h index 69fe8d4..49142b6 100644 --- a/include/rtc.h +++ b/include/rtc.h @@ -128,6 +128,26 @@ int rtc_read8(struct udevice *dev, unsigned int reg); int rtc_write8(struct udevice *dev, unsigned int reg, int val);

/** + * rtc_read16() - Read a 16-bit value from the RTC + * + * @dev: Device to read from + * @reg: Offset to start reading from + * @valuep: Place to put the value that is read + * @return 0 if OK, -ve on error + */ +int rtc_read16(struct udevice *dev, unsigned int reg, u16 *valuep); + +/** + * rtc_write16() - Write a 16-bit value to the RTC + * + * @dev: Device to write to + * @reg: Register to start writing to + * @value: Value to write + * @return 0 if OK, -ve on error + */ +int rtc_write16(struct udevice *dev, unsigned int reg, u16 value); + +/** * rtc_read32() - Read a 32-bit value from the RTC * * @dev: Device to read from

This adds a wake up stub before jumping to OS wake up vector.

Signed-off-by: Bin Meng bmeng.cn@gmail.com ---

arch/x86/cpu/Makefile | 1 + arch/x86/cpu/wakeup.S | 79 ++++++++++++++++++++++++++++++++++++++++++ arch/x86/include/asm/acpi_s3.h | 9 +++++ 3 files changed, 89 insertions(+) create mode 100644 arch/x86/cpu/wakeup.S

diff --git a/arch/x86/cpu/Makefile b/arch/x86/cpu/Makefile index 92a9023..e1c84ce 100644 --- a/arch/x86/cpu/Makefile +++ b/arch/x86/cpu/Makefile @@ -45,6 +45,7 @@ ifndef CONFIG_$(SPL_)X86_64 obj-$(CONFIG_SMP) += sipi_vector.o endif obj-y += turbo.o +obj-$(CONFIG_HAVE_ACPI_RESUME) += wakeup.o

ifeq ($(CONFIG_$(SPL_)X86_64),y) obj-y += x86_64/ diff --git a/arch/x86/cpu/wakeup.S b/arch/x86/cpu/wakeup.S new file mode 100644 index 0000000..97b1c21 --- /dev/null +++ b/arch/x86/cpu/wakeup.S @@ -0,0 +1,79 @@ +/* + * Copyright (C) 2017, Bin Meng bmeng.cn@gmail.com + * + * From coreboot src/arch/x86/wakeup.S + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <asm/acpi_s3.h> +#include <asm/processor.h> +#include <asm/processor-flags.h> + +#define RELOCATED(x) (x - __wakeup + WAKEUP_BASE) + +#define CODE_SEG (X86_GDT_ENTRY_16BIT_CS * X86_GDT_ENTRY_SIZE) +#define DATA_SEG (X86_GDT_ENTRY_16BIT_DS * X86_GDT_ENTRY_SIZE) + + .code32 + .globl __wakeup +__wakeup: + /* First prepare the jmp to the resume vector */ + mov 0x4(%esp), %eax /* vector */ + /* last 4 bits of linear addr are taken as offset */ + andw $0x0f, %ax + movw %ax, (__wakeup_offset) + mov 0x4(%esp), %eax + /* the rest is taken as segment */ + shr $4, %eax + movw %ax, (__wakeup_segment) + + /* Activate the right segment descriptor real mode */ + ljmp $CODE_SEG, $RELOCATED(1f) +1: + /* 16 bit code from here on... */ + .code16 + + /* + * Load the segment registers w/ properly configured + * segment descriptors. They will retain these + * configurations (limits, writability, etc.) once + * protected mode is turned off. + */ + mov $DATA_SEG, %ax + mov %ax, %ds + mov %ax, %es + mov %ax, %fs + mov %ax, %gs + mov %ax, %ss + + /* Turn off protection */ + movl %cr0, %eax + andl $~X86_CR0_PE, %eax + movl %eax, %cr0 + + /* Now really going into real mode */ + ljmp $0, $RELOCATED(1f) +1: + movw $0x0, %ax + movw %ax, %ds + movw %ax, %es + movw %ax, %ss + movw %ax, %fs + movw %ax, %gs + + /* + * This is a FAR JMP to the OS waking vector. + * The C code changed the address to be correct. + */ + .byte 0xea + +__wakeup_offset = RELOCATED(.) + .word 0x0000 + +__wakeup_segment = RELOCATED(.) + .word 0x0000 + + .globl __wakeup_size +__wakeup_size: + .long . - __wakeup diff --git a/arch/x86/include/asm/acpi_s3.h b/arch/x86/include/asm/acpi_s3.h index c1cdbd0..f9d4739 100644 --- a/arch/x86/include/asm/acpi_s3.h +++ b/arch/x86/include/asm/acpi_s3.h @@ -7,6 +7,8 @@ #ifndef __ASM_ACPI_S3_H__ #define __ASM_ACPI_S3_H__

+#define WAKEUP_BASE 0x600 + /* PM1_STATUS register */ #define WAK_STS (1 << 15) #define PCIEXPWAK_STS (1 << 14) @@ -27,6 +29,11 @@ #define SLP_TYP_S4 6 #define SLP_TYP_S5 7

+#ifndef __ASSEMBLY__ + +extern char __wakeup[]; +extern int __wakeup_size; + enum acpi_sleep_state { ACPI_S0, ACPI_S1, @@ -93,4 +100,6 @@ enum acpi_sleep_state chipset_prev_sleep_state(void); */ void chipset_clear_sleep_state(void);

+#endif /* __ASSEMBLY__ */ + #endif /* __ASM_ACPI_S3_H__ */

This adds one API acpi_find_wakeup_vector() to locate OS wakeup vector from the ACPI FACS table, to be used in the S3 boot path.

Signed-off-by: Bin Meng bmeng.cn@gmail.com ---

arch/x86/include/asm/acpi_table.h | 1 + arch/x86/include/asm/tables.h | 1 + arch/x86/lib/acpi_table.c | 72 +++++++++++++++++++++++++++++++++++++++ 3 files changed, 74 insertions(+)

diff --git a/arch/x86/include/asm/acpi_table.h b/arch/x86/include/asm/acpi_table.h index bbd80a1..6cadd90 100644 --- a/arch/x86/include/asm/acpi_table.h +++ b/arch/x86/include/asm/acpi_table.h @@ -317,3 +317,4 @@ int acpi_create_madt_lapic_nmi(struct acpi_madt_lapic_nmi *lapic_nmi, u32 acpi_fill_madt(u32 current); void acpi_create_gnvs(struct acpi_global_nvs *gnvs); ulong write_acpi_tables(ulong start); +void *acpi_find_wakeup_vector(void); diff --git a/arch/x86/include/asm/tables.h b/arch/x86/include/asm/tables.h index d1b2388..9e8208b 100644 --- a/arch/x86/include/asm/tables.h +++ b/arch/x86/include/asm/tables.h @@ -15,6 +15,7 @@ * PIRQ routing table, Multi-Processor table and ACPI table. */ #define ROM_TABLE_ADDR 0xf0000 +#define ROM_TABLE_END 0xfffff

#define ROM_TABLE_ALIGN 1024

diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c index 355456d..f118345 100644 --- a/arch/x86/lib/acpi_table.c +++ b/arch/x86/lib/acpi_table.c @@ -438,3 +438,75 @@ ulong write_acpi_tables(ulong start)

return current; } + +static struct acpi_rsdp *acpi_valid_rsdp(struct acpi_rsdp *rsdp) +{ + if (strncmp((char *)rsdp, RSDP_SIG, sizeof(RSDP_SIG) - 1) != 0) + return NULL; + + debug("Looking on %p for valid checksum\n", rsdp); + + if (table_compute_checksum((void *)rsdp, 20) != 0) + return NULL; + debug("acpi rsdp checksum 1 passed\n"); + + if ((rsdp->revision > 1) && + (table_compute_checksum((void *)rsdp, rsdp->length) != 0)) + return NULL; + debug("acpi rsdp checksum 2 passed\n"); + + return rsdp; +} + +void *acpi_find_wakeup_vector(void) +{ + char *p, *end; + struct acpi_rsdp *rsdp = NULL; + struct acpi_rsdt *rsdt; + struct acpi_fadt *fadt = NULL; + struct acpi_facs *facs; + void *wake_vec; + int i; + + debug("Trying to find the wakeup vector...\n"); + + /* Find RSDP */ + for (p = (char *)ROM_TABLE_ADDR; p < (char *)ROM_TABLE_END; p += 16) { + rsdp = acpi_valid_rsdp((struct acpi_rsdp *)p); + if (rsdp) + break; + } + + if (rsdp == NULL) + return NULL; + + debug("RSDP found at %p\n", rsdp); + rsdt = (struct acpi_rsdt *)rsdp->rsdt_address; + + end = (char *)rsdt + rsdt->header.length; + debug("RSDT found at %p ends at %p\n", rsdt, end); + + for (i = 0; ((char *)&rsdt->entry[i]) < end; i++) { + fadt = (struct acpi_fadt *)rsdt->entry[i]; + if (strncmp((char *)fadt, "FACP", 4) == 0) + break; + fadt = NULL; + } + + if (fadt == NULL) + return NULL; + + debug("FADT found at %p\n", fadt); + facs = (struct acpi_facs *)fadt->firmware_ctrl; + + if (facs == NULL) { + debug("No FACS found, wake up from S3 not possible.\n"); + return NULL; + } + + debug("FACS found at %p\n", facs); + wake_vec = (void *)facs->firmware_waking_vector; + debug("OS waking vector is %p\n", wake_vec); + + return wake_vec; +}

In an S3 resume path, U-Boot does everything like a cold boot except in the last_stage_init() it jumps to the OS resume vector.

Signed-off-by: Bin Meng bmeng.cn@gmail.com ---

arch/x86/cpu/cpu.c | 8 ++++++++ arch/x86/include/asm/acpi_s3.h | 10 ++++++++++ arch/x86/lib/Makefile | 1 + arch/x86/lib/acpi_s3.c | 26 ++++++++++++++++++++++++++ 4 files changed, 45 insertions(+) create mode 100644 arch/x86/lib/acpi_s3.c

diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c index 9dde54c..afc8645 100644 --- a/arch/x86/cpu/cpu.c +++ b/arch/x86/cpu/cpu.c @@ -26,6 +26,7 @@ #include <malloc.h> #include <syscon.h> #include <asm/acpi_s3.h> +#include <asm/acpi_table.h> #include <asm/control_regs.h> #include <asm/coreboot_tables.h> #include <asm/cpu.h> @@ -204,6 +205,13 @@ __weak void board_final_cleanup(void)

int last_stage_init(void) { +#if CONFIG_HAVE_ACPI_RESUME + void *wake_vector = acpi_find_wakeup_vector(); + + if (wake_vector != NULL && gd->arch.prev_sleep_state == ACPI_S3) + acpi_resume(wake_vector); +#endif + write_tables();

board_final_cleanup(); diff --git a/arch/x86/include/asm/acpi_s3.h b/arch/x86/include/asm/acpi_s3.h index f9d4739..5892a8b 100644 --- a/arch/x86/include/asm/acpi_s3.h +++ b/arch/x86/include/asm/acpi_s3.h @@ -100,6 +100,16 @@ enum acpi_sleep_state chipset_prev_sleep_state(void); */ void chipset_clear_sleep_state(void);

+/** + * acpi_resume() - Do ACPI S3 resume + * + * This calls U-Boot wake up assembly stub and jumps to OS's wake up vector. + * + * @wake_vec: OS wake up vector + * @return: Never returns + */ +void acpi_resume(void *wake_vec); + #endif /* __ASSEMBLY__ */

#endif /* __ASM_ACPI_S3_H__ */ diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile index 1c2c085..c61f931 100644 --- a/arch/x86/lib/Makefile +++ b/arch/x86/lib/Makefile @@ -35,6 +35,7 @@ obj-$(CONFIG_X86_RAMTEST) += ramtest.o obj-y += sections.o obj-y += sfi.o obj-y += string.o +obj-$(CONFIG_HAVE_ACPI_RESUME) += acpi_s3.o ifndef CONFIG_QEMU obj-$(CONFIG_GENERATE_ACPI_TABLE) += acpi_table.o endif diff --git a/arch/x86/lib/acpi_s3.c b/arch/x86/lib/acpi_s3.c new file mode 100644 index 0000000..f679c06 --- /dev/null +++ b/arch/x86/lib/acpi_s3.c @@ -0,0 +1,26 @@ +/* + * Copyright (C) 2017, Bin Meng bmeng.cn@gmail.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/acpi_s3.h> +#include <asm/post.h> + +static void asmlinkage (*acpi_do_wakeup)(void *vector) = (void *)WAKEUP_BASE; + +static void acpi_jump_to_wakeup(void *vector) +{ + /* Copy wakeup trampoline in place */ + memcpy((void *)WAKEUP_BASE, __wakeup, __wakeup_size); + + printf("Jumping to OS waking vector %p\n", vector); + acpi_do_wakeup(vector); +} + +void acpi_resume(void *wake_vec) +{ + post_code(POST_OS_RESUME); + acpi_jump_to_wakeup(wake_vec); +}

This adds a library that provides CMOS (inside RTC SRAM) access at a very early stage when driver model is not available yet.

Signed-off-by: Bin Meng bmeng.cn@gmail.com ---

arch/x86/include/asm/early_cmos.h | 43 +++++++++++++++++++++++++++++++++ arch/x86/lib/Makefile | 1 + arch/x86/lib/early_cmos.c | 51 +++++++++++++++++++++++++++++++++++++++ 3 files changed, 95 insertions(+) create mode 100644 arch/x86/include/asm/early_cmos.h create mode 100644 arch/x86/lib/early_cmos.c

diff --git a/arch/x86/include/asm/early_cmos.h b/arch/x86/include/asm/early_cmos.h new file mode 100644 index 0000000..cd2634d --- /dev/null +++ b/arch/x86/include/asm/early_cmos.h @@ -0,0 +1,43 @@ +/* + * Copyright (C) 2017, Bin Meng bmeng.cn@gmail.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __EARLY_CMOS_H +#define __EARLY_CMOS_H + +/* CMOS actually resides in the RTC SRAM */ +#define CMOS_IO_PORT 0x70 + +/** + * cmos_read8() - Get 8-bit data stored at the given address + * + * This reads from CMOS for the 8-bit data stored at the given address. + * + * @addr: RTC SRAM address + * @return: 8-bit data stored at the given address + */ +u8 cmos_read8(u8 addr); + +/** + * cmos_read16() - Get 16-bit data stored at the given address + * + * This reads from CMOS for the 16-bit data stored at the given address. + * + * @addr: RTC SRAM address + * @return: 16-bit data stored at the given address + */ +u16 cmos_read16(u8 addr); + +/** + * cmos_read32() - Get 32-bit data stored at the given address + * + * This reads from CMOS for the 32-bit data stored at the given address. + * + * @addr: RTC SRAM address + * @return: 32-bit data stored at the given address + */ +u32 cmos_read32(u8 addr); + +#endif /* __EARLY_CMOS_H */ diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile index c61f931..cd4e976 100644 --- a/arch/x86/lib/Makefile +++ b/arch/x86/lib/Makefile @@ -15,6 +15,7 @@ obj-$(CONFIG_CMD_BOOTM) += bootm.o endif obj-y += cmd_boot.o obj-$(CONFIG_SEABIOS) += coreboot_table.o +obj-y += early_cmos.o obj-$(CONFIG_EFI) += efi/ obj-y += e820.o obj-y += gcc.o diff --git a/arch/x86/lib/early_cmos.c b/arch/x86/lib/early_cmos.c new file mode 100644 index 0000000..fa0b327 --- /dev/null +++ b/arch/x86/lib/early_cmos.c @@ -0,0 +1,51 @@ +/* + * Copyright (C) 2017, Bin Meng bmeng.cn@gmail.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/* + * This library provides CMOS (inside RTC SRAM) access routines at a very + * early stage when driver model is not available yet. Only read access is + * provided. The 16-bit/32-bit read are compatible with driver model RTC + * uclass write ops, that data is stored in little-endian mode. + */ + +#include <common.h> +#include <asm/early_cmos.h> +#include <asm/io.h> + +u8 cmos_read8(u8 addr) +{ + outb(addr, CMOS_IO_PORT); + + return inb(CMOS_IO_PORT + 1); +} + +u16 cmos_read16(u8 addr) +{ + u16 value = 0; + u16 data; + int i; + + for (i = 0; i < sizeof(value); i++) { + data = cmos_read8(addr + i); + value |= data << (i << 3); + } + + return value; +} + +u32 cmos_read32(u8 addr) +{ + u32 value = 0; + u32 data; + int i; + + for (i = 0; i < sizeof(value); i++) { + data = cmos_read8(addr + i); + value |= data << (i << 3); + } + + return value; +}

At the end of pre-relocation phase, save the new stack address to CMOS and use it as the stack on next S3 boot for fsp_init() continuation function.

Signed-off-by: Bin Meng bmeng.cn@gmail.com ---

arch/x86/cpu/cpu.c | 8 ++++++++ arch/x86/include/asm/cmos_layout.h | 31 +++++++++++++++++++++++++++++++ arch/x86/include/asm/u-boot-x86.h | 1 + arch/x86/lib/fsp/fsp_common.c | 30 +++++++++++++++++++++++++++++- 4 files changed, 69 insertions(+), 1 deletion(-) create mode 100644 arch/x86/include/asm/cmos_layout.h

diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c index afc8645..9e2aee2 100644 --- a/arch/x86/cpu/cpu.c +++ b/arch/x86/cpu/cpu.c @@ -278,6 +278,14 @@ int reserve_arch(void) high_table_reserve(); #endif

+#if defined(CONFIG_HAVE_ACPI_RESUME) && defined(CONFIG_HAVE_FSP) + /* + * Save stack address to CMOS so that at next S3 boot, + * we can use it as the stack address for fsp_contiue() + */ + fsp_save_s3_stack(); +#endif + return 0; } #endif diff --git a/arch/x86/include/asm/cmos_layout.h b/arch/x86/include/asm/cmos_layout.h new file mode 100644 index 0000000..0a0a51e --- /dev/null +++ b/arch/x86/include/asm/cmos_layout.h @@ -0,0 +1,31 @@ +/* + * Copyright (C) 2017, Bin Meng bmeng.cn@gmail.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CMOS_LAYOUT_H +#define __CMOS_LAYOUT_H + +/* + * The RTC internal registers and RAM is organized as two banks of 128 bytes + * each, called the standard and extended banks. The first 14 bytes of the + * standard bank contain the RTC time and date information along with four + * registers, A - D, that are used for configuration of the RTC. The extended + * bank contains a full 128 bytes of battery backed SRAM. + * + * For simplicity in U-Boot we only support CMOS in the standard bank, and + * its base address starts from offset 0x10, which leaves us 112 bytes space. + */ +#define CMOS_BASE 0x10 + +/* + * The file records all offsets off CMOS_BASE that is currently used by + * U-Boot for various reasons. It is put in such a unified place in order + * to be consistent across platforms. + */ + +/* stack address for S3 boot in a FSP configuration, 4 bytes */ +#define CMOS_FSP_STACK_ADDR CMOS_BASE + +#endif /* __CMOS_LAYOUT_H */ diff --git a/arch/x86/include/asm/u-boot-x86.h b/arch/x86/include/asm/u-boot-x86.h index 4f901f9..024aaf4 100644 --- a/arch/x86/include/asm/u-boot-x86.h +++ b/arch/x86/include/asm/u-boot-x86.h @@ -56,6 +56,7 @@ u32 isa_map_rom(u32 bus_addr, int size); int video_bios_init(void);

/* arch/x86/lib/fsp/... */ +int fsp_save_s3_stack(void); int x86_fsp_init(void);

void board_init_f_r_trampoline(ulong) __attribute__ ((noreturn)); diff --git a/arch/x86/lib/fsp/fsp_common.c b/arch/x86/lib/fsp/fsp_common.c index 2b33fba..df73a2a 100644 --- a/arch/x86/lib/fsp/fsp_common.c +++ b/arch/x86/lib/fsp/fsp_common.c @@ -5,8 +5,12 @@ */

#include <common.h> +#include <dm.h> #include <errno.h> +#include <rtc.h> #include <asm/acpi_s3.h> +#include <asm/cmos_layout.h> +#include <asm/early_cmos.h> #include <asm/io.h> #include <asm/mrccache.h> #include <asm/post.h> @@ -71,9 +75,32 @@ static __maybe_unused void *fsp_prepare_mrc_cache(void) return cache->data; }

+#ifdef CONFIG_HAVE_ACPI_RESUME +int fsp_save_s3_stack(void) +{ + struct udevice *dev; + int ret; + + if (gd->arch.prev_sleep_state == ACPI_S3) + return 0; + + ret = uclass_get_device(UCLASS_RTC, 0, &dev); + if (ret) { + debug("Cannot find RTC: err=%d\n", ret); + return -ENODEV; + } + + /* Save the stack address to CMOS */ + rtc_write32(dev, CMOS_FSP_STACK_ADDR, gd->start_addr_sp); + + return 0; +} +#endif + int x86_fsp_init(void) { void *nvs; + int stack = CONFIG_FSP_TEMP_RAM_ADDR; int boot_mode = BOOT_FULL_CONFIG; #ifdef CONFIG_HAVE_ACPI_RESUME int prev_sleep_state = chipset_prev_sleep_state(); @@ -102,6 +129,7 @@ int x86_fsp_init(void) panic("Reboot System"); }

+ stack = cmos_read32(CMOS_FSP_STACK_ADDR); boot_mode = BOOT_ON_S3_RESUME; } #endif @@ -110,7 +138,7 @@ int x86_fsp_init(void) * Note the execution does not return to this function, * instead it jumps to fsp_continue(). */ - fsp_init(CONFIG_FSP_TEMP_RAM_ADDR, boot_mode, nvs); + fsp_init(stack, boot_mode, nvs); } else { /* * The second time we enter here, adjust the size of malloc()

Mark the first 64K memory as reserved as well since U-Boot uses this memory region for things like VBIOS execution in real mode. After kernel resumes, it checks low memory range per config option CONFIG_X86_RESERVE_LOW which is 64K by default to see whether a memory corruption occurs during the suspend/resume.

Signed-off-by: Bin Meng bmeng.cn@gmail.com ---

arch/x86/lib/fsp/fsp_dram.c | 12 ++++++++++++ 1 file changed, 12 insertions(+)

diff --git a/arch/x86/lib/fsp/fsp_dram.c b/arch/x86/lib/fsp/fsp_dram.c index 417c611..2b383ef 100644 --- a/arch/x86/lib/fsp/fsp_dram.c +++ b/arch/x86/lib/fsp/fsp_dram.c @@ -100,6 +100,18 @@ unsigned install_e820_map(unsigned max_entries, struct e820entry *entries) CONFIG_STACK_SIZE; entries[num_entries].type = E820_RESERVED; num_entries++; + + /* + * Mark the first 64K memory as reserved as well since U-Boot uses + * this memory region for things like VBIOS execution in real mode. + * After kernel resumes, it checks low memory range per config option + * CONFIG_X86_RESERVE_LOW which is 64K by default to see whether a + * memory corruption occurs during the suspend/resume. + */ + entries[num_entries].addr = 0; + entries[num_entries].size = 0x10000; + entries[num_entries].type = E820_RESERVED; + num_entries++; #endif

return num_entries;

Call board_final_cleanup() before write_tables(), so that anything done in board_final_cleanup() on a normal boot path is also done on an S3 resume path.

Signed-off-by: Bin Meng bmeng.cn@gmail.com ---

arch/x86/cpu/cpu.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c index 9e2aee2..bd5aeb8 100644 --- a/arch/x86/cpu/cpu.c +++ b/arch/x86/cpu/cpu.c @@ -205,6 +205,8 @@ __weak void board_final_cleanup(void)

int last_stage_init(void) { + board_final_cleanup(); + #if CONFIG_HAVE_ACPI_RESUME void *wake_vector = acpi_find_wakeup_vector();

@@ -214,8 +216,6 @@ int last_stage_init(void)

write_tables();

- board_final_cleanup(); - return 0; } #endif

In enter_acpi_mode() PM1_CNT register is changed to PM1_CNT_SCI_EN directly without preserving its previous value. Update to change the register access to read-modify-write (RMW).

Signed-off-by: Bin Meng bmeng.cn@gmail.com ---

arch/x86/lib/acpi_table.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c index f118345..8be8120 100644 --- a/arch/x86/lib/acpi_table.c +++ b/arch/x86/lib/acpi_table.c @@ -306,6 +306,8 @@ static void acpi_create_mcfg(struct acpi_mcfg *mcfg)

static void enter_acpi_mode(int pm1_cnt) { + u16 val = inw(pm1_cnt); + /* * PM1_CNT register bit0 selects the power management event to be * either an SCI or SMI interrupt. When this bit is set, then power @@ -320,7 +322,7 @@ static void enter_acpi_mode(int pm1_cnt) * system, and expose ourselves to OSPM as working under ACPI mode * already, turn this bit on. */ - outw(PM1_CNT_SCI_EN, pm1_cnt); + outw(val | PM1_CNT_SCI_EN, pm1_cnt); }

/*

enter_acpi_mode() is useful on other boot path like S3 resume, so make it public.

Signed-off-by: Bin Meng bmeng.cn@gmail.com ---

arch/x86/include/asm/acpi_table.h | 1 + arch/x86/lib/acpi_table.c | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/acpi_table.h b/arch/x86/include/asm/acpi_table.h index 6cadd90..3e11362 100644 --- a/arch/x86/include/asm/acpi_table.h +++ b/arch/x86/include/asm/acpi_table.h @@ -316,5 +316,6 @@ int acpi_create_madt_lapic_nmi(struct acpi_madt_lapic_nmi *lapic_nmi, u8 cpu, u16 flags, u8 lint); u32 acpi_fill_madt(u32 current); void acpi_create_gnvs(struct acpi_global_nvs *gnvs); +void enter_acpi_mode(int pm1_cnt); ulong write_acpi_tables(ulong start); void *acpi_find_wakeup_vector(void); diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c index 8be8120..87a71ca 100644 --- a/arch/x86/lib/acpi_table.c +++ b/arch/x86/lib/acpi_table.c @@ -304,7 +304,7 @@ static void acpi_create_mcfg(struct acpi_mcfg *mcfg) header->checksum = table_compute_checksum((void *)mcfg, header->length); }

-static void enter_acpi_mode(int pm1_cnt) +void enter_acpi_mode(int pm1_cnt) { u16 val = inw(pm1_cnt);

To do something more in acpi_resume() like turning on ACPI mode, we need locate ACPI FADT table pointer first. But currently this is done in acpi_find_wakeup_vector().

This changes acpi_resume() signature to accept ACPI FADT pointer as the parameter. A new API acpi_find_fadt() is introduced, and acpi_find_wakeup_vector() is updated to use FADT pointer as the parameter as well.

Signed-off-by: Bin Meng bmeng.cn@gmail.com ---

arch/x86/cpu/cpu.c | 6 +++--- arch/x86/include/asm/acpi_s3.h | 5 +++-- arch/x86/include/asm/acpi_table.h | 3 ++- arch/x86/lib/acpi_s3.c | 7 ++++++- arch/x86/lib/acpi_table.c | 16 +++++++++++----- 5 files changed, 25 insertions(+), 12 deletions(-)

diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c index bd5aeb8..42fe8a2 100644 --- a/arch/x86/cpu/cpu.c +++ b/arch/x86/cpu/cpu.c @@ -208,10 +208,10 @@ int last_stage_init(void) board_final_cleanup();

#if CONFIG_HAVE_ACPI_RESUME - void *wake_vector = acpi_find_wakeup_vector(); + struct acpi_fadt *fadt = acpi_find_fadt();

- if (wake_vector != NULL && gd->arch.prev_sleep_state == ACPI_S3) - acpi_resume(wake_vector); + if (fadt != NULL && gd->arch.prev_sleep_state == ACPI_S3) + acpi_resume(fadt); #endif

write_tables(); diff --git a/arch/x86/include/asm/acpi_s3.h b/arch/x86/include/asm/acpi_s3.h index 5892a8b..567ed3e 100644 --- a/arch/x86/include/asm/acpi_s3.h +++ b/arch/x86/include/asm/acpi_s3.h @@ -100,15 +100,16 @@ enum acpi_sleep_state chipset_prev_sleep_state(void); */ void chipset_clear_sleep_state(void);

+struct acpi_fadt; /** * acpi_resume() - Do ACPI S3 resume * * This calls U-Boot wake up assembly stub and jumps to OS's wake up vector. * - * @wake_vec: OS wake up vector + * @fadt: FADT table pointer in the ACPI table * @return: Never returns */ -void acpi_resume(void *wake_vec); +void acpi_resume(struct acpi_fadt *fadt);

#endif /* __ASSEMBLY__ */

diff --git a/arch/x86/include/asm/acpi_table.h b/arch/x86/include/asm/acpi_table.h index 3e11362..c9eba42 100644 --- a/arch/x86/include/asm/acpi_table.h +++ b/arch/x86/include/asm/acpi_table.h @@ -318,4 +318,5 @@ u32 acpi_fill_madt(u32 current); void acpi_create_gnvs(struct acpi_global_nvs *gnvs); void enter_acpi_mode(int pm1_cnt); ulong write_acpi_tables(ulong start); -void *acpi_find_wakeup_vector(void); +struct acpi_fadt *acpi_find_fadt(void); +void *acpi_find_wakeup_vector(struct acpi_fadt *); diff --git a/arch/x86/lib/acpi_s3.c b/arch/x86/lib/acpi_s3.c index f679c06..e5cc3b0 100644 --- a/arch/x86/lib/acpi_s3.c +++ b/arch/x86/lib/acpi_s3.c @@ -6,6 +6,7 @@

#include <common.h> #include <asm/acpi_s3.h> +#include <asm/acpi_table.h> #include <asm/post.h>

static void asmlinkage (*acpi_do_wakeup)(void *vector) = (void *)WAKEUP_BASE; @@ -19,8 +20,12 @@ static void acpi_jump_to_wakeup(void *vector) acpi_do_wakeup(vector); }

-void acpi_resume(void *wake_vec) +void acpi_resume(struct acpi_fadt *fadt) { + void *wake_vec; + + wake_vec = acpi_find_wakeup_vector(fadt); + post_code(POST_OS_RESUME); acpi_jump_to_wakeup(wake_vec); } diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c index 87a71ca..01d5b6f 100644 --- a/arch/x86/lib/acpi_table.c +++ b/arch/x86/lib/acpi_table.c @@ -460,18 +460,14 @@ static struct acpi_rsdp *acpi_valid_rsdp(struct acpi_rsdp *rsdp) return rsdp; }

-void *acpi_find_wakeup_vector(void) +struct acpi_fadt *acpi_find_fadt(void) { char *p, *end; struct acpi_rsdp *rsdp = NULL; struct acpi_rsdt *rsdt; struct acpi_fadt *fadt = NULL; - struct acpi_facs *facs; - void *wake_vec; int i;

- debug("Trying to find the wakeup vector...\n"); - /* Find RSDP */ for (p = (char *)ROM_TABLE_ADDR; p < (char *)ROM_TABLE_END; p += 16) { rsdp = acpi_valid_rsdp((struct acpi_rsdp *)p); @@ -499,6 +495,16 @@ void *acpi_find_wakeup_vector(void) return NULL;

debug("FADT found at %p\n", fadt); + return fadt; +} + +void *acpi_find_wakeup_vector(struct acpi_fadt *fadt) +{ + struct acpi_facs *facs; + void *wake_vec; + + debug("Trying to find the wakeup vector...\n"); + facs = (struct acpi_facs *)fadt->firmware_ctrl;

if (facs == NULL) {

Before jumping to OS waking up vector, we need turn on ACPI mode for S3, just like what we do for a normal boot.

Signed-off-by: Bin Meng bmeng.cn@gmail.com ---

arch/x86/lib/acpi_s3.c | 3 +++ 1 file changed, 3 insertions(+)

diff --git a/arch/x86/lib/acpi_s3.c b/arch/x86/lib/acpi_s3.c index e5cc3b0..0b62b75 100644 --- a/arch/x86/lib/acpi_s3.c +++ b/arch/x86/lib/acpi_s3.c @@ -24,6 +24,9 @@ void acpi_resume(struct acpi_fadt *fadt) { void *wake_vec;

+ /* Turn on ACPI mode for S3 */ + enter_acpi_mode(fadt->pm1a_cnt_blk); + wake_vec = acpi_find_wakeup_vector(fadt);

post_code(POST_OS_RESUME);

Introduce a new CONFIG_S3_VGA_ROM_RUN option so that U-Boot can bypass executing VGA roms in S3.

Signed-off-by: Bin Meng bmeng.cn@gmail.com ---

arch/x86/Kconfig | 12 ++++++++++++ drivers/pci/pci_rom.c | 14 ++++++++++++++ 2 files changed, 26 insertions(+)

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 95a65ff..29a1634 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -583,6 +583,18 @@ config HAVE_ACPI_RESUME is done, U-Boot needs to find out the wakeup vector provided by OSes and jump there.

+config S3_VGA_ROM_RUN + bool "Re-run VGA option ROMs on S3 resume" + depends on HAVE_ACPI_RESUME + default y if HAVE_ACPI_RESUME + help + Execute VGA option ROMs in U-Boot when resuming from S3. Normally + this is needed when graphics console is being used in the kernel. + + Turning it off can reduce some resume time, but be aware that your + graphics console won't work without VGA options ROMs. Set it to N + if your kernel is only on a serial console. + config STACK_SIZE hex depends on HAVE_ACPI_RESUME diff --git a/drivers/pci/pci_rom.c b/drivers/pci/pci_rom.c index 57204c4..75fb093 100644 --- a/drivers/pci/pci_rom.c +++ b/drivers/pci/pci_rom.c @@ -35,8 +35,22 @@ #include <video_fb.h> #include <linux/screen_info.h>

+#ifdef CONFIG_X86 +#include <asm/acpi_s3.h> +DECLARE_GLOBAL_DATA_PTR; +#endif + __weak bool board_should_run_oprom(struct udevice *dev) { +#if defined(CONFIG_X86) && defined(CONFIG_HAVE_ACPI_RESUME) + if (gd->arch.prev_sleep_state == ACPI_S3) { + if (IS_ENABLED(CONFIG_S3_VGA_ROM_RUN)) + return true; + else + return false; + } +#endif + return true; }

This turns on ACPI S3 resume for minnowmax board.

Signed-off-by: Bin Meng bmeng.cn@gmail.com ---

configs/minnowmax_defconfig | 1 + 1 file changed, 1 insertion(+)

diff --git a/configs/minnowmax_defconfig b/configs/minnowmax_defconfig index 5f61f2a..d8e4090 100644 --- a/configs/minnowmax_defconfig +++ b/configs/minnowmax_defconfig @@ -10,6 +10,7 @@ CONFIG_HAVE_VGA_BIOS=y CONFIG_GENERATE_PIRQ_TABLE=y CONFIG_GENERATE_MP_TABLE=y CONFIG_GENERATE_ACPI_TABLE=y +CONFIG_HAVE_ACPI_RESUME=y CONFIG_SEABIOS=y CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y

Now that we have ACPI S3 support on Intel MinnowMax board, document some generic information of S3 and how to test it.

Signed-off-by: Bin Meng bmeng.cn@gmail.com

---

doc/README.x86 | 20 ++++++++++++++------ 1 file changed, 14 insertions(+), 6 deletions(-)

diff --git a/doc/README.x86 b/doc/README.x86 index a38cc1b..65fd646 100644 --- a/doc/README.x86 +++ b/doc/README.x86 @@ -1014,12 +1014,12 @@ compile ACPI DSDT table written in ASL format to AML format. You can get the compiler via "apt-get install iasl" if you are on Ubuntu or download the source from [17] to compile one by yourself.

-Current ACPI support in U-Boot is not complete. More features will be added -in the future. The status as of today is: +Current ACPI support in U-Boot is basically complete. More optional features +can be added in the future. The status as of today is:

* Support generating RSDT, XSDT, FACS, FADT, MADT, MCFG tables. * Support one static DSDT table only, compiled by Intel ACPI compiler. - * Support S0/S5, reboot and shutdown from OS. + * Support S0/S3/S4/S5, reboot and shutdown from OS. * Support booting a pre-installed Ubuntu distribution via 'zboot' command. * Support installing and booting Ubuntu 14.04 (or above) from U-Boot with the help of SeaBIOS using legacy interface (non-UEFI mode). @@ -1027,9 +1027,6 @@ in the future. The status as of today is: of SeaBIOS using legacy interface (non-UEFI mode). * Support ACPI interrupts with SCI only.

-Features not supported so far (to make it a complete ACPI solution): - * S3 (Suspend to RAM), S4 (Suspend to Disk). - Features that are optional: * Dynamic AML bytecodes insertion at run-time. We may need this to support SSDT table generation and DSDT fix up. @@ -1046,6 +1043,17 @@ command from the OS. For other platform boards, ACPI support status can be checked by examining their board defconfig files to see if CONFIG_GENERATE_ACPI_TABLE is set to y.

+The S3 sleeping state is a low wake latency sleeping state defined by ACPI +spec where all system context is lost except system memory. To test S3 resume +with a Linux kernel, simply run "echo mem > /sys/power/state" and kernel will +put the board to S3 state where the power is off. So when the power button is +pressed again, U-Boot runs as it does in cold boot and detects the sleeping +state via ACPI register to see if it is S3, if yes it means we are waking up. +U-Boot is responsible for restoring the machine state as it is before sleep. +When everything is done, U-Boot finds out the wakeup vector provided by OSes +and jump there. To determine whether ACPI S3 resume is supported, check to +see if CONFIG_HAVE_ACPI_RESUME is set for that specific board. + EFI Support ----------- U-Boot supports booting as a 32-bit or 64-bit EFI payload, e.g. with UEFI.