[PATCH v2 1/3] arch: m68k: Use existing CONFIG_MCFTMR instead of CFG_MCFTMR
There is an existing CONFIG_MCFTMR Kconfig symbol, use it and drop all other instances of CFG_MCFTMR. This duality is likely a result of bogus conversion to Kconfig.
Fixes: 7ff7b46e6ce ("m68k: rename CONFIG_MCFTMR to CFG_MCFTMR") Signed-off-by: Marek Vasut marek.vasut+renesas@mailbox.org --- Cc: Angelo Dureghello angelo@kernel-space.org Cc: Huan Wang alison.wang@nxp.com Cc: Marek Vasut marek.vasut+renesas@mailbox.org Cc: Simon Glass sjg@chromium.org Cc: Stefan Roese sr@denx.de Cc: Tom Rini trini@konsulko.com --- V2: Add Fixes tag --- arch/m68k/Kconfig | 1 + arch/m68k/cpu/mcf523x/interrupts.c | 2 +- arch/m68k/cpu/mcf52x2/interrupts.c | 12 ++++++------ arch/m68k/cpu/mcf532x/interrupts.c | 2 +- arch/m68k/cpu/mcf5445x/interrupts.c | 2 +- arch/m68k/include/asm/immap.h | 24 ++++++++++++------------ arch/m68k/lib/time.c | 4 ++-- board/freescale/m53017evb/README | 2 +- board/freescale/m5373evb/README | 2 +- include/configs/M5208EVBE.h | 1 - include/configs/M5235EVB.h | 1 - include/configs/M5249EVB.h | 1 - include/configs/M5253DEMO.h | 1 - include/configs/M5272C3.h | 1 - include/configs/M5275EVB.h | 1 - include/configs/M5282EVB.h | 1 - include/configs/M53017EVB.h | 1 - include/configs/M5329EVB.h | 1 - include/configs/M5373EVB.h | 1 - include/configs/amcore.h | 1 - include/configs/astro_mcf5373l.h | 1 - include/configs/cobra5272.h | 1 - include/configs/eb_cpu5282.h | 1 - include/configs/stmark2.h | 1 - 24 files changed, 26 insertions(+), 40 deletions(-)
diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig index 76233ef563f..32759cde47d 100644 --- a/arch/m68k/Kconfig +++ b/arch/m68k/Kconfig @@ -200,5 +200,6 @@ source "board/sysam/stmark2/Kconfig"
config MCFTMR bool "Use DMA timer" + default y
endmenu diff --git a/arch/m68k/cpu/mcf523x/interrupts.c b/arch/m68k/cpu/mcf523x/interrupts.c index b02ea29f635..09c7f9e67cc 100644 --- a/arch/m68k/cpu/mcf523x/interrupts.c +++ b/arch/m68k/cpu/mcf523x/interrupts.c @@ -22,7 +22,7 @@ int interrupt_init(void) return 0; }
-#if defined(CFG_MCFTMR) +#if CONFIG_IS_ENABLED(MCFTMR) void dtimer_intr_setup(void) { int0_t *intp = (int0_t *) (CFG_SYS_INTR_BASE); diff --git a/arch/m68k/cpu/mcf52x2/interrupts.c b/arch/m68k/cpu/mcf52x2/interrupts.c index e787c7605f8..c5ed0600736 100644 --- a/arch/m68k/cpu/mcf52x2/interrupts.c +++ b/arch/m68k/cpu/mcf52x2/interrupts.c @@ -34,7 +34,7 @@ int interrupt_init(void) return 0; }
-#if defined(CFG_MCFTMR) +#if CONFIG_IS_ENABLED(MCFTMR) void dtimer_intr_setup(void) { intctrl_t *intp = (intctrl_t *) (CFG_SYS_INTR_BASE); @@ -42,7 +42,7 @@ void dtimer_intr_setup(void) clrbits_be32(&intp->int_icr1, INT_ICR1_TMR3MASK); setbits_be32(&intp->int_icr1, CFG_SYS_TMRINTR_PRI); } -#endif /* CFG_MCFTMR */ +#endif /* CONFIG_MCFTMR */ #endif /* CONFIG_M5272 */
#if defined(CONFIG_M5208) || defined(CONFIG_M5282) || \ @@ -63,7 +63,7 @@ int interrupt_init(void) return 0; }
-#if defined(CFG_MCFTMR) +#if CONFIG_IS_ENABLED(MCFTMR) void dtimer_intr_setup(void) { int0_t *intp = (int0_t *) (CFG_SYS_INTR_BASE); @@ -72,7 +72,7 @@ void dtimer_intr_setup(void) clrbits_be32(&intp->imrl0, 0x00000001); clrbits_be32(&intp->imrl0, CFG_SYS_TMRINTR_MASK); } -#endif /* CFG_MCFTMR */ +#endif /* CONFIG_MCFTMR */ #endif /* CONFIG_M5282 | CONFIG_M5271 | CONFIG_M5275 */
#if defined(CONFIG_M5249) || defined(CONFIG_M5253) @@ -83,11 +83,11 @@ int interrupt_init(void) return 0; }
-#if defined(CFG_MCFTMR) +#if CONFIG_IS_ENABLED(MCFTMR) void dtimer_intr_setup(void) { mbar_writeLong(MCFSIM_IMR, mbar_readLong(MCFSIM_IMR) & ~0x00000400); mbar_writeByte(MCFSIM_TIMER2ICR, CFG_SYS_TMRINTR_PRI); } -#endif /* CFG_MCFTMR */ +#endif /* CONFIG_MCFTMR */ #endif /* CONFIG_M5249 || CONFIG_M5253 */ diff --git a/arch/m68k/cpu/mcf532x/interrupts.c b/arch/m68k/cpu/mcf532x/interrupts.c index bbe823c0cf7..4f72fa88e58 100644 --- a/arch/m68k/cpu/mcf532x/interrupts.c +++ b/arch/m68k/cpu/mcf532x/interrupts.c @@ -23,7 +23,7 @@ int interrupt_init(void) return 0; }
-#if defined(CFG_MCFTMR) +#if CONFIG_IS_ENABLED(MCFTMR) void dtimer_intr_setup(void) { int0_t *intp = (int0_t *) (CFG_SYS_INTR_BASE); diff --git a/arch/m68k/cpu/mcf5445x/interrupts.c b/arch/m68k/cpu/mcf5445x/interrupts.c index fb80a879c7e..400f3dee879 100644 --- a/arch/m68k/cpu/mcf5445x/interrupts.c +++ b/arch/m68k/cpu/mcf5445x/interrupts.c @@ -26,7 +26,7 @@ int interrupt_init(void) return 0; }
-#if defined(CFG_MCFTMR) +#if CONFIG_IS_ENABLED(MCFTMR) void dtimer_intr_setup(void) { int0_t *intp = (int0_t *) (CFG_SYS_INTR_BASE); diff --git a/arch/m68k/include/asm/immap.h b/arch/m68k/include/asm/immap.h index 74516cc6219..3b515fe2c65 100644 --- a/arch/m68k/include/asm/immap.h +++ b/arch/m68k/include/asm/immap.h @@ -16,7 +16,7 @@ #define CFG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x4000))
/* Timer */ -#ifdef CFG_MCFTMR +#if CONFIG_IS_ENABLED(MCFTMR) #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR1) #define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprh0) @@ -38,7 +38,7 @@ #define CFG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x40))
/* Timer */ -#ifdef CFG_MCFTMR +#if CONFIG_IS_ENABLED(MCFTMR) #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR3) #define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprl0) @@ -63,7 +63,7 @@ #define CFG_SYS_NUM_IRQS (64)
/* Timer */ -#ifdef CFG_MCFTMR +#if CONFIG_IS_ENABLED(MCFTMR) #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR1) #define CFG_SYS_TMRPND_REG (mbar_readLong(MCFSIM_IPR)) @@ -86,7 +86,7 @@ #define CFG_SYS_NUM_IRQS (64)
/* Timer */ -#ifdef CFG_MCFTMR +#if CONFIG_IS_ENABLED(MCFTMR) #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR1) #define CFG_SYS_TMRPND_REG (mbar_readLong(MCFSIM_IPR)) @@ -105,7 +105,7 @@ #define CFG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x40))
/* Timer */ -#ifdef CFG_MCFTMR +#if CONFIG_IS_ENABLED(MCFTMR) #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR3) #define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprl0) @@ -130,7 +130,7 @@ #define CFG_SYS_NUM_IRQS (64)
/* Timer */ -#ifdef CFG_MCFTMR +#if CONFIG_IS_ENABLED(MCFTMR) #define CFG_SYS_UDELAY_BASE (MMAP_TMR0) #define CFG_SYS_TMR_BASE (MMAP_TMR3) #define CFG_SYS_TMRPND_REG (((volatile intctrl_t *)(CFG_SYS_INTR_BASE))->int_isr) @@ -152,7 +152,7 @@ #define CFG_SYS_NUM_IRQS (192)
/* Timer */ -#ifdef CFG_MCFTMR +#if CONFIG_IS_ENABLED(MCFTMR) #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR3) #define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprl0) @@ -174,7 +174,7 @@ #define CFG_SYS_NUM_IRQS (128)
/* Timer */ -#ifdef CFG_MCFTMR +#if CONFIG_IS_ENABLED(MCFTMR) #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR3) #define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprl0) @@ -196,7 +196,7 @@ #define CFG_SYS_NUM_IRQS (64)
/* Timer */ -#ifdef CFG_MCFTMR +#if CONFIG_IS_ENABLED(MCFTMR) #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR1) #define CFG_SYS_TMRPND_REG (((volatile intctrl_t *) \ @@ -217,7 +217,7 @@ #define CFG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x4000))
/* Timer */ -#ifdef CFG_MCFTMR +#if CONFIG_IS_ENABLED(MCFTMR) #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR1) #define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprh0) @@ -239,7 +239,7 @@ #define CFG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x4000))
/* Timer */ -#ifdef CFG_MCFTMR +#if CONFIG_IS_ENABLED(MCFTMR) #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR1) #define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprh0) @@ -269,7 +269,7 @@ #define MMAP_DSPI MMAP_DSPI0
/* Timer */ -#ifdef CFG_MCFTMR +#if CONFIG_IS_ENABLED(MCFTMR) #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR1) #define CFG_SYS_TMRPND_REG (((int0_t *)(CFG_SYS_INTR_BASE))->iprh0) diff --git a/arch/m68k/lib/time.c b/arch/m68k/lib/time.c index ca8c0396235..500e4dbbba2 100644 --- a/arch/m68k/lib/time.c +++ b/arch/m68k/lib/time.c @@ -25,7 +25,7 @@ static volatile ulong timestamp = 0; #define CFG_SYS_WATCHDOG_FREQ (CONFIG_SYS_HZ / 2) #endif
-#if defined(CFG_MCFTMR) +#if CONFIG_IS_ENABLED(MCFTMR) #ifndef CFG_SYS_UDELAY_BASE # error "uDelay base not defined!" #endif @@ -111,7 +111,7 @@ ulong get_timer(ulong base) return (timestamp - base); }
-#endif /* CFG_MCFTMR */ +#endif /* CONFIG_MCFTMR */
/* * This function is derived from PowerPC code (read timebase as long long). diff --git a/board/freescale/m53017evb/README b/board/freescale/m53017evb/README index 5d5c5e7adf9..34f05f3fdc7 100644 --- a/board/freescale/m53017evb/README +++ b/board/freescale/m53017evb/README @@ -87,7 +87,7 @@ CONFIG_SYS_FEC0_PINMUX -- Set FEC0 Pin configuration CONFIG_SYS_FEC0_MIIBASE -- Set FEC0 MII base register MCFFEC_TOUT_LOOP -- set FEC timeout loop
-CFG_MCFTMR -- define to use DMA timer +CONFIG_MCFTMR -- define to use DMA timer
CONFIG_SYS_I2C_FSL -- define to use FSL common I2C driver CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged diff --git a/board/freescale/m5373evb/README b/board/freescale/m5373evb/README index e8bf75f4fb9..7240648796b 100644 --- a/board/freescale/m5373evb/README +++ b/board/freescale/m5373evb/README @@ -86,7 +86,7 @@ CONFIG_SYS_FEC0_PINMUX -- Set FEC0 Pin configuration CONFIG_SYS_FEC0_MIIBASE -- Set FEC0 MII base register MCFFEC_TOUT_LOOP -- set FEC timeout loop
-CFG_MCFTMR -- define to use DMA timer +CONFIG_MCFTMR -- define to use DMA timer
CONFIG_SYS_I2C_FSL -- define to use FSL common I2C driver CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h index 4b89f31209a..d4c1e066884 100644 --- a/include/configs/M5208EVBE.h +++ b/include/configs/M5208EVBE.h @@ -111,6 +111,5 @@ #define CFG_SYS_CS0_MASK 0x007F0001 #define CFG_SYS_CS0_CTRL 0x00001FA0
-#define CFG_MCFTMR
#endif /* _M5208EVBE_H */ diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h index 14d46178116..e5428183400 100644 --- a/include/configs/M5235EVB.h +++ b/include/configs/M5235EVB.h @@ -130,6 +130,5 @@ # define CFG_SYS_CS0_CTRL 0x00001D80 #endif
-#define CFG_MCFTMR
#endif /* _M5329EVB_H */ diff --git a/include/configs/M5249EVB.h b/include/configs/M5249EVB.h index b24042328d3..2f4743ce50c 100644 --- a/include/configs/M5249EVB.h +++ b/include/configs/M5249EVB.h @@ -120,6 +120,5 @@ #define CFG_SYS_GPIO1_OUT 0x00c70000 /* Set outputs to default state */ #define CFG_SYS_GPIO1_LED 0x00400000 /* user led */
-#define CFG_MCFTMR
#endif /* M5249 */ diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h index 008c7257c43..0ff0bfce90b 100644 --- a/include/configs/M5253DEMO.h +++ b/include/configs/M5253DEMO.h @@ -132,6 +132,5 @@ #define CFG_SYS_GPIO1_OUT 0x00c70000 /* Set outputs to default state */ #define CFG_SYS_GPIO1_LED 0x00400000 /* user led */
-#define CFG_MCFTMR
#endif /* _M5253DEMO_H */ diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h index 49cf3e878ea..98a17181a41 100644 --- a/include/configs/M5272C3.h +++ b/include/configs/M5272C3.h @@ -107,6 +107,5 @@ #define CFG_SYS_PBDAT 0x0000 #define CFG_SYS_PDCNT 0x00000000
-#define CFG_MCFTMR
#endif /* _M5272C3_H */ diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h index 965327d759d..77ddf717643 100644 --- a/include/configs/M5275EVB.h +++ b/include/configs/M5275EVB.h @@ -116,6 +116,5 @@ #define CFG_SYS_CS1_CTRL 0x00001900 #define CFG_SYS_CS1_MASK 0x00070001
-#define CFG_MCFTMR
#endif /* _M5275EVB_H */ diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h index f04d9b1b2ab..e289a23b800 100644 --- a/include/configs/M5282EVB.h +++ b/include/configs/M5282EVB.h @@ -127,6 +127,5 @@ #define CFG_SYS_DDRUA 0x05 #define CFG_SYS_PJPAR 0xFF
-#define CFG_MCFTMR
#endif /* _CONFIG_M5282EVB_H */ diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h index 04c456ff9f1..dcc5701ee0b 100644 --- a/include/configs/M53017EVB.h +++ b/include/configs/M53017EVB.h @@ -132,6 +132,5 @@ #define CFG_SYS_CS1_MASK 0x00070001 #define CFG_SYS_CS1_CTRL 0x00001FA0
-#define CFG_MCFTMR
#endif /* _M53017EVB_H */ diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index 0aa1ffd4d4f..dd5d4c98023 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -138,6 +138,5 @@ #define CFG_SYS_CS2_CTRL 0x00001f60 #endif
-#define CFG_MCFTMR
#endif /* _M5329EVB_H */ diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h index 8b9e65de98c..4bb99487509 100644 --- a/include/configs/M5373EVB.h +++ b/include/configs/M5373EVB.h @@ -136,6 +136,5 @@ #define CFG_SYS_CS2_MASK (16 << 20) #define CFG_SYS_CS2_CTRL 0x00001f60
-#define CFG_MCFTMR
#endif /* _M5373EVB_H */ diff --git a/include/configs/amcore.h b/include/configs/amcore.h index ca8d17bfd2c..4c695fb9df9 100644 --- a/include/configs/amcore.h +++ b/include/configs/amcore.h @@ -10,7 +10,6 @@
#define CFG_SYS_UART_PORT 0
-#define CFG_MCFTMR #define CFG_SYS_UART_PORT 0 #define CFG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h index 80f8c4129f5..f3bfefa835e 100644 --- a/include/configs/astro_mcf5373l.h +++ b/include/configs/astro_mcf5373l.h @@ -184,6 +184,5 @@ #define CFG_SYS_CACHE_ICACR (CF_CACR_EC | CF_CACR_CINVA | \ CF_CACR_DCM_P)
-#define CFG_MCFTMR
#endif /* _CONFIG_ASTRO_MCF5373L_H */ diff --git a/include/configs/cobra5272.h b/include/configs/cobra5272.h index 276ecc30ccc..556705fb09f 100644 --- a/include/configs/cobra5272.h +++ b/include/configs/cobra5272.h @@ -184,6 +184,5 @@ configuration */ #define CFG_SYS_PBDAT 0x0000 /* PortB value reg. */ #define CFG_SYS_PDCNT 0x00000000 /* PortD control reg. */
-#define CFG_MCFTMR
#endif /* _CONFIG_COBRA5272_H */ diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h index 9503ab66f0f..e2c9d9c43ce 100644 --- a/include/configs/eb_cpu5282.h +++ b/include/configs/eb_cpu5282.h @@ -138,7 +138,6 @@ #define CFG_SYS_DDRUA 0x05 #define CFG_SYS_PJPAR 0xFF
-#define CFG_MCFTMR
#endif /* _CONFIG_M5282EVB_H */ /*---------------------------------------------------------------------*/ diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h index 05de376f0e6..ffc47c80762 100644 --- a/include/configs/stmark2.h +++ b/include/configs/stmark2.h @@ -95,6 +95,5 @@ #define CACR_STATUS (CFG_SYS_INIT_RAM_ADDR + \ CFG_SYS_INIT_RAM_SIZE - 12)
-#define CFG_MCFTMR
#endif /* __STMARK2_CONFIG_H */
The QEMU emulation of m68k does not support DMA timer, the only timer that is supported is the PIT timer. Implement trivial PIT timer support for m68k.
Signed-off-by: Marek Vasut marek.vasut+renesas@mailbox.org --- Cc: Angelo Dureghello angelo@kernel-space.org Cc: Huan Wang alison.wang@nxp.com Cc: Marek Vasut marek.vasut+renesas@mailbox.org Cc: Simon Glass sjg@chromium.org Cc: Stefan Roese sr@denx.de Cc: Tom Rini trini@konsulko.com --- V2: Replace CFG_MCFTMR with CONFIG_MCFTMR in common/board_f.c --- arch/m68k/include/asm/immap.h | 24 +++++++++++++++++++++++ arch/m68k/lib/time.c | 36 +++++++++++++++++++++++++++++++++-- common/board_f.c | 2 +- 3 files changed, 59 insertions(+), 3 deletions(-)
diff --git a/arch/m68k/include/asm/immap.h b/arch/m68k/include/asm/immap.h index 3b515fe2c65..aafa4f40cb3 100644 --- a/arch/m68k/include/asm/immap.h +++ b/arch/m68k/include/asm/immap.h @@ -25,6 +25,8 @@ #define CFG_SYS_TMRINTR_PEND (CFG_SYS_TMRINTR_MASK) #define CFG_SYS_TMRINTR_PRI (6) #define CFG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) +#else +#define CFG_SYS_UDELAY_BASE (MMAP_PIT0) #endif
#define CFG_SYS_INTR_BASE (MMAP_INTC0) @@ -47,6 +49,8 @@ #define CFG_SYS_TMRINTR_PEND (CFG_SYS_TMRINTR_MASK) #define CFG_SYS_TMRINTR_PRI (0x1E) /* Level must include inorder to work */ #define CFG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) +#else +#define CFG_SYS_UDELAY_BASE (MMAP_PIT0) #endif
#define CFG_SYS_INTR_BASE (MMAP_INTC0) @@ -72,6 +76,8 @@ #define CFG_SYS_TMRINTR_PEND (CFG_SYS_TMRINTR_MASK) #define CFG_SYS_TMRINTR_PRI (MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3) #define CFG_SYS_TIMER_PRESCALER (((gd->bus_clk / 2000000) - 1) << 8) +#else +#define CFG_SYS_UDELAY_BASE (MMAP_PIT0) #endif #endif /* CONFIG_M5249 */
@@ -95,6 +101,8 @@ #define CFG_SYS_TMRINTR_PEND (CFG_SYS_TMRINTR_MASK) #define CFG_SYS_TMRINTR_PRI (MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL3 | MCFSIM_ICR_PRI3) #define CFG_SYS_TIMER_PRESCALER (((gd->bus_clk / 2000000) - 1) << 8) +#else +#define CFG_SYS_UDELAY_BASE (MMAP_PIT0) #endif #endif /* CONFIG_M5253 */
@@ -114,6 +122,8 @@ #define CFG_SYS_TMRINTR_PEND (CFG_SYS_TMRINTR_MASK) #define CFG_SYS_TMRINTR_PRI (0x1E) /* Interrupt level 3, priority 6 */ #define CFG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) +#else +#define CFG_SYS_UDELAY_BASE (MMAP_PIT0) #endif
#define CFG_SYS_INTR_BASE (MMAP_INTC0) @@ -139,6 +149,8 @@ #define CFG_SYS_TMRINTR_PEND (0) #define CFG_SYS_TMRINTR_PRI (INT_ICR1_TMR3PI | INT_ICR1_TMR3IPL(5)) #define CFG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) +#else +#define CFG_SYS_UDELAY_BASE (MMAP_PIT0) #endif #endif /* CONFIG_M5272 */
@@ -161,6 +173,8 @@ #define CFG_SYS_TMRINTR_PEND (CFG_SYS_TMRINTR_MASK) #define CFG_SYS_TMRINTR_PRI (0x1E) #define CFG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) +#else +#define CFG_SYS_UDELAY_BASE (MMAP_PIT0) #endif #endif /* CONFIG_M5275 */
@@ -183,6 +197,8 @@ #define CFG_SYS_TMRINTR_PEND (CFG_SYS_TMRINTR_MASK) #define CFG_SYS_TMRINTR_PRI (0x1E) /* Level must include inorder to work */ #define CFG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) +#else +#define CFG_SYS_UDELAY_BASE (MMAP_PIT0) #endif #endif /* CONFIG_M5282 */
@@ -207,6 +223,8 @@ #define CFG_SYS_TMRINTR_PRI (MCFSIM_ICR_AUTOVEC | \ MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3) #define CFG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) +#else +#define CFG_SYS_UDELAY_BASE (MMAP_PIT0) #endif #endif /* CONFIG_M5307 */
@@ -226,6 +244,8 @@ #define CFG_SYS_TMRINTR_PEND (CFG_SYS_TMRINTR_MASK) #define CFG_SYS_TMRINTR_PRI (6) #define CFG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) +#else +#define CFG_SYS_UDELAY_BASE (MMAP_PIT0) #endif
#define CFG_SYS_INTR_BASE (MMAP_INTC0) @@ -248,6 +268,8 @@ #define CFG_SYS_TMRINTR_PEND (CFG_SYS_TMRINTR_MASK) #define CFG_SYS_TMRINTR_PRI (6) #define CFG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) +#else +#define CFG_SYS_UDELAY_BASE (MMAP_PIT0) #endif
#define CFG_SYS_INTR_BASE (MMAP_INTC0) @@ -278,6 +300,8 @@ #define CFG_SYS_TMRINTR_PEND (CFG_SYS_TMRINTR_MASK) #define CFG_SYS_TMRINTR_PRI (6) #define CFG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) +#else +#define CFG_SYS_UDELAY_BASE (MMAP_PIT0) #endif
#define CFG_SYS_INTR_BASE (MMAP_INTC0) diff --git a/arch/m68k/lib/time.c b/arch/m68k/lib/time.c index 500e4dbbba2..61db1e6c500 100644 --- a/arch/m68k/lib/time.c +++ b/arch/m68k/lib/time.c @@ -111,8 +111,6 @@ ulong get_timer(ulong base) return (timestamp - base); }
-#endif /* CONFIG_MCFTMR */ - /* * This function is derived from PowerPC code (read timebase as long long). * On M68K it just returns the timer value. @@ -121,6 +119,40 @@ unsigned long long get_ticks(void) { return get_timer(0); } +#else +static u64 timer64 __section(".data"); +static u16 timer16 __section(".data"); + +uint64_t __weak get_ticks(void) +{ + volatile pit_t *timerp = (pit_t *) (CFG_SYS_UDELAY_BASE); + u16 val = ~timerp->pcntr; + + if (timer16 > val) + timer64 += 0xffff - timer16 + val; + else + timer64 += val - timer16; + + timer16 = val; + + return timer64; +} + +/* PIT timer */ +int timer_init(void) +{ + volatile pit_t *timerp = (pit_t *) (CFG_SYS_UDELAY_BASE); + + timer16 = 0; + timer64 = 0; + + /* Set up PIT as timebase clock */ + timerp->pmr = 0xffff; + timerp->pcsr = PIT_PCSR_EN | PIT_PCSR_OVW; + + return 0; +} +#endif /* CONFIG_MCFTMR */
unsigned long usec2ticks(unsigned long usec) { diff --git a/common/board_f.c b/common/board_f.c index f3c1ab53b1c..1688e27071f 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -863,7 +863,7 @@ static const init_fnc_t init_sequence_f[] = { /* get CPU and bus clocks according to the environment variable */ get_clocks, /* get CPU and bus clocks (etc.) */ #endif -#if !defined(CONFIG_M68K) +#if !defined(CONFIG_M68K) || (defined(CONFIG_M68K) && !defined(CONFIG_MCFTMR)) timer_init, /* initialize timer */ #endif #if defined(CONFIG_BOARD_POSTCLK_INIT)
The QEMU emulation of m68k does not support RAMBAR accesses, add Kconfig option which inhibits those accesses, so that U-Boot can be started in m68k QEMU for CI testing purpopses until QEMU emulation improves.
Signed-off-by: Marek Vasut marek.vasut+renesas@mailbox.org --- Cc: Angelo Dureghello angelo@kernel-space.org Cc: Huan Wang alison.wang@nxp.com Cc: Marek Vasut marek.vasut+renesas@mailbox.org Cc: Simon Glass sjg@chromium.org Cc: Stefan Roese sr@denx.de Cc: Tom Rini trini@konsulko.com --- V2: No change --- arch/m68k/Kconfig | 11 ++++++++++- arch/m68k/cpu/mcf52x2/start.S | 4 ++-- 2 files changed, 12 insertions(+), 3 deletions(-)
diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig index 32759cde47d..1911563e540 100644 --- a/arch/m68k/Kconfig +++ b/arch/m68k/Kconfig @@ -198,8 +198,17 @@ source "board/freescale/m5373evb/Kconfig" source "board/sysam/amcore/Kconfig" source "board/sysam/stmark2/Kconfig"
+config M68K_QEMU + bool "Build with workarounds for incomplete QEMU emulation" + default n + help + QEMU 8.x currently does not implement RAMBAR accesses and + DMA timers. Enable this option for U-Boot CI purposes only + to skip the RAMBAR accesses. + config MCFTMR bool "Use DMA timer" - default y + default y if !M68K_QEMU + default n if M68K_QEMU
endmenu diff --git a/arch/m68k/cpu/mcf52x2/start.S b/arch/m68k/cpu/mcf52x2/start.S index d48d0192eea..51d2e23df10 100644 --- a/arch/m68k/cpu/mcf52x2/start.S +++ b/arch/m68k/cpu/mcf52x2/start.S @@ -98,7 +98,7 @@ _start: nop move.w #0x2700,%sr
-#if defined(CONFIG_M5208) +#if defined(CONFIG_M5208) && !defined(CONFIG_M68K_QEMU) /* Initialize RAMBAR: locate SRAM and validate it */ move.l #(CFG_SYS_INIT_RAM_ADDR + CFG_SYS_INIT_RAM_CTRL), %d0 movec %d0, %RAMBAR1 @@ -120,7 +120,7 @@ _start: movec %d0, %RAMBAR0 #endif /* CONFIG_M5272 || CONFIG_M5249 || CONFIG_M5253 */
-#if defined(CONFIG_M5282) || defined(CONFIG_M5271) +#if (defined(CONFIG_M5282) || defined(CONFIG_M5271)) && !defined(CONFIG_M68K_QEMU) /* set MBAR address + valid flag */ move.l #(CFG_SYS_MBAR + 1), %d0 move.l %d0, 0x40000000
Hi Marek,
applied all these patches in u-boot-coldfire:
fb67f91b5e9b5e9aae5ab038895ebabc10af4d9d travis-ci: Add m68k M5208EVBE machine 04adf3b61690ba818f42e746ae79243cbe64aa55 CI: Add m68k target 9c5775623542b9a837e634e68e00746bcf35f53c arch: m68k: Add QEMU specific RAMBAR workaround b4a4248515630984cada05cdc2cbf243e511fa0a arch: m68k: Introduce trivial PIT based timer 3c39f2cdaa2427a17f0d68fea522824ee53f5315 arch: m68k: Use existing CONFIG_MCFTMR instead of CFG_MCFTMR
Still getting one pipeline error:
https://source.denx.de/u-boot/custodians/u-boot-coldfire/-/pipelines/15744/f...
am i missing something ?
Regards, angelo
On 23/03/23 1:20 AM, Marek Vasut wrote:
There is an existing CONFIG_MCFTMR Kconfig symbol, use it and drop all other instances of CFG_MCFTMR. This duality is likely a result of bogus conversion to Kconfig.
Fixes: 7ff7b46e6ce ("m68k: rename CONFIG_MCFTMR to CFG_MCFTMR") Signed-off-by: Marek Vasut marek.vasut+renesas@mailbox.org
Cc: Angelo Dureghello angelo@kernel-space.org Cc: Huan Wang alison.wang@nxp.com Cc: Marek Vasut marek.vasut+renesas@mailbox.org Cc: Simon Glass sjg@chromium.org Cc: Stefan Roese sr@denx.de Cc: Tom Rini trini@konsulko.com
V2: Add Fixes tag
arch/m68k/Kconfig | 1 + arch/m68k/cpu/mcf523x/interrupts.c | 2 +- arch/m68k/cpu/mcf52x2/interrupts.c | 12 ++++++------ arch/m68k/cpu/mcf532x/interrupts.c | 2 +- arch/m68k/cpu/mcf5445x/interrupts.c | 2 +- arch/m68k/include/asm/immap.h | 24 ++++++++++++------------ arch/m68k/lib/time.c | 4 ++-- board/freescale/m53017evb/README | 2 +- board/freescale/m5373evb/README | 2 +- include/configs/M5208EVBE.h | 1 - include/configs/M5235EVB.h | 1 - include/configs/M5249EVB.h | 1 - include/configs/M5253DEMO.h | 1 - include/configs/M5272C3.h | 1 - include/configs/M5275EVB.h | 1 - include/configs/M5282EVB.h | 1 - include/configs/M53017EVB.h | 1 - include/configs/M5329EVB.h | 1 - include/configs/M5373EVB.h | 1 - include/configs/amcore.h | 1 - include/configs/astro_mcf5373l.h | 1 - include/configs/cobra5272.h | 1 - include/configs/eb_cpu5282.h | 1 - include/configs/stmark2.h | 1 - 24 files changed, 26 insertions(+), 40 deletions(-)
diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig index 76233ef563f..32759cde47d 100644 --- a/arch/m68k/Kconfig +++ b/arch/m68k/Kconfig @@ -200,5 +200,6 @@ source "board/sysam/stmark2/Kconfig"
config MCFTMR bool "Use DMA timer"
default y
endmenu
diff --git a/arch/m68k/cpu/mcf523x/interrupts.c b/arch/m68k/cpu/mcf523x/interrupts.c index b02ea29f635..09c7f9e67cc 100644 --- a/arch/m68k/cpu/mcf523x/interrupts.c +++ b/arch/m68k/cpu/mcf523x/interrupts.c @@ -22,7 +22,7 @@ int interrupt_init(void) return 0; }
-#if defined(CFG_MCFTMR) +#if CONFIG_IS_ENABLED(MCFTMR) void dtimer_intr_setup(void) { int0_t *intp = (int0_t *) (CFG_SYS_INTR_BASE); diff --git a/arch/m68k/cpu/mcf52x2/interrupts.c b/arch/m68k/cpu/mcf52x2/interrupts.c index e787c7605f8..c5ed0600736 100644 --- a/arch/m68k/cpu/mcf52x2/interrupts.c +++ b/arch/m68k/cpu/mcf52x2/interrupts.c @@ -34,7 +34,7 @@ int interrupt_init(void) return 0; }
-#if defined(CFG_MCFTMR) +#if CONFIG_IS_ENABLED(MCFTMR) void dtimer_intr_setup(void) { intctrl_t *intp = (intctrl_t *) (CFG_SYS_INTR_BASE); @@ -42,7 +42,7 @@ void dtimer_intr_setup(void) clrbits_be32(&intp->int_icr1, INT_ICR1_TMR3MASK); setbits_be32(&intp->int_icr1, CFG_SYS_TMRINTR_PRI); } -#endif /* CFG_MCFTMR */ +#endif /* CONFIG_MCFTMR */ #endif /* CONFIG_M5272 */
#if defined(CONFIG_M5208) || defined(CONFIG_M5282) || \ @@ -63,7 +63,7 @@ int interrupt_init(void) return 0; }
-#if defined(CFG_MCFTMR) +#if CONFIG_IS_ENABLED(MCFTMR) void dtimer_intr_setup(void) { int0_t *intp = (int0_t *) (CFG_SYS_INTR_BASE); @@ -72,7 +72,7 @@ void dtimer_intr_setup(void) clrbits_be32(&intp->imrl0, 0x00000001); clrbits_be32(&intp->imrl0, CFG_SYS_TMRINTR_MASK); } -#endif /* CFG_MCFTMR */ +#endif /* CONFIG_MCFTMR */ #endif /* CONFIG_M5282 | CONFIG_M5271 | CONFIG_M5275 */
#if defined(CONFIG_M5249) || defined(CONFIG_M5253) @@ -83,11 +83,11 @@ int interrupt_init(void) return 0; }
-#if defined(CFG_MCFTMR) +#if CONFIG_IS_ENABLED(MCFTMR) void dtimer_intr_setup(void) { mbar_writeLong(MCFSIM_IMR, mbar_readLong(MCFSIM_IMR) & ~0x00000400); mbar_writeByte(MCFSIM_TIMER2ICR, CFG_SYS_TMRINTR_PRI); } -#endif /* CFG_MCFTMR */ +#endif /* CONFIG_MCFTMR */ #endif /* CONFIG_M5249 || CONFIG_M5253 */ diff --git a/arch/m68k/cpu/mcf532x/interrupts.c b/arch/m68k/cpu/mcf532x/interrupts.c index bbe823c0cf7..4f72fa88e58 100644 --- a/arch/m68k/cpu/mcf532x/interrupts.c +++ b/arch/m68k/cpu/mcf532x/interrupts.c @@ -23,7 +23,7 @@ int interrupt_init(void) return 0; }
-#if defined(CFG_MCFTMR) +#if CONFIG_IS_ENABLED(MCFTMR) void dtimer_intr_setup(void) { int0_t *intp = (int0_t *) (CFG_SYS_INTR_BASE); diff --git a/arch/m68k/cpu/mcf5445x/interrupts.c b/arch/m68k/cpu/mcf5445x/interrupts.c index fb80a879c7e..400f3dee879 100644 --- a/arch/m68k/cpu/mcf5445x/interrupts.c +++ b/arch/m68k/cpu/mcf5445x/interrupts.c @@ -26,7 +26,7 @@ int interrupt_init(void) return 0; }
-#if defined(CFG_MCFTMR) +#if CONFIG_IS_ENABLED(MCFTMR) void dtimer_intr_setup(void) { int0_t *intp = (int0_t *) (CFG_SYS_INTR_BASE); diff --git a/arch/m68k/include/asm/immap.h b/arch/m68k/include/asm/immap.h index 74516cc6219..3b515fe2c65 100644 --- a/arch/m68k/include/asm/immap.h +++ b/arch/m68k/include/asm/immap.h @@ -16,7 +16,7 @@ #define CFG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x4000))
/* Timer */ -#ifdef CFG_MCFTMR +#if CONFIG_IS_ENABLED(MCFTMR) #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR1) #define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprh0) @@ -38,7 +38,7 @@ #define CFG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x40))
/* Timer */ -#ifdef CFG_MCFTMR +#if CONFIG_IS_ENABLED(MCFTMR) #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR3) #define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprl0) @@ -63,7 +63,7 @@ #define CFG_SYS_NUM_IRQS (64)
/* Timer */ -#ifdef CFG_MCFTMR +#if CONFIG_IS_ENABLED(MCFTMR) #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR1) #define CFG_SYS_TMRPND_REG (mbar_readLong(MCFSIM_IPR)) @@ -86,7 +86,7 @@ #define CFG_SYS_NUM_IRQS (64)
/* Timer */ -#ifdef CFG_MCFTMR +#if CONFIG_IS_ENABLED(MCFTMR) #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR1) #define CFG_SYS_TMRPND_REG (mbar_readLong(MCFSIM_IPR)) @@ -105,7 +105,7 @@ #define CFG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x40))
/* Timer */ -#ifdef CFG_MCFTMR +#if CONFIG_IS_ENABLED(MCFTMR) #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR3) #define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprl0) @@ -130,7 +130,7 @@ #define CFG_SYS_NUM_IRQS (64)
/* Timer */ -#ifdef CFG_MCFTMR +#if CONFIG_IS_ENABLED(MCFTMR) #define CFG_SYS_UDELAY_BASE (MMAP_TMR0) #define CFG_SYS_TMR_BASE (MMAP_TMR3) #define CFG_SYS_TMRPND_REG (((volatile intctrl_t *)(CFG_SYS_INTR_BASE))->int_isr) @@ -152,7 +152,7 @@ #define CFG_SYS_NUM_IRQS (192)
/* Timer */ -#ifdef CFG_MCFTMR +#if CONFIG_IS_ENABLED(MCFTMR) #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR3) #define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprl0) @@ -174,7 +174,7 @@ #define CFG_SYS_NUM_IRQS (128)
/* Timer */ -#ifdef CFG_MCFTMR +#if CONFIG_IS_ENABLED(MCFTMR) #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR3) #define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprl0) @@ -196,7 +196,7 @@ #define CFG_SYS_NUM_IRQS (64)
/* Timer */ -#ifdef CFG_MCFTMR +#if CONFIG_IS_ENABLED(MCFTMR) #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR1) #define CFG_SYS_TMRPND_REG (((volatile intctrl_t *) \ @@ -217,7 +217,7 @@ #define CFG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x4000))
/* Timer */ -#ifdef CFG_MCFTMR +#if CONFIG_IS_ENABLED(MCFTMR) #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR1) #define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprh0) @@ -239,7 +239,7 @@ #define CFG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x4000))
/* Timer */ -#ifdef CFG_MCFTMR +#if CONFIG_IS_ENABLED(MCFTMR) #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR1) #define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprh0) @@ -269,7 +269,7 @@ #define MMAP_DSPI MMAP_DSPI0
/* Timer */ -#ifdef CFG_MCFTMR +#if CONFIG_IS_ENABLED(MCFTMR) #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR1) #define CFG_SYS_TMRPND_REG (((int0_t *)(CFG_SYS_INTR_BASE))->iprh0) diff --git a/arch/m68k/lib/time.c b/arch/m68k/lib/time.c index ca8c0396235..500e4dbbba2 100644 --- a/arch/m68k/lib/time.c +++ b/arch/m68k/lib/time.c @@ -25,7 +25,7 @@ static volatile ulong timestamp = 0; #define CFG_SYS_WATCHDOG_FREQ (CONFIG_SYS_HZ / 2) #endif
-#if defined(CFG_MCFTMR) +#if CONFIG_IS_ENABLED(MCFTMR) #ifndef CFG_SYS_UDELAY_BASE # error "uDelay base not defined!" #endif @@ -111,7 +111,7 @@ ulong get_timer(ulong base) return (timestamp - base); }
-#endif /* CFG_MCFTMR */ +#endif /* CONFIG_MCFTMR */
/*
- This function is derived from PowerPC code (read timebase as long long).
diff --git a/board/freescale/m53017evb/README b/board/freescale/m53017evb/README index 5d5c5e7adf9..34f05f3fdc7 100644 --- a/board/freescale/m53017evb/README +++ b/board/freescale/m53017evb/README @@ -87,7 +87,7 @@ CONFIG_SYS_FEC0_PINMUX -- Set FEC0 Pin configuration CONFIG_SYS_FEC0_MIIBASE -- Set FEC0 MII base register MCFFEC_TOUT_LOOP -- set FEC timeout loop
-CFG_MCFTMR -- define to use DMA timer +CONFIG_MCFTMR -- define to use DMA timer
CONFIG_SYS_I2C_FSL -- define to use FSL common I2C driver CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged diff --git a/board/freescale/m5373evb/README b/board/freescale/m5373evb/README index e8bf75f4fb9..7240648796b 100644 --- a/board/freescale/m5373evb/README +++ b/board/freescale/m5373evb/README @@ -86,7 +86,7 @@ CONFIG_SYS_FEC0_PINMUX -- Set FEC0 Pin configuration CONFIG_SYS_FEC0_MIIBASE -- Set FEC0 MII base register MCFFEC_TOUT_LOOP -- set FEC timeout loop
-CFG_MCFTMR -- define to use DMA timer +CONFIG_MCFTMR -- define to use DMA timer
CONFIG_SYS_I2C_FSL -- define to use FSL common I2C driver CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h index 4b89f31209a..d4c1e066884 100644 --- a/include/configs/M5208EVBE.h +++ b/include/configs/M5208EVBE.h @@ -111,6 +111,5 @@ #define CFG_SYS_CS0_MASK 0x007F0001 #define CFG_SYS_CS0_CTRL 0x00001FA0
-#define CFG_MCFTMR
#endif /* _M5208EVBE_H */ diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h index 14d46178116..e5428183400 100644 --- a/include/configs/M5235EVB.h +++ b/include/configs/M5235EVB.h @@ -130,6 +130,5 @@ # define CFG_SYS_CS0_CTRL 0x00001D80 #endif
-#define CFG_MCFTMR
#endif /* _M5329EVB_H */ diff --git a/include/configs/M5249EVB.h b/include/configs/M5249EVB.h index b24042328d3..2f4743ce50c 100644 --- a/include/configs/M5249EVB.h +++ b/include/configs/M5249EVB.h @@ -120,6 +120,5 @@ #define CFG_SYS_GPIO1_OUT 0x00c70000 /* Set outputs to default state */ #define CFG_SYS_GPIO1_LED 0x00400000 /* user led */
-#define CFG_MCFTMR
#endif /* M5249 */ diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h index 008c7257c43..0ff0bfce90b 100644 --- a/include/configs/M5253DEMO.h +++ b/include/configs/M5253DEMO.h @@ -132,6 +132,5 @@ #define CFG_SYS_GPIO1_OUT 0x00c70000 /* Set outputs to default state */ #define CFG_SYS_GPIO1_LED 0x00400000 /* user led */
-#define CFG_MCFTMR
#endif /* _M5253DEMO_H */ diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h index 49cf3e878ea..98a17181a41 100644 --- a/include/configs/M5272C3.h +++ b/include/configs/M5272C3.h @@ -107,6 +107,5 @@ #define CFG_SYS_PBDAT 0x0000 #define CFG_SYS_PDCNT 0x00000000
-#define CFG_MCFTMR
#endif /* _M5272C3_H */ diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h index 965327d759d..77ddf717643 100644 --- a/include/configs/M5275EVB.h +++ b/include/configs/M5275EVB.h @@ -116,6 +116,5 @@ #define CFG_SYS_CS1_CTRL 0x00001900 #define CFG_SYS_CS1_MASK 0x00070001
-#define CFG_MCFTMR
#endif /* _M5275EVB_H */ diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h index f04d9b1b2ab..e289a23b800 100644 --- a/include/configs/M5282EVB.h +++ b/include/configs/M5282EVB.h @@ -127,6 +127,5 @@ #define CFG_SYS_DDRUA 0x05 #define CFG_SYS_PJPAR 0xFF
-#define CFG_MCFTMR
#endif /* _CONFIG_M5282EVB_H */ diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h index 04c456ff9f1..dcc5701ee0b 100644 --- a/include/configs/M53017EVB.h +++ b/include/configs/M53017EVB.h @@ -132,6 +132,5 @@ #define CFG_SYS_CS1_MASK 0x00070001 #define CFG_SYS_CS1_CTRL 0x00001FA0
-#define CFG_MCFTMR
#endif /* _M53017EVB_H */ diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index 0aa1ffd4d4f..dd5d4c98023 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -138,6 +138,5 @@ #define CFG_SYS_CS2_CTRL 0x00001f60 #endif
-#define CFG_MCFTMR
#endif /* _M5329EVB_H */ diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h index 8b9e65de98c..4bb99487509 100644 --- a/include/configs/M5373EVB.h +++ b/include/configs/M5373EVB.h @@ -136,6 +136,5 @@ #define CFG_SYS_CS2_MASK (16 << 20) #define CFG_SYS_CS2_CTRL 0x00001f60
-#define CFG_MCFTMR
#endif /* _M5373EVB_H */ diff --git a/include/configs/amcore.h b/include/configs/amcore.h index ca8d17bfd2c..4c695fb9df9 100644 --- a/include/configs/amcore.h +++ b/include/configs/amcore.h @@ -10,7 +10,6 @@
#define CFG_SYS_UART_PORT 0
-#define CFG_MCFTMR #define CFG_SYS_UART_PORT 0 #define CFG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h index 80f8c4129f5..f3bfefa835e 100644 --- a/include/configs/astro_mcf5373l.h +++ b/include/configs/astro_mcf5373l.h @@ -184,6 +184,5 @@ #define CFG_SYS_CACHE_ICACR (CF_CACR_EC | CF_CACR_CINVA | \ CF_CACR_DCM_P)
-#define CFG_MCFTMR
#endif /* _CONFIG_ASTRO_MCF5373L_H */ diff --git a/include/configs/cobra5272.h b/include/configs/cobra5272.h index 276ecc30ccc..556705fb09f 100644 --- a/include/configs/cobra5272.h +++ b/include/configs/cobra5272.h @@ -184,6 +184,5 @@ configuration */ #define CFG_SYS_PBDAT 0x0000 /* PortB value reg. */ #define CFG_SYS_PDCNT 0x00000000 /* PortD control reg. */
-#define CFG_MCFTMR
#endif /* _CONFIG_COBRA5272_H */ diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h index 9503ab66f0f..e2c9d9c43ce 100644 --- a/include/configs/eb_cpu5282.h +++ b/include/configs/eb_cpu5282.h @@ -138,7 +138,6 @@ #define CFG_SYS_DDRUA 0x05 #define CFG_SYS_PJPAR 0xFF
-#define CFG_MCFTMR
#endif /* _CONFIG_M5282EVB_H */ /*---------------------------------------------------------------------*/ diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h index 05de376f0e6..ffc47c80762 100644 --- a/include/configs/stmark2.h +++ b/include/configs/stmark2.h @@ -95,6 +95,5 @@ #define CACR_STATUS (CFG_SYS_INIT_RAM_ADDR + \ CFG_SYS_INIT_RAM_SIZE - 12)
-#define CFG_MCFTMR
#endif /* __STMARK2_CONFIG_H */
On 3/25/23 23:01, Angelo Dureghello wrote:
Hi Marek,
Hi,
applied all these patches in u-boot-coldfire:
fb67f91b5e9b5e9aae5ab038895ebabc10af4d9d travis-ci: Add m68k M5208EVBE machine 04adf3b61690ba818f42e746ae79243cbe64aa55 CI: Add m68k target 9c5775623542b9a837e634e68e00746bcf35f53c arch: m68k: Add QEMU specific RAMBAR workaround b4a4248515630984cada05cdc2cbf243e511fa0a arch: m68k: Introduce trivial PIT based timer 3c39f2cdaa2427a17f0d68fea522824ee53f5315 arch: m68k: Use existing CONFIG_MCFTMR instead of CFG_MCFTMR
Still getting one pipeline error:
https://source.denx.de/u-boot/custodians/u-boot-coldfire/-/pipelines/15744/f...
Wait until Tom applies this one to u-boot-test-hooks:
[PATCH] travis-ci: Add m68k M5208EVBE machine
or use commit
https://source.denx.de/u-boot/custodians/u-boot-sh/-/commit/89e027b24ed5272d...
as a workaround.
participants (3)
-
Angelo Dureghello -
Marek Vasut -
Marek Vasut