Add the dts files to support deivce tree, update the configuration files to support the device tree and driver model. The peripheral clock and pins configuration are handled by the clock and the pinctrl drivers respectively.

Signed-off-by: Wenyou Yang wenyou.yang@microchip.com ---

board/esd/meesc/meesc.c | 8 -------- configs/meesc_dataflash_defconfig | 20 ++++++++++++++++++++ configs/meesc_defconfig | 20 +++++++++++++++++++- include/configs/meesc.h | 36 ++++++------------------------------ 4 files changed, 45 insertions(+), 39 deletions(-)

diff --git a/board/esd/meesc/meesc.c b/board/esd/meesc/meesc.c index e4bda7909a..93a02ab0ee 100644 --- a/board/esd/meesc/meesc.c +++ b/board/esd/meesc/meesc.c @@ -247,13 +247,8 @@ int misc_init_r(void)

int board_early_init_f(void) { - at91_periph_clk_enable(ATMEL_ID_PIOA); - at91_periph_clk_enable(ATMEL_ID_PIOB); - at91_periph_clk_enable(ATMEL_ID_PIOCDE); at91_periph_clk_enable(ATMEL_ID_UHP);

- at91_seriald_hw_init(); - return 0; }

@@ -268,9 +263,6 @@ int board_init(void) #ifdef CONFIG_CMD_NAND meesc_nand_hw_init(); #endif -#ifdef CONFIG_HAS_DATAFLASH - at91_spi0_hw_init(1 << 0); -#endif #ifdef CONFIG_MACB meesc_macb_hw_init(); #endif diff --git a/configs/meesc_dataflash_defconfig b/configs/meesc_dataflash_defconfig index de8a8cbf0a..66cc3620ff 100644 --- a/configs/meesc_dataflash_defconfig +++ b/configs/meesc_dataflash_defconfig @@ -1,6 +1,8 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_MEESC=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH" CONFIG_BOOTDELAY=3 @@ -10,9 +12,27 @@ CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_LOADS is not set +CONFIG_CMD_SF=y # CONFIG_CMD_FPGA is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y # CONFIG_MMC is not set +CONFIG_OF_CONTROL=y +CONFIG_DM=y +CONFIG_CLK=y +CONFIG_CLK_AT91=y +CONFIG_DM_GPIO=y +CONFIG_AT91_GPIO=y +# CONFIG_MMC is not set CONFIG_OF_LIBFDT=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_FLASH_DATAFLASH=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_AT91=y +CONFIG_DM_SERIAL=y +CONFIG_ATMEL_USART=y +CONFIG_DM_SPI=y +CONFIG_ATMEL_SPI=y diff --git a/configs/meesc_defconfig b/configs/meesc_defconfig index 12482bf795..270c27db81 100644 --- a/configs/meesc_defconfig +++ b/configs/meesc_defconfig @@ -1,6 +1,8 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_MEESC=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 @@ -10,9 +12,25 @@ CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_LOADS is not set +CONFIG_CMD_SF=y # CONFIG_CMD_FPGA is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y +CONFIG_OF_CONTROL=y +CONFIG_DM=y +CONFIG_CLK=y +CONFIG_CLK_AT91=y +CONFIG_DM_GPIO=y +CONFIG_AT91_GPIO=y # CONFIG_MMC is not set -CONFIG_OF_LIBFDT=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_FLASH_DATAFLASH=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_AT91=y +CONFIG_DM_SERIAL=y +CONFIG_ATMEL_USART=y +CONFIG_DM_SPI=y +CONFIG_ATMEL_SPI=y diff --git a/include/configs/meesc.h b/include/configs/meesc.h index 3a8e82edbf..2d62f2d446 100644 --- a/include/configs/meesc.h +++ b/include/configs/meesc.h @@ -49,14 +49,6 @@ * Hardware drivers */

-/* general purpose I/O */ -#define CONFIG_AT91_GPIO - -/* Console output */ -#define CONFIG_ATMEL_USART -#define CONFIG_USART_BASE ATMEL_BASE_DBGU -#define CONFIG_USART_ID ATMEL_ID_SYS - /* * BOOTP options */ @@ -73,9 +65,6 @@ #define CONFIG_CMD_NAND #endif

-/* LED */ -#define CONFIG_AT91_LED - /* * SDRAM: 1 bank, min 32, max 128 MB * Initialized before u-boot gets started. @@ -97,18 +86,7 @@ * that address while providing maximum stack area below. */ #define CONFIG_SYS_INIT_SP_ADDR \ - (ATMEL_BASE_SRAM0 + 0x1000 - GENERATED_GBL_DATA_SIZE) - -/* DataFlash */ -#ifdef CONFIG_SYS_USE_DATAFLASH -# define CONFIG_ATMEL_DATAFLASH_SPI -# define CONFIG_HAS_DATAFLASH -# define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 -# define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ -# define AT91_SPI_CLK 15000000 -# define DATAFLASH_TCSS (0x1a << 16) -# define DATAFLASH_TCHS (0x1 << 24) -#endif + (ATMEL_BASE_SRAM0 + 16 * 1024 - GENERATED_GBL_DATA_SIZE)

/* NAND flash */ #ifdef CONFIG_CMD_NAND @@ -134,13 +112,11 @@ #ifdef CONFIG_SYS_USE_DATAFLASH

/* bootstrap + u-boot + env in dataflash on CS0 */ -# define CONFIG_ENV_IS_IN_DATAFLASH -# define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \ - 0x8400) -# define CONFIG_ENV_OFFSET 0x4200 -# define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \ - CONFIG_ENV_OFFSET) -# define CONFIG_ENV_SIZE 0x4200 +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_OFFSET 0x4200 +#define CONFIG_ENV_SIZE 0x4200 +#define CONFIG_ENV_SECT_SIZE 0x210 +#define CONFIG_ENV_SPI_MAX_HZ 15000000

#elif CONFIG_SYS_USE_NANDFLASH