Re: [PATCH v5 3/5] riscv: lib: implement enable_caches for sifive cache

From: Zong Li zong.li@sifive.com Sent: Wednesday, September 01, 2021 3:02 PM To: Rick Jian-Zhi Chen(陳建志) rick@andestech.com; Leo Yu-Chi Liang(梁育齊) ycliang@andestech.com; bmeng.cn@gmail.com; seanga2@gmail.com; green.wan@sifive.com; paul.walmsley@sifive.com; sjg@chromium.org; u-boot@lists.denx.de Cc: Zong Li zong.li@sifive.com Subject: [PATCH v5 3/5] riscv: lib: implement enable_caches for sifive cache
The enable_caches is a generic hook for architecture-implemented, we define this function to enable composable cache of sifive platforms.
In sifive_cache, it invokes the generic cache_enable interface of cache uclass to execute the relative implementation in SiFive ccache driver.
Signed-off-by: Zong Li zong.li@sifive.com
arch/riscv/Kconfig | 5 +++++ arch/riscv/lib/Makefile | 1 + arch/riscv/lib/sifive_cache.c | 27 +++++++++++++++++++++++++++ 3 files changed, 33 insertions(+)
Reviewed-by: Rick Chen rick@andestech.com
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Rick Chen