Re: [U-Boot-Users] (no subject)
Here is the error I get if I use the second DIMMS
U-Boot 1.1.4 (Jul 18 2006 - 07:36:20)
CPU: AMCC PowerPC 440GX Rev. F at 800 MHz (PLB=160, OPB=80, EBC=40 MHz) I2C boot EEPROM enabled Internal PCI arbiter enabled 32 kB I-Cache 32 kB D-Cache Board: Ocotea - AMCC PPC440GX Evaluation Board I2C: ready DRAM: ERROR: Cannot determine a common read delay. ### ERROR ### Please RESET the board ###
Gerald
-----Original Message----- From: Gerald Jackson Sent: Friday, September 29, 2006 6:16 PM To: Marc.Howard@KLA-Tencor.com; sr@denx.de; u-boot-users@lists.sourceforge.net Subject: Re: [U-Boot-Users] (no subject)
Marc,
After you make that change you can use both dimms slot on the ocotea board?
What error did you receive before the modification?
if I use only the second dimm slot with 256M it errors. if I use the first dimm slot it is ok and if I use both dimms slot it error as well.
I am using 1.1.4.
Gerald
-----Original Message----- From: "Howard, Marc"Marc.Howard@KLA-Tencor.com Sent: 9/28/06 5:06:26 PM To: "Stefan Roese"sr@denx.de, "u-boot-users@lists.sourceforge.net"u-boot-users@lists.sourceforge.net Subject: Re: [U-Boot-Users] (no subject)
Stefan,
Actually > 256MB won't work correctly. There is a problem in board/amcc/ocotea/init.S:
tlbtab: tlbtab_start tlbentry( 0xf0000000, SZ_256M, 0xf0000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I) tlbentry( CFG_PERIPHERAL_BASE, SZ_256M, 0x40000000, 1, AC_R|AC_W|SA_G|SA_I) tlbentry( CFG_ISRAM_BASE, SZ_4K, 0x80000000, 0, AC_R|AC_W|AC_X ) tlbentry( CFG_ISRAM_BASE + 0x1000, SZ_4K, 0x80001000, 0, AC_R|AC_W|AC_X ) tlbentry( CFG_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I ) tlbentry( CFG_SDRAM_BASE+0x10000000, SZ_256M, 0x00000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I ) tlbentry( CFG_PCI_BASE, SZ_256M, 0x00000000, 2, AC_R|AC_W|SA_G|SA_I ) tlbentry( CFG_PCI_MEMBASE, SZ_256M, 0x00000000, 3, AC_R|AC_W|SA_G|SA_I ) tlbtab_en
The line:
tlbentry( CFG_SDRAM_BASE+0x10000000, SZ_256M, 0x00000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
...should be...
tlbentry( CFG_SDRAM_BASE+0x10000000, SZ_256M, 0x10000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I ) ^ ------------------------------------------------^
The way it currently stands virtual addresses 256-512MB are mapped into the same region as the 1st 256MB of SDRAM.
Marc Howard
-----Original Message----- From: u-boot-users-bounces@lists.sourceforge.net [mailto:u-boot-users-bounces@lists.sourceforge.net] On Behalf Of Stefan Roese Sent: Thursday, September 28, 2006 5:48 AM To: u-boot-users@lists.sourceforge.net Subject: Re: [U-Boot-Users] (no subject)
Hi Gerald,
On Thursday 28 September 2006 04:03, Gerald Jackson wrote:
Does anyone know why u-boot 1.1.4 fails if you use two dimms in the Ocotea Amcc board?
I have try two 256 dimm, two 512 dimm, and one 256 dimm in
the second
slot ( nothing in the first slot) it all fails.
Is this a know problem with the Ocotea board?
No. IIRC, we have tested Ocotea with different DIMM modules. Which U-Boot version are you using? What DIMM modules are you using? And what combination _is_ working?
A quick look at the TLB setup shows me, that a maximum of 512MBytes could be working. For more at least the TLB setup has to be changed.
Best regards, Stefan
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