From: Jagan Teki jagan@amarulasolutions.com

Add initial dts support for i.MX6 Quad Plus Sabresd board.

Boot from MMC: ------------- U-Boot SPL 2017.03-33690-ga80e4f6-dirty (Mar 30 2017 - 00:40:29) Trying to boot from MMC1

U-Boot 2017.03-33690-ga80e4f6-dirty (Mar 30 2017 - 00:40:29 +0530)

CPU: Freescale i.MX6QP rev1.0 996 MHz (running at 792 MHz) CPU: Automotive temperature grade (-40C to 125C) at 29C Reset cause: POR Model: Freescale i.MX6 Quad Plus SABRE Smart Device Board Board: MX6-SabreSD I2C: ready DRAM: 1 GiB PMIC: PFUZE100 ID=0x10 MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2 *** Warning - bad CRC, using default environment

gpio@020a4000: dir_output: error: gpio GPIO3_19 not reserved gpio@020a4000: set_value: error: gpio GPIO3_19 not reserved gpio@020b4000: dir_output: error: gpio GPIO7_12 not reserved gpio@020b4000: set_value: error: gpio GPIO7_12 not reserved PCI: pcie phy link never came up No panel detected: default to Hannstar-XGA gpio@0209c000: dir_output: error: gpio GPIO1_21 not reserved Display: Hannstar-XGA (1024x768) In: serial Out: serial Err: serial Net: gpio@0209c000: dir_output: error: gpio GPIO1_25 not reserved gpio@0209c000: set_value: error: gpio GPIO1_25 not reserved FEC [PRIME] Hit any key to stop autoboot: 0 =>

Cc: Stefano Babic sbabic@denx.de Cc: Fabio Estevam fabio.estevam@nxp.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- board/freescale/mx6sabresd/mx6sabresd.c | 4 +++- configs/imx6qdl_sabresd_spl_defconfig | 2 +- 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c index 93d0dc4..f7a89bc 100644 --- a/board/freescale/mx6sabresd/mx6sabresd.c +++ b/board/freescale/mx6sabresd/mx6sabresd.c @@ -772,7 +772,9 @@ int spl_start_uboot(void) #ifdef CONFIG_SPL_LOAD_FIT int board_fit_config_name_match(const char *name) { - if (is_mx6dq() && !strcmp(name, "imx6q-sabresd")) + if (is_mx6dqp() && !strcmp(name, "imx6qp-sabresd")) + return 0; + else if (is_mx6dq() && !strcmp(name, "imx6q-sabresd")) return 0; else return -1; diff --git a/configs/imx6qdl_sabresd_spl_defconfig b/configs/imx6qdl_sabresd_spl_defconfig index 27c1311..a292518 100644 --- a/configs/imx6qdl_sabresd_spl_defconfig +++ b/configs/imx6qdl_sabresd_spl_defconfig @@ -13,7 +13,7 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_OF_LIBFDT=y CONFIG_VIDEO=y CONFIG_DEFAULT_DEVICE_TREE="imx6q-sabresd" -CONFIG_OF_LIST="imx6q-sabresd" +CONFIG_OF_LIST="imx6qp-sabresd imx6q-sabresd" CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6Q" CONFIG_BOOTDELAY=3 # CONFIG_CONSOLE_MUX is not set

From: Jagan Teki jagan@amarulasolutions.com

Add PMIC pfuze100 node via i2c2 for i.MX6QDL sabresd boards.

Cc: Stefano Babic sbabic@denx.de Cc: Fabio Estevam fabio.estevam@nxp.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- arch/arm/dts/imx6qdl-sabresd.dtsi | 5 +++++ 1 file changed, 5 insertions(+)

diff --git a/arch/arm/dts/imx6qdl-sabresd.dtsi b/arch/arm/dts/imx6qdl-sabresd.dtsi index 491fdbf..4afa108 100644 --- a/arch/arm/dts/imx6qdl-sabresd.dtsi +++ b/arch/arm/dts/imx6qdl-sabresd.dtsi @@ -34,6 +34,11 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c2>; status = "okay"; + + pmic: pfuze100@08 { + compatible = "fsl,pfuze100"; + reg = <0x08>; + }; };

&i2c3 {

From: Jagan Teki jagan@amarulasolutions.com

Add usb otg node for i.MX6QDL sabresd boards.

Cc: Stefano Babic sbabic@denx.de Cc: Fabio Estevam fabio.estevam@nxp.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- arch/arm/dts/imx6qdl-sabresd.dtsi | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+)

diff --git a/arch/arm/dts/imx6qdl-sabresd.dtsi b/arch/arm/dts/imx6qdl-sabresd.dtsi index e38e370..0e104c1 100644 --- a/arch/arm/dts/imx6qdl-sabresd.dtsi +++ b/arch/arm/dts/imx6qdl-sabresd.dtsi @@ -21,6 +21,17 @@ reg = <0x10000000 0x40000000>; };

+ reg_usb_otg_vbus: regulator@0 { + compatible = "regulator-fixed"; + reg = <0>; + regulator-name = "usb_otg_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio3 22 0>; + enable-active-high; + vin-supply = <&swbst_reg>; + }; + reg_usb_h1_vbus: regulator@1 { compatible = "regulator-fixed"; reg = <1>; @@ -77,6 +88,13 @@ status = "okay"; };

+&usbotg { + vbus-supply = <&reg_usb_otg_vbus>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbotg>; + status = "okay"; +}; + &usdhc2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc2>; @@ -134,6 +152,11 @@ >; };

+ pinctrl_usbotg: usbotggrp { + fsl,pins = < + MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 + >; + };

pinctrl_usdhc2: usdhc2grp { fsl,pins = <

From: Jagan Teki jagan@amarulasolutions.com

Enable DM_USB for dt supported sabresd config boards: - imx6q_sabresd_defconfig - imx6qp_sabresd_defconfig

Cc: Stefano Babic sbabic@denx.de Cc: Fabio Estevam fabio.estevam@nxp.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- board/freescale/mx6sabresd/mx6sabresd.c | 4 ++-- configs/imx6qdl_sabresd_spl_defconfig | 1 + include/configs/mx6sabresd.h | 9 ++++++--- 3 files changed, 9 insertions(+), 5 deletions(-)

diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c index f832697..ac2cabc 100644 --- a/board/freescale/mx6sabresd/mx6sabresd.c +++ b/board/freescale/mx6sabresd/mx6sabresd.c @@ -515,7 +515,7 @@ int board_eth_init(bd_t *bis) return cpu_eth_init(bis); }

-#ifdef CONFIG_USB_EHCI_MX6 +#if defined(CONFIG_USB_EHCI_MX6) && !defined(CONFIG_DM_USB) #define USB_OTHERREGS_OFFSET 0x800 #define UCTRL_PWR_POL (1 << 9)

@@ -599,7 +599,7 @@ int board_init(void) #ifndef CONFIG_DM_I2C setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); #endif -#ifdef CONFIG_USB_EHCI_MX6 +#if defined(CONFIG_USB_EHCI_MX6) && !defined(CONFIG_DM_USB) setup_usb(); #endif

diff --git a/configs/imx6qdl_sabresd_spl_defconfig b/configs/imx6qdl_sabresd_spl_defconfig index 7cad5ab..4d37aff 100644 --- a/configs/imx6qdl_sabresd_spl_defconfig +++ b/configs/imx6qdl_sabresd_spl_defconfig @@ -61,6 +61,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_MMC=y CONFIG_DM_PMIC=y CONFIG_DM_REGULATOR=y +CONFIG_DM_USB=y # CONFIG_BLK is not set # CONFIG_DM_MMC_OPS is not set CONFIG_DM_PMIC_PFUZE100=y diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h index 6abe7a4..4f6bb1b 100644 --- a/include/configs/mx6sabresd.h +++ b/include/configs/mx6sabresd.h @@ -70,12 +70,15 @@

/* USB Configs */ #ifdef CONFIG_USB_EHCI_MX6 -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_USB_HOST_ETHER #define CONFIG_USB_ETHER_ASIX #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Enabled USB controller number */ + +# ifndef CONFIG_DM_USB +# define CONFIG_MXC_USB_FLAGS 0 +# define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Enabled USB controller number */ +# define CONFIG_EHCI_HCD_INIT_AFTER_RESET +# endif #endif

#endif /* __MX6QSABRESD_CONFIG_H */

From: Jagan Teki jagan@amarulasolutions.com

Add FEC node for i.MX6QDL Sabresd boards.

Cc: Stefano Babic sbabic@denx.de Cc: Fabio Estevam fabio.estevam@nxp.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- arch/arm/dts/imx6qdl-sabresd.dtsi | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+)

diff --git a/arch/arm/dts/imx6qdl-sabresd.dtsi b/arch/arm/dts/imx6qdl-sabresd.dtsi index 0e104c1..ca1aa58 100644 --- a/arch/arm/dts/imx6qdl-sabresd.dtsi +++ b/arch/arm/dts/imx6qdl-sabresd.dtsi @@ -44,6 +44,14 @@ }; };

+&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet>; + phy-mode = "rgmii"; + phy-reset-gpios = <&gpio1 25 0>; + status = "okay"; +}; + &i2c1 { clock-frequency = <100000>; pinctrl-names = "default"; @@ -124,6 +132,27 @@

&iomuxc { imx6qdl-sabresd { + pinctrl_enet: enetgrp { + fsl,pins = < + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 + MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 + >; + }; + pinctrl_i2c1: i2c1grp { fsl,pins = < MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1

From: Jagan Teki jagan@amarulasolutions.com

Add initial dts support for i.MX6 DualLite Sabresd board.

Cc: Stefano Babic sbabic@denx.de Cc: Fabio Estevam fabio.estevam@nxp.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- arch/arm/dts/Makefile | 1 + arch/arm/dts/imx6dl-sabresd.dts | 17 +++++++++++++++++ 2 files changed, 18 insertions(+) create mode 100644 arch/arm/dts/imx6dl-sabresd.dts

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index dfcb59a..42165c0 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -332,6 +332,7 @@ dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb \ imx6sll-evk.dtb \ imx6dl-icore.dtb \ imx6dl-icore-rqs.dtb \ + imx6dl-sabresd.dtb \ imx6q-icore.dtb \ imx6q-icore-rqs.dtb \ imx6q-logicpd.dtb \ diff --git a/arch/arm/dts/imx6dl-sabresd.dts b/arch/arm/dts/imx6dl-sabresd.dts new file mode 100644 index 0000000..1e45f2f --- /dev/null +++ b/arch/arm/dts/imx6dl-sabresd.dts @@ -0,0 +1,17 @@ +/* + * Copyright (C) 2013 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/dts-v1/; + +#include "imx6dl.dtsi" +#include "imx6qdl-sabresd.dtsi" + +/ { + model = "Freescale i.MX6 DualLite SABRE Smart Device Board"; + compatible = "fsl,imx6dl-sabresd", "fsl,imx6dl"; +};

From: Jagan Teki jagan@amarulasolutions.com

Add devicetree support for imx6q_sabresd non-spl board.

Cc: Stefano Babic sbabic@denx.de Cc: Fabio Estevam fabio.estevam@nxp.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- configs/imx6q_sabresd_defconfig | 14 ++++++++++++++ 1 file changed, 14 insertions(+)

diff --git a/configs/imx6q_sabresd_defconfig b/configs/imx6q_sabresd_defconfig index e9758e3..6455577 100644 --- a/configs/imx6q_sabresd_defconfig +++ b/configs/imx6q_sabresd_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_TARGET_MX6SABRESD=y CONFIG_VIDEO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-sabresd" CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg,MX6Q" CONFIG_BOOTDELAY=3 # CONFIG_CONSOLE_MUX is not set @@ -44,5 +45,18 @@ CONFIG_G_DNL_VENDOR_NUM=0x0525 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_OF_LIBFDT=y +CONFIG_OF_CONTROL=y +CONFIG_DM_ETH=y +CONFIG_DM_I2C=y +CONFIG_DM_GPIO=y +CONFIG_DM_MMC=y +CONFIG_DM_PMIC=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_USB=y +# CONFIG_BLK is not set +# CONFIG_DM_MMC_OPS is not set +CONFIG_DM_PMIC_PFUZE100=y CONFIG_SYS_I2C_MXC=y CONFIG_FEC_MXC=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX6=y

From: Jagan Teki jagan@amarulasolutions.com

- Removed non-fdt code (becuase which has dt support) - Remove mx6sabresd_spl_defconfig - Re-arrange the header includes and removed unneeded includes. - Move the SPL code in #ifdef CONFIG_SPL_BUILD area.

Cc: Stefano Babic sbabic@denx.de Cc: Fabio Estevam fabio.estevam@nxp.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- board/freescale/mx6sabresd/MAINTAINERS | 1 - board/freescale/mx6sabresd/mx6sabresd.c | 396 +++++--------------------------- configs/mx6sabresd_spl_defconfig | 54 ----- include/configs/mx6sabresd.h | 23 -- 4 files changed, 63 insertions(+), 411 deletions(-) delete mode 100644 configs/mx6sabresd_spl_defconfig

diff --git a/board/freescale/mx6sabresd/MAINTAINERS b/board/freescale/mx6sabresd/MAINTAINERS index 227c6dd..86e62e9 100644 --- a/board/freescale/mx6sabresd/MAINTAINERS +++ b/board/freescale/mx6sabresd/MAINTAINERS @@ -5,5 +5,4 @@ F: board/freescale/mx6sabresd/ F: include/configs/mx6sabresd.h F: configs/imx6dl_sabresd_defconfig F: configs/imx6q_sabresd_defconfig -F: configs/mx6sabresd_spl_defconfig F: configs/imx6qdl_sabresd_spl_defconfig diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c index 7c28cc7..18c5d5d 100644 --- a/board/freescale/mx6sabresd/mx6sabresd.c +++ b/board/freescale/mx6sabresd/mx6sabresd.c @@ -6,30 +6,24 @@ * SPDX-License-Identifier: GPL-2.0+ */

+#include <common.h> +#include <miiphy.h> +#include <mmc.h> +#include <fsl_esdhc.h> + +#include <asm/io.h> +#include <asm/gpio.h> +#include <linux/sizes.h> + #include <asm/arch/clock.h> -#include <asm/arch/imx-regs.h> +#include <asm/arch/crm_regs.h> #include <asm/arch/iomux.h> +#include <asm/arch/mxc_hdmi.h> #include <asm/arch/mx6-pins.h> -#include <linux/errno.h> -#include <asm/gpio.h> -#include <asm/imx-common/mxc_i2c.h> -#include <asm/imx-common/iomux-v3.h> +#include <asm/arch/sys_proto.h> #include <asm/imx-common/boot_mode.h> +#include <asm/imx-common/iomux-v3.h> #include <asm/imx-common/video.h> -#include <mmc.h> -#include <fsl_esdhc.h> -#include <miiphy.h> -#include <netdev.h> -#include <asm/arch/mxc_hdmi.h> -#include <asm/arch/crm_regs.h> -#include <asm/io.h> -#include <asm/arch/sys_proto.h> -#include <i2c.h> -#include <power/pmic.h> -#include <power/pfuze100_pmic.h> -#include "../common/pfuze.h" -#include <asm/arch/mx6-ddr.h> -#include <usb.h>

DECLARE_GLOBAL_DATA_PTR;

@@ -37,28 +31,9 @@ DECLARE_GLOBAL_DATA_PTR; PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ PAD_CTL_SRE_FAST | PAD_CTL_HYS)

-#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ - PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ - PAD_CTL_SRE_FAST | PAD_CTL_HYS) - -#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ - PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) - #define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \ PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)

-#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ - PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ - PAD_CTL_ODE | PAD_CTL_SRE_FAST) - -#define I2C_PMIC 1 - -#define I2C_PAD MUX_PAD_CTRL(I2C_PAD_CTRL) - -#define DISP0_PWR_EN IMX_GPIO_NR(1, 21) - -#define KEY_VOL_UP IMX_GPIO_NR(1, 4) - int dram_init(void) { gd->ram_size = imx_ddr_size(); @@ -70,80 +45,6 @@ static iomux_v3_cfg_t const uart1_pads[] = { MX6_PAD_CSI0_DAT11__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), };

-#ifndef CONFIG_OF_CONTROL -static iomux_v3_cfg_t const enet_pads[] = { - MX6_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), - /* AR8031 PHY Reset */ - MX6_PAD_ENET_CRS_DV__GPIO1_IO25 | MUX_PAD_CTRL(NO_PAD_CTRL), -}; - -static void setup_iomux_enet(void) -{ - imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads)); - - /* Reset AR8031 PHY */ - gpio_direction_output(IMX_GPIO_NR(1, 25) , 0); - mdelay(10); - gpio_set_value(IMX_GPIO_NR(1, 25), 1); - udelay(100); -} -#endif - -static iomux_v3_cfg_t const usdhc2_pads[] = { - MX6_PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_NANDF_D4__SD2_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_NANDF_D5__SD2_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_NANDF_D6__SD2_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_NANDF_D7__SD2_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_NANDF_D2__GPIO2_IO02 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ -}; - -static iomux_v3_cfg_t const usdhc3_pads[] = { - MX6_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_NANDF_D0__GPIO2_IO00 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ -}; - -static iomux_v3_cfg_t const usdhc4_pads[] = { - MX6_PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT4__SD4_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT5__SD4_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT6__SD4_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT7__SD4_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), -}; - static iomux_v3_cfg_t const ecspi1_pads[] = { MX6_PAD_KEY_COL0__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL), MX6_PAD_KEY_COL1__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL), @@ -189,12 +90,11 @@ static iomux_v3_cfg_t const bl_pads[] = {

static void enable_backlight(void) { - imx_iomux_v3_setup_multiple_pads(bl_pads, ARRAY_SIZE(bl_pads)); - -#ifdef CONFIG_OF_CONTROL struct gpio_desc backlight; int ret;

+ imx_iomux_v3_setup_multiple_pads(bl_pads, ARRAY_SIZE(bl_pads)); + /* Set Brightness to high */ ret = dm_gpio_lookup_name("GPIO1_21", &backlight); if (ret) { @@ -210,9 +110,6 @@ static void enable_backlight(void)

dm_gpio_set_dir_flags(&backlight, GPIOD_IS_OUT); dm_gpio_set_value(&backlight, 1); -#else - gpio_direction_output(DISP0_PWR_EN, 1); -#endif }

static void enable_rgb(struct display_info_t const *dev) @@ -226,27 +123,11 @@ static void enable_lvds(struct display_info_t const *dev) enable_backlight(); }

-#ifndef CONFIG_DM_I2C -static struct i2c_pads_info i2c_pad_info1 = { - .scl = { - .i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL | I2C_PAD, - .gpio_mode = MX6_PAD_KEY_COL3__GPIO4_IO12 | I2C_PAD, - .gp = IMX_GPIO_NR(4, 12) - }, - .sda = { - .i2c_mode = MX6_PAD_KEY_ROW3__I2C2_SDA | I2C_PAD, - .gpio_mode = MX6_PAD_KEY_ROW3__GPIO4_IO13 | I2C_PAD, - .gp = IMX_GPIO_NR(4, 13) - } -}; -#endif - static void setup_spi(void) { imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads)); }

-#ifndef CONFIG_OF_CONTROL iomux_v3_cfg_t const pcie_pads[] = { MX6_PAD_EIM_D19__GPIO3_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL), /* POWER */ MX6_PAD_GPIO_17__GPIO7_IO12 | MUX_PAD_CTRL(NO_PAD_CTRL), /* RESET */ @@ -256,7 +137,6 @@ static void setup_pcie(void) { imx_iomux_v3_setup_multiple_pads(pcie_pads, ARRAY_SIZE(pcie_pads)); } -#endif

iomux_v3_cfg_t const di0_pads[] = { MX6_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK, /* DISP0_CLK */ @@ -269,90 +149,6 @@ static void setup_iomux_uart(void) imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); }

-#if defined(CONFIG_FSL_ESDHC) && !defined(CONFIG_OF_CONTROL) -struct fsl_esdhc_cfg usdhc_cfg[3] = { - {USDHC2_BASE_ADDR}, - {USDHC3_BASE_ADDR}, - {USDHC4_BASE_ADDR}, -}; - -#define USDHC2_CD_GPIO IMX_GPIO_NR(2, 2) -#define USDHC3_CD_GPIO IMX_GPIO_NR(2, 0) - -int board_mmc_get_env_dev(int devno) -{ - return devno - 1; -} - -int board_mmc_getcd(struct mmc *mmc) -{ - struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; - int ret = 0; - - switch (cfg->esdhc_base) { - case USDHC2_BASE_ADDR: - ret = !gpio_get_value(USDHC2_CD_GPIO); - break; - case USDHC3_BASE_ADDR: - ret = !gpio_get_value(USDHC3_CD_GPIO); - break; - case USDHC4_BASE_ADDR: - ret = 1; /* eMMC/uSDHC4 is always present */ - break; - } - - return ret; -} - -#ifndef CONFIG_FSL_ESDHC -int board_mmc_init(bd_t *bis) -{ - int ret; - int i; - - /* - * According to the board_mmc_init() the following map is done: - * (U-Boot device node) (Physical Port) - * mmc0 SD2 - * mmc1 SD3 - * mmc2 eMMC - */ - for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { - switch (i) { - case 0: - imx_iomux_v3_setup_multiple_pads( - usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); - gpio_direction_input(USDHC2_CD_GPIO); - usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); - break; - case 1: - imx_iomux_v3_setup_multiple_pads( - usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); - gpio_direction_input(USDHC3_CD_GPIO); - usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); - break; - case 2: - imx_iomux_v3_setup_multiple_pads( - usdhc4_pads, ARRAY_SIZE(usdhc4_pads)); - usdhc_cfg[2].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); - break; - default: - printf("Warning: you configured more USDHC controllers" - "(%d) then supported by the board (%d)\n", - i + 1, CONFIG_SYS_FSL_USDHC_NUM); - return -EINVAL; - } - - ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); - if (ret) - return ret; - } - - return 0; -} -#endif -#endif - static int ar8031_phy_fixup(struct phy_device *phydev) { unsigned short val; @@ -533,7 +329,6 @@ int overwrite_console(void) return 1; }

-#ifdef CONFIG_OF_CONTROL int imx6_pcie_toggle_power(void) { #ifdef CONFIG_PCIE_IMX_POWER_GPIO @@ -592,80 +387,6 @@ int imx6_pcie_toggle_reset(void) #endif return 0; } -#endif - -#ifndef CONFIG_OF_CONTROL -int board_eth_init(bd_t *bis) -{ - setup_iomux_enet(); - setup_pcie(); - - return cpu_eth_init(bis); -} -#endif - -#if defined(CONFIG_USB_EHCI_MX6) && !defined(CONFIG_DM_USB) -#define USB_OTHERREGS_OFFSET 0x800 -#define UCTRL_PWR_POL (1 << 9) - -static iomux_v3_cfg_t const usb_otg_pads[] = { - MX6_PAD_EIM_D22__USB_OTG_PWR | MUX_PAD_CTRL(NO_PAD_CTRL), - MX6_PAD_ENET_RX_ER__USB_OTG_ID | MUX_PAD_CTRL(NO_PAD_CTRL), -}; - -static iomux_v3_cfg_t const usb_hc1_pads[] = { - MX6_PAD_ENET_TXD1__GPIO1_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL), -}; - -static void setup_usb(void) -{ - imx_iomux_v3_setup_multiple_pads(usb_otg_pads, - ARRAY_SIZE(usb_otg_pads)); - - /* - * set daisy chain for otg_pin_id on 6q. - * for 6dl, this bit is reserved - */ - imx_iomux_set_gpr_register(1, 13, 1, 0); - - imx_iomux_v3_setup_multiple_pads(usb_hc1_pads, - ARRAY_SIZE(usb_hc1_pads)); -} - -int board_ehci_hcd_init(int port) -{ - u32 *usbnc_usb_ctrl; - - if (port > 1) - return -EINVAL; - - usbnc_usb_ctrl = (u32 *)(USB_BASE_ADDR + USB_OTHERREGS_OFFSET + - port * 4); - - setbits_le32(usbnc_usb_ctrl, UCTRL_PWR_POL); - - return 0; -} - -int board_ehci_power(int port, int on) -{ - switch (port) { - case 0: - break; - case 1: - if (on) - gpio_direction_output(IMX_GPIO_NR(1, 29), 1); - else - gpio_direction_output(IMX_GPIO_NR(1, 29), 0); - break; - default: - printf("MXC USB port %d not yet supported\n", port); - return -EINVAL; - } - - return 0; -} -#endif

int board_early_init_f(void) { @@ -685,46 +406,10 @@ int board_init(void) #ifdef CONFIG_MXC_SPI setup_spi(); #endif -#ifndef CONFIG_DM_I2C - setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); -#endif -#if defined(CONFIG_USB_EHCI_MX6) && !defined(CONFIG_DM_USB) - setup_usb(); -#endif - - return 0; -} - -#ifndef CONFIG_DM_PMIC -int power_init_board(void) -{ - struct pmic *p; - unsigned int reg; - int ret; - - p = pfuze_common_init(I2C_PMIC); - if (!p) - return -ENODEV; - - ret = pfuze_mode_init(p, APS_PFM); - if (ret < 0) - return ret; - - /* Increase VGEN3 from 2.5 to 2.8V */ - pmic_reg_read(p, PFUZE100_VGEN3VOL, &reg); - reg &= ~LDO_VOL_MASK; - reg |= LDOB_2_80V; - pmic_reg_write(p, PFUZE100_VGEN3VOL, reg); - - /* Increase VGEN5 from 2.8 to 3V */ - pmic_reg_read(p, PFUZE100_VGEN5VOL, &reg); - reg &= ~LDO_VOL_MASK; - reg |= LDOB_3_00V; - pmic_reg_write(p, PFUZE100_VGEN5VOL, reg); + setup_pcie();

return 0; } -#endif

#ifdef CONFIG_MXC_SPI int board_spi_cs_gpio(unsigned bus, unsigned cs) @@ -776,7 +461,51 @@ int checkboard(void)

#ifdef CONFIG_FSL_ESDHC

-#if defined(CONFIG_OF_CONTROL) && !defined(CONFIG_DM_MMC) +#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ + PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +static iomux_v3_cfg_t const usdhc2_pads[] = { + MX6_PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NANDF_D4__SD2_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NANDF_D5__SD2_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NANDF_D6__SD2_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NANDF_D7__SD2_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NANDF_D2__GPIO2_IO02 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ +}; + +static iomux_v3_cfg_t const usdhc3_pads[] = { + MX6_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NANDF_D0__GPIO2_IO00 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ +}; + +static iomux_v3_cfg_t const usdhc4_pads[] = { + MX6_PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT4__SD4_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT5__SD4_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT6__SD4_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT7__SD4_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +}; + struct fsl_esdhc_cfg usdhc_cfg[3] = { {USDHC2_BASE_ADDR}, {USDHC3_BASE_ADDR}, @@ -810,7 +539,6 @@ int board_mmc_getcd(struct mmc *mmc)

return ret; } -#endif

int board_mmc_init(bd_t *bis) { @@ -854,6 +582,8 @@ int board_mmc_init(bd_t *bis) #endif

#ifdef CONFIG_SPL_OS_BOOT +#define KEY_VOL_UP IMX_GPIO_NR(1, 4) + int spl_start_uboot(void) { gpio_direction_input(KEY_VOL_UP); diff --git a/configs/mx6sabresd_spl_defconfig b/configs/mx6sabresd_spl_defconfig deleted file mode 100644 index bba77b6..0000000 --- a/configs/mx6sabresd_spl_defconfig +++ /dev/null @@ -1,54 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_MX6=y -CONFIG_SPL_GPIO_SUPPORT=y -CONFIG_SPL_LIBCOMMON_SUPPORT=y -CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_MX6SABRESD=y -CONFIG_SPL_MMC_SUPPORT=y -CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y -CONFIG_VIDEO=y -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,SPL,MX6Q" -CONFIG_BOOTDELAY=3 -# CONFIG_CONSOLE_MUX is not set -CONFIG_SYS_CONSOLE_IS_IN_ENV=y -CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y -CONFIG_SPL=y -CONFIG_SPL_EXT_SUPPORT=y -CONFIG_SPL_OS_BOOT=y -CONFIG_HUSH_PARSER=y -CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set -# CONFIG_CMD_FLASH is not set -CONFIG_CMD_MMC=y -CONFIG_CMD_SF=y -CONFIG_CMD_I2C=y -CONFIG_CMD_USB=y -CONFIG_CMD_GPIO=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_CACHE=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_EXT4=y -CONFIG_CMD_EXT4_WRITE=y -CONFIG_CMD_FAT=y -CONFIG_CMD_FS_GENERIC=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_PCI=y -CONFIG_USB=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_EHCI_MX6=y -CONFIG_USB_STORAGE=y -CONFIG_USB_GADGET=y -CONFIG_CI_UDC=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="FSL" -CONFIG_G_DNL_VENDOR_NUM=0x0525 -CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 -# CONFIG_VIDEO_SW_CURSOR is not set -CONFIG_OF_LIBFDT=y -CONFIG_SYS_I2C_MXC=y -CONFIG_FEC_MXC=y diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h index 4f6bb1b..df3ab6e 100644 --- a/include/configs/mx6sabresd.h +++ b/include/configs/mx6sabresd.h @@ -51,34 +51,11 @@ #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19) #endif

-/* I2C Configs */ -#if defined(CONFIG_SYS_I2C_MXC) && !defined(CONFIG_DM_I2C) -#define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ -#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ -#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ -#define CONFIG_SYS_I2C_SPEED 100000 -#endif - -/* PMIC */ -#ifndef CONFIG_DM_PMIC_PFUZE100 -#define CONFIG_POWER -#define CONFIG_POWER_I2C -#define CONFIG_POWER_PFUZE100 -#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 -#endif - /* USB Configs */ #ifdef CONFIG_USB_EHCI_MX6 #define CONFIG_USB_HOST_ETHER #define CONFIG_USB_ETHER_ASIX #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) - -# ifndef CONFIG_DM_USB -# define CONFIG_MXC_USB_FLAGS 0 -# define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Enabled USB controller number */ -# define CONFIG_EHCI_HCD_INIT_AFTER_RESET -# endif #endif

#endif /* __MX6QSABRESD_CONFIG_H */

Rename all mx6sabresd files and directories to imx6sabresd, this will eventually compatible with Linux i.MX file notations and also some of the boards(engicam) in the current tree are now following same convention.

Cc: Stefano Babic sbabic@denx.de Cc: Fabio Estevam fabio.estevam@nxp.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- arch/arm/cpu/armv7/mx6/Kconfig | 4 +- .../freescale/{mx6sabresd => imx6sabresd}/Kconfig | 4 +- .../{mx6sabresd => imx6sabresd}/MAINTAINERS | 3 +- .../freescale/{mx6sabresd => imx6sabresd}/Makefile | 2 +- board/freescale/{mx6sabresd => imx6sabresd}/README | 0 .../mx6sabresd.c => imx6sabresd/imx6sabresd.c} | 0 board/freescale/imx6sabresd/mx6dlsabresd.cfg | 131 ++++++++++++++++ board/freescale/imx6sabresd/mx6q_4x_mt41j128.cfg | 169 +++++++++++++++++++++ configs/imx6dl_sabresd_defconfig | 2 +- configs/imx6q_sabresd_defconfig | 2 +- include/configs/{mx6sabresd.h => imx6sabresd.h} | 0 11 files changed, 309 insertions(+), 8 deletions(-) rename board/freescale/{mx6sabresd => imx6sabresd}/Kconfig (70%) rename board/freescale/{mx6sabresd => imx6sabresd}/MAINTAINERS (76%) rename board/freescale/{mx6sabresd => imx6sabresd}/Makefile (86%) rename board/freescale/{mx6sabresd => imx6sabresd}/README (100%) rename board/freescale/{mx6sabresd/mx6sabresd.c => imx6sabresd/imx6sabresd.c} (100%) create mode 100644 board/freescale/imx6sabresd/mx6dlsabresd.cfg create mode 100644 board/freescale/imx6sabresd/mx6q_4x_mt41j128.cfg rename include/configs/{mx6sabresd.h => imx6sabresd.h} (100%)

diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig index af6dad3..5b7c246 100644 --- a/arch/arm/cpu/armv7/mx6/Kconfig +++ b/arch/arm/cpu/armv7/mx6/Kconfig @@ -204,7 +204,7 @@ config TARGET_MX6QSABREAUTO select BOARD_EARLY_INIT_F

config TARGET_MX6SABRESD - bool "mx6sabresd" + bool "imx6sabresd" select BOARD_LATE_INIT select SUPPORT_SPL select DM @@ -404,9 +404,9 @@ source "board/engicam/geam6ul/Kconfig" source "board/engicam/icorem6/Kconfig" source "board/engicam/icorem6_rqs/Kconfig" source "board/engicam/isiotmx6ul/Kconfig" +source "board/freescale/imx6sabresd/Kconfig" source "board/freescale/mx6qarm2/Kconfig" source "board/freescale/mx6qsabreauto/Kconfig" -source "board/freescale/mx6sabresd/Kconfig" source "board/freescale/mx6slevk/Kconfig" source "board/freescale/mx6sllevk/Kconfig" source "board/freescale/mx6sxsabresd/Kconfig" diff --git a/board/freescale/mx6sabresd/Kconfig b/board/freescale/imx6sabresd/Kconfig similarity index 70% rename from board/freescale/mx6sabresd/Kconfig rename to board/freescale/imx6sabresd/Kconfig index e87dea0..54eebf0 100644 --- a/board/freescale/mx6sabresd/Kconfig +++ b/board/freescale/imx6sabresd/Kconfig @@ -1,12 +1,12 @@ if TARGET_MX6SABRESD

config SYS_BOARD - default "mx6sabresd" + default "imx6sabresd"

config SYS_VENDOR default "freescale"

config SYS_CONFIG_NAME - default "mx6sabresd" + default "imx6sabresd"

endif diff --git a/board/freescale/mx6sabresd/MAINTAINERS b/board/freescale/imx6sabresd/MAINTAINERS similarity index 76% rename from board/freescale/mx6sabresd/MAINTAINERS rename to board/freescale/imx6sabresd/MAINTAINERS index 86e62e9..af72f92 100644 --- a/board/freescale/mx6sabresd/MAINTAINERS +++ b/board/freescale/imx6sabresd/MAINTAINERS @@ -1,8 +1,9 @@ MX6SABRESD BOARD M: Fabio Estevam fabio.estevam@nxp.com S: Maintained -F: board/freescale/mx6sabresd/ F: include/configs/mx6sabresd.h +F: board/freescale/imx6sabresd/ +F: include/configs/imx6sabresd.h F: configs/imx6dl_sabresd_defconfig F: configs/imx6q_sabresd_defconfig F: configs/imx6qdl_sabresd_spl_defconfig diff --git a/board/freescale/mx6sabresd/Makefile b/board/freescale/imx6sabresd/Makefile similarity index 86% rename from board/freescale/mx6sabresd/Makefile rename to board/freescale/imx6sabresd/Makefile index cfca2ef..5459f46 100644 --- a/board/freescale/mx6sabresd/Makefile +++ b/board/freescale/imx6sabresd/Makefile @@ -6,4 +6,4 @@ # SPDX-License-Identifier: GPL-2.0+ #

-obj-y := mx6sabresd.o +obj-y := imx6sabresd.o diff --git a/board/freescale/mx6sabresd/README b/board/freescale/imx6sabresd/README similarity index 100% rename from board/freescale/mx6sabresd/README rename to board/freescale/imx6sabresd/README diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/imx6sabresd/imx6sabresd.c similarity index 100% rename from board/freescale/mx6sabresd/mx6sabresd.c rename to board/freescale/imx6sabresd/imx6sabresd.c diff --git a/board/freescale/imx6sabresd/mx6dlsabresd.cfg b/board/freescale/imx6sabresd/mx6dlsabresd.cfg new file mode 100644 index 0000000..be9f87f --- /dev/null +++ b/board/freescale/imx6sabresd/mx6dlsabresd.cfg @@ -0,0 +1,131 @@ +/* + * Copyright (C) 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Refer doc/README.imximage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ + +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ + +BOOT_FROM sd + +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ +DATA 4 0x020e0774 0x000C0000 +DATA 4 0x020e0754 0x00000000 +DATA 4 0x020e04ac 0x00000030 +DATA 4 0x020e04b0 0x00000030 +DATA 4 0x020e0464 0x00000030 +DATA 4 0x020e0490 0x00000030 +DATA 4 0x020e074c 0x00000030 +DATA 4 0x020e0494 0x00000030 +DATA 4 0x020e04a0 0x00000000 +DATA 4 0x020e04b4 0x00000030 +DATA 4 0x020e04b8 0x00000030 +DATA 4 0x020e076c 0x00000030 +DATA 4 0x020e0750 0x00020000 +DATA 4 0x020e04bc 0x00000030 +DATA 4 0x020e04c0 0x00000030 +DATA 4 0x020e04c4 0x00000030 +DATA 4 0x020e04c8 0x00000030 +DATA 4 0x020e04cc 0x00000030 +DATA 4 0x020e04d0 0x00000030 +DATA 4 0x020e04d4 0x00000030 +DATA 4 0x020e04d8 0x00000030 +DATA 4 0x020e0760 0x00020000 +DATA 4 0x020e0764 0x00000030 +DATA 4 0x020e0770 0x00000030 +DATA 4 0x020e0778 0x00000030 +DATA 4 0x020e077c 0x00000030 +DATA 4 0x020e0780 0x00000030 +DATA 4 0x020e0784 0x00000030 +DATA 4 0x020e078c 0x00000030 +DATA 4 0x020e0748 0x00000030 +DATA 4 0x020e0470 0x00000030 +DATA 4 0x020e0474 0x00000030 +DATA 4 0x020e0478 0x00000030 +DATA 4 0x020e047c 0x00000030 +DATA 4 0x020e0480 0x00000030 +DATA 4 0x020e0484 0x00000030 +DATA 4 0x020e0488 0x00000030 +DATA 4 0x020e048c 0x00000030 +DATA 4 0x021b0800 0xa1390003 +DATA 4 0x021b080c 0x001F001F +DATA 4 0x021b0810 0x001F001F +DATA 4 0x021b480c 0x001F001F +DATA 4 0x021b4810 0x001F001F +DATA 4 0x021b083c 0x4220021F +DATA 4 0x021b0840 0x0207017E +DATA 4 0x021b483c 0x4201020C +DATA 4 0x021b4840 0x01660172 +DATA 4 0x021b0848 0x4A4D4E4D +DATA 4 0x021b4848 0x4A4F5049 +DATA 4 0x021b0850 0x3F3C3D31 +DATA 4 0x021b4850 0x3238372B +DATA 4 0x021b081c 0x33333333 +DATA 4 0x021b0820 0x33333333 +DATA 4 0x021b0824 0x33333333 +DATA 4 0x021b0828 0x33333333 +DATA 4 0x021b481c 0x33333333 +DATA 4 0x021b4820 0x33333333 +DATA 4 0x021b4824 0x33333333 +DATA 4 0x021b4828 0x33333333 +DATA 4 0x021b08b8 0x00000800 +DATA 4 0x021b48b8 0x00000800 +DATA 4 0x021b0004 0x0002002D +DATA 4 0x021b0008 0x00333030 +DATA 4 0x021b000c 0x3F435313 +DATA 4 0x021b0010 0xB66E8B63 +DATA 4 0x021b0014 0x01FF00DB +DATA 4 0x021b0018 0x00001740 +DATA 4 0x021b001c 0x00008000 +DATA 4 0x021b002c 0x000026d2 +DATA 4 0x021b0030 0x00431023 +DATA 4 0x021b0040 0x00000027 +DATA 4 0x021b0000 0x831A0000 +DATA 4 0x021b001c 0x04008032 +DATA 4 0x021b001c 0x00008033 +DATA 4 0x021b001c 0x00048031 +DATA 4 0x021b001c 0x05208030 +DATA 4 0x021b001c 0x04008040 +DATA 4 0x021b0020 0x00005800 +DATA 4 0x021b0818 0x00011117 +DATA 4 0x021b4818 0x00011117 +DATA 4 0x021b0004 0x0002556D +DATA 4 0x021b0404 0x00011006 +DATA 4 0x021b001c 0x00000000 + +/* set the default clock gate to save power */ +DATA 4 0x020c4068 0x00C03F3F +DATA 4 0x020c406c 0x0030FC03 +DATA 4 0x020c4070 0x0FFFC000 +DATA 4 0x020c4074 0x3FF00000 +DATA 4 0x020c4078 0x00FFF300 +DATA 4 0x020c407c 0x0F0000C3 +DATA 4 0x020c4080 0x000003FF + +/* enable AXI cache for VDOA/VPU/IPU */ +DATA 4 0x020e0010 0xF00000CF +/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ +DATA 4 0x020e0018 0x007F007F +DATA 4 0x020e001c 0x007F007F diff --git a/board/freescale/imx6sabresd/mx6q_4x_mt41j128.cfg b/board/freescale/imx6sabresd/mx6q_4x_mt41j128.cfg new file mode 100644 index 0000000..bb6c60b --- /dev/null +++ b/board/freescale/imx6sabresd/mx6q_4x_mt41j128.cfg @@ -0,0 +1,169 @@ +/* + * Copyright (C) 2011 Freescale Semiconductor, Inc. + * Jason Liu r64343@freescale.com + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Refer doc/README.imximage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM sd + +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ +DATA 4 0x020e05a8 0x00000030 +DATA 4 0x020e05b0 0x00000030 +DATA 4 0x020e0524 0x00000030 +DATA 4 0x020e051c 0x00000030 + +DATA 4 0x020e0518 0x00000030 +DATA 4 0x020e050c 0x00000030 +DATA 4 0x020e05b8 0x00000030 +DATA 4 0x020e05c0 0x00000030 + +DATA 4 0x020e05ac 0x00020030 +DATA 4 0x020e05b4 0x00020030 +DATA 4 0x020e0528 0x00020030 +DATA 4 0x020e0520 0x00020030 + +DATA 4 0x020e0514 0x00020030 +DATA 4 0x020e0510 0x00020030 +DATA 4 0x020e05bc 0x00020030 +DATA 4 0x020e05c4 0x00020030 + +DATA 4 0x020e056c 0x00020030 +DATA 4 0x020e0578 0x00020030 +DATA 4 0x020e0588 0x00020030 +DATA 4 0x020e0594 0x00020030 + +DATA 4 0x020e057c 0x00020030 +DATA 4 0x020e0590 0x00003000 +DATA 4 0x020e0598 0x00003000 +DATA 4 0x020e058c 0x00000000 + +DATA 4 0x020e059c 0x00003030 +DATA 4 0x020e05a0 0x00003030 +DATA 4 0x020e0784 0x00000030 +DATA 4 0x020e0788 0x00000030 + +DATA 4 0x020e0794 0x00000030 +DATA 4 0x020e079c 0x00000030 +DATA 4 0x020e07a0 0x00000030 +DATA 4 0x020e07a4 0x00000030 + +DATA 4 0x020e07a8 0x00000030 +DATA 4 0x020e0748 0x00000030 +DATA 4 0x020e074c 0x00000030 +DATA 4 0x020e0750 0x00020000 + +DATA 4 0x020e0758 0x00000000 +DATA 4 0x020e0774 0x00020000 +DATA 4 0x020e078c 0x00000030 +DATA 4 0x020e0798 0x000C0000 + +DATA 4 0x021b081c 0x33333333 +DATA 4 0x021b0820 0x33333333 +DATA 4 0x021b0824 0x33333333 +DATA 4 0x021b0828 0x33333333 + +DATA 4 0x021b481c 0x33333333 +DATA 4 0x021b4820 0x33333333 +DATA 4 0x021b4824 0x33333333 +DATA 4 0x021b4828 0x33333333 + +DATA 4 0x021b0018 0x00081740 + +DATA 4 0x021b001c 0x00008000 +DATA 4 0x021b000c 0x555A7974 +DATA 4 0x021b0010 0xDB538F64 +DATA 4 0x021b0014 0x01FF00DB +DATA 4 0x021b002c 0x000026D2 + +DATA 4 0x021b0030 0x005A1023 +DATA 4 0x021b0008 0x09444040 +DATA 4 0x021b0004 0x00025576 +DATA 4 0x021b0040 0x00000027 +DATA 4 0x021b0000 0x831A0000 + +DATA 4 0x021b001c 0x04088032 +DATA 4 0x021b001c 0x0408803A +DATA 4 0x021b001c 0x00008033 +DATA 4 0x021b001c 0x0000803B +DATA 4 0x021b001c 0x00428031 +DATA 4 0x021b001c 0x00428039 +DATA 4 0x021b001c 0x19308030 +DATA 4 0x021b001c 0x19308038 + +DATA 4 0x021b001c 0x04008040 +DATA 4 0x021b001c 0x04008048 +DATA 4 0x021b0800 0xA1380003 +DATA 4 0x021b4800 0xA1380003 +DATA 4 0x021b0020 0x00005800 +DATA 4 0x021b0818 0x00022227 +DATA 4 0x021b4818 0x00022227 + +DATA 4 0x021b083c 0x434B0350 +DATA 4 0x021b0840 0x034C0359 +DATA 4 0x021b483c 0x434B0350 +DATA 4 0x021b4840 0x03650348 +DATA 4 0x021b0848 0x4436383B +DATA 4 0x021b4848 0x39393341 +DATA 4 0x021b0850 0x35373933 +DATA 4 0x021b4850 0x48254A36 + +DATA 4 0x021b080c 0x001F001F +DATA 4 0x021b0810 0x001F001F + +DATA 4 0x021b480c 0x00440044 +DATA 4 0x021b4810 0x00440044 + +DATA 4 0x021b08b8 0x00000800 +DATA 4 0x021b48b8 0x00000800 + +DATA 4 0x021b001c 0x00000000 +DATA 4 0x021b0404 0x00011006 + +/* set the default clock gate to save power */ +DATA 4 0x020c4068 0x00C03F3F +DATA 4 0x020c406c 0x0030FC03 +DATA 4 0x020c4070 0x0FFFC000 +DATA 4 0x020c4074 0x3FF00000 +DATA 4 0x020c4078 0x00FFF300 +DATA 4 0x020c407c 0x0F0000C3 +DATA 4 0x020c4080 0x000003FF + +/* enable AXI cache for VDOA/VPU/IPU */ +DATA 4 0x020e0010 0xF00000CF +/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ +DATA 4 0x020e0018 0x007F007F +DATA 4 0x020e001c 0x007F007F + +/* + * Setup CCM_CCOSR register as follows: + * + * cko1_en = 1 --> CKO1 enabled + * cko1_div = 111 --> divide by 8 + * cko1_sel = 1011 --> ahb_clk_root + * + * This sets CKO1 at ahb_clk_root/8 = 132/8 = 16.5 MHz + */ +DATA 4 0x020c4060 0x000000fb diff --git a/configs/imx6dl_sabresd_defconfig b/configs/imx6dl_sabresd_defconfig index 17df90b..91a5776 100644 --- a/configs/imx6dl_sabresd_defconfig +++ b/configs/imx6dl_sabresd_defconfig @@ -3,7 +3,7 @@ CONFIG_ARCH_MX6=y CONFIG_TARGET_MX6SABRESD=y CONFIG_VIDEO=y CONFIG_DEFAULT_DEVICE_TREE="imx6dl-sabresd" -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sabresd/mx6dlsabresd.cfg,MX6DL" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/imx6sabresd/mx6dlsabresd.cfg,MX6DL" CONFIG_BOOTDELAY=3 # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y diff --git a/configs/imx6q_sabresd_defconfig b/configs/imx6q_sabresd_defconfig index 6455577..43ca1fc 100644 --- a/configs/imx6q_sabresd_defconfig +++ b/configs/imx6q_sabresd_defconfig @@ -3,7 +3,7 @@ CONFIG_ARCH_MX6=y CONFIG_TARGET_MX6SABRESD=y CONFIG_VIDEO=y CONFIG_DEFAULT_DEVICE_TREE="imx6q-sabresd" -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg,MX6Q" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/imx6sabresd/mx6q_4x_mt41j128.cfg,MX6Q" CONFIG_BOOTDELAY=3 # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y diff --git a/include/configs/mx6sabresd.h b/include/configs/imx6sabresd.h similarity index 100% rename from include/configs/mx6sabresd.h rename to include/configs/imx6sabresd.h

From: Jagan Teki jagan@amarulasolutions.com

Rename MX6SABRESD with IMX6SABRESD so-that it can compatible with Linux i.MX file notations.

Cc: Stefano Babic sbabic@denx.de Cc: Fabio Estevam fabio.estevam@nxp.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- arch/arm/cpu/armv7/mx6/Kconfig | 16 ++++++++-------- board/freescale/imx6sabresd/Kconfig | 2 +- board/freescale/imx6sabresd/MAINTAINERS | 2 +- configs/imx6dl_sabresd_defconfig | 2 +- configs/imx6q_sabresd_defconfig | 2 +- configs/imx6qdl_sabresd_spl_defconfig | 2 +- 6 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig index 5b7c246..a6958ba 100644 --- a/arch/arm/cpu/armv7/mx6/Kconfig +++ b/arch/arm/cpu/armv7/mx6/Kconfig @@ -141,6 +141,14 @@ config TARGET_GW_VENTANA bool "gw_ventana" select SUPPORT_SPL

+config TARGET_IMX6SABRESD + bool "imx6sabresd" + select BOARD_LATE_INIT + select SUPPORT_SPL + select DM + select DM_THERMAL + select BOARD_EARLY_INIT_F + config TARGET_KOSAGI_NOVENA bool "Kosagi Novena" select BOARD_LATE_INIT @@ -203,14 +211,6 @@ config TARGET_MX6QSABREAUTO select DM_THERMAL select BOARD_EARLY_INIT_F

-config TARGET_MX6SABRESD - bool "imx6sabresd" - select BOARD_LATE_INIT - select SUPPORT_SPL - select DM - select DM_THERMAL - select BOARD_EARLY_INIT_F - config TARGET_MX6SLEVK bool "mx6slevk" select SUPPORT_SPL diff --git a/board/freescale/imx6sabresd/Kconfig b/board/freescale/imx6sabresd/Kconfig index 54eebf0..958b90d 100644 --- a/board/freescale/imx6sabresd/Kconfig +++ b/board/freescale/imx6sabresd/Kconfig @@ -1,4 +1,4 @@ -if TARGET_MX6SABRESD +if TARGET_IMX6SABRESD

config SYS_BOARD default "imx6sabresd" diff --git a/board/freescale/imx6sabresd/MAINTAINERS b/board/freescale/imx6sabresd/MAINTAINERS index af72f92..742799f 100644 --- a/board/freescale/imx6sabresd/MAINTAINERS +++ b/board/freescale/imx6sabresd/MAINTAINERS @@ -1,4 +1,4 @@ -MX6SABRESD BOARD +IMX6SABRESD BOARD M: Fabio Estevam fabio.estevam@nxp.com S: Maintained F: include/configs/mx6sabresd.h diff --git a/configs/imx6dl_sabresd_defconfig b/configs/imx6dl_sabresd_defconfig index 91a5776..e0fc344 100644 --- a/configs/imx6dl_sabresd_defconfig +++ b/configs/imx6dl_sabresd_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y -CONFIG_TARGET_MX6SABRESD=y +CONFIG_TARGET_IMX6SABRESD=y CONFIG_VIDEO=y CONFIG_DEFAULT_DEVICE_TREE="imx6dl-sabresd" CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/imx6sabresd/mx6dlsabresd.cfg,MX6DL" diff --git a/configs/imx6q_sabresd_defconfig b/configs/imx6q_sabresd_defconfig index 43ca1fc..de44e02 100644 --- a/configs/imx6q_sabresd_defconfig +++ b/configs/imx6q_sabresd_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y -CONFIG_TARGET_MX6SABRESD=y +CONFIG_TARGET_IMX6SABRESD=y CONFIG_VIDEO=y CONFIG_DEFAULT_DEVICE_TREE="imx6q-sabresd" CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/imx6sabresd/mx6q_4x_mt41j128.cfg,MX6Q" diff --git a/configs/imx6qdl_sabresd_spl_defconfig b/configs/imx6qdl_sabresd_spl_defconfig index 46f9619..9d8c071 100644 --- a/configs/imx6qdl_sabresd_spl_defconfig +++ b/configs/imx6qdl_sabresd_spl_defconfig @@ -3,7 +3,7 @@ CONFIG_ARCH_MX6=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_MX6SABRESD=y +CONFIG_TARGET_IMX6SABRESD=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y

From: Jagan Teki jagan@amarulasolutions.com

Since SabreSD is supporting fdt, there is no use of printing the board name explicitly using checkboard because dtb supported u-boot will print model like this

Model: Freescale i.MX6 Quad Plus SABRE Smart Device Board

Cc: Stefano Babic sbabic@denx.de Cc: Fabio Estevam fabio.estevam@nxp.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- board/freescale/imx6sabresd/imx6sabresd.c | 6 ------ 1 file changed, 6 deletions(-)

diff --git a/board/freescale/imx6sabresd/imx6sabresd.c b/board/freescale/imx6sabresd/imx6sabresd.c index 18c5d5d..64a44cb 100644 --- a/board/freescale/imx6sabresd/imx6sabresd.c +++ b/board/freescale/imx6sabresd/imx6sabresd.c @@ -449,12 +449,6 @@ int board_late_init(void) return 0; }

-int checkboard(void) -{ - puts("Board: MX6-SabreSD\n"); - return 0; -} - #ifdef CONFIG_SPL_BUILD #include <spl.h> #include <libfdt.h>

From: Jagan Teki jagan@amarulasolutions.com

- Give proper tab alignment for display_info_t structure - Add tab spaces UART_PAD_CTRL and SPI_PAD_CTRL - Give proper alignment of reg init values on setup_display - Add space and newline on board_init_f

Cc: Stefano Babic sbabic@denx.de Cc: Fabio Estevam fabio.estevam@nxp.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- board/freescale/imx6sabresd/imx6sabresd.c | 183 +++++++++++++++--------------- 1 file changed, 94 insertions(+), 89 deletions(-)

diff --git a/board/freescale/imx6sabresd/imx6sabresd.c b/board/freescale/imx6sabresd/imx6sabresd.c index 64a44cb..7af18bc 100644 --- a/board/freescale/imx6sabresd/imx6sabresd.c +++ b/board/freescale/imx6sabresd/imx6sabresd.c @@ -27,12 +27,11 @@

DECLARE_GLOBAL_DATA_PTR;

-#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ - PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ - PAD_CTL_SRE_FAST | PAD_CTL_HYS) - -#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \ - PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) +#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) +#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)

int dram_init(void) { @@ -201,67 +200,72 @@ static void do_enable_hdmi(struct display_info_t const *dev) imx_enable_hdmi_phy(); }

-struct display_info_t const displays[] = {{ - .bus = -1, - .addr = 0, - .pixfmt = IPU_PIX_FMT_RGB666, - .detect = NULL, - .enable = enable_lvds, - .mode = { - .name = "Hannstar-XGA", - .refresh = 60, - .xres = 1024, - .yres = 768, - .pixclock = 15384, - .left_margin = 160, - .right_margin = 24, - .upper_margin = 29, - .lower_margin = 3, - .hsync_len = 136, - .vsync_len = 6, - .sync = FB_SYNC_EXT, - .vmode = FB_VMODE_NONINTERLACED -} }, { - .bus = -1, - .addr = 0, - .pixfmt = IPU_PIX_FMT_RGB24, - .detect = detect_hdmi, - .enable = do_enable_hdmi, - .mode = { - .name = "HDMI", - .refresh = 60, - .xres = 1024, - .yres = 768, - .pixclock = 15384, - .left_margin = 160, - .right_margin = 24, - .upper_margin = 29, - .lower_margin = 3, - .hsync_len = 136, - .vsync_len = 6, - .sync = FB_SYNC_EXT, - .vmode = FB_VMODE_NONINTERLACED -} }, { - .bus = 0, - .addr = 0, - .pixfmt = IPU_PIX_FMT_RGB24, - .detect = NULL, - .enable = enable_rgb, - .mode = { - .name = "SEIKO-WVGA", - .refresh = 60, - .xres = 800, - .yres = 480, - .pixclock = 29850, - .left_margin = 89, - .right_margin = 164, - .upper_margin = 23, - .lower_margin = 10, - .hsync_len = 10, - .vsync_len = 10, - .sync = 0, - .vmode = FB_VMODE_NONINTERLACED -} } }; +struct display_info_t const displays[] = { + { + .bus = -1, + .addr = 0, + .pixfmt = IPU_PIX_FMT_RGB666, + .detect = NULL, + .enable = enable_lvds, + .mode = { + .name = "Hannstar-XGA", + .refresh = 60, + .xres = 1024, + .yres = 768, + .pixclock = 15384, + .left_margin = 160, + .right_margin = 24, + .upper_margin = 29, + .lower_margin = 3, + .hsync_len = 136, + .vsync_len = 6, + .sync = FB_SYNC_EXT, + .vmode = FB_VMODE_NONINTERLACED + } + }, { + .bus = -1, + .addr = 0, + .pixfmt = IPU_PIX_FMT_RGB24, + .detect = detect_hdmi, + .enable = do_enable_hdmi, + .mode = { + .name = "HDMI", + .refresh = 60, + .xres = 1024, + .yres = 768, + .pixclock = 15384, + .left_margin = 160, + .right_margin = 24, + .upper_margin = 29, + .lower_margin = 3, + .hsync_len = 136, + .vsync_len = 6, + .sync = FB_SYNC_EXT, + .vmode = FB_VMODE_NONINTERLACED + } + }, { + .bus = 0, + .addr = 0, + .pixfmt = IPU_PIX_FMT_RGB24, + .detect = NULL, + .enable = enable_rgb, + .mode = { + .name = "SEIKO-WVGA", + .refresh = 60, + .xres = 800, + .yres = 480, + .pixclock = 29850, + .left_margin = 89, + .right_margin = 164, + .upper_margin = 23, + .lower_margin = 10, + .hsync_len = 10, + .vsync_len = 10, + .sync = 0, + .vmode = FB_VMODE_NONINTERLACED + } + } +}; size_t display_count = ARRAY_SIZE(displays);

static void setup_display(void) @@ -283,10 +287,10 @@ static void setup_display(void)

/* set LDB0, LDB1 clk select to 011/011 */ reg = readl(&mxc_ccm->cs2cdr); - reg &= ~(MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK - | MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_MASK); - reg |= (3 << MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET) - | (3 << MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET); + reg &= ~(MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK | + MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_MASK); + reg |= (3 << MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET) | + (3 << MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET); writel(reg, &mxc_ccm->cs2cdr);

reg = readl(&mxc_ccm->cscmr2); @@ -294,28 +298,28 @@ static void setup_display(void) writel(reg, &mxc_ccm->cscmr2);

reg = readl(&mxc_ccm->chsccdr); - reg |= (CHSCCDR_CLK_SEL_LDB_DI0 - << MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET); - reg |= (CHSCCDR_CLK_SEL_LDB_DI0 - << MXC_CCM_CHSCCDR_IPU1_DI1_CLK_SEL_OFFSET); + reg |= (CHSCCDR_CLK_SEL_LDB_DI0 << + MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET); + reg |= (CHSCCDR_CLK_SEL_LDB_DI0 << + MXC_CCM_CHSCCDR_IPU1_DI1_CLK_SEL_OFFSET); writel(reg, &mxc_ccm->chsccdr);

- reg = IOMUXC_GPR2_BGREF_RRMODE_EXTERNAL_RES - | IOMUXC_GPR2_DI1_VS_POLARITY_ACTIVE_LOW - | IOMUXC_GPR2_DI0_VS_POLARITY_ACTIVE_LOW - | IOMUXC_GPR2_BIT_MAPPING_CH1_SPWG - | IOMUXC_GPR2_DATA_WIDTH_CH1_18BIT - | IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG - | IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT - | IOMUXC_GPR2_LVDS_CH0_MODE_DISABLED - | IOMUXC_GPR2_LVDS_CH1_MODE_ENABLED_DI0; + reg = IOMUXC_GPR2_BGREF_RRMODE_EXTERNAL_RES | + IOMUXC_GPR2_DI1_VS_POLARITY_ACTIVE_LOW | + IOMUXC_GPR2_DI0_VS_POLARITY_ACTIVE_LOW | + IOMUXC_GPR2_BIT_MAPPING_CH1_SPWG | + IOMUXC_GPR2_DATA_WIDTH_CH1_18BIT | + IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG | + IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT | + IOMUXC_GPR2_LVDS_CH0_MODE_DISABLED | + IOMUXC_GPR2_LVDS_CH1_MODE_ENABLED_DI0; writel(reg, &iomux->gpr[2]);

reg = readl(&iomux->gpr[3]); - reg = (reg & ~(IOMUXC_GPR3_LVDS1_MUX_CTL_MASK - | IOMUXC_GPR3_HDMI_MUX_CTL_MASK)) - | (IOMUXC_GPR3_MUX_SRC_IPU1_DI0 - << IOMUXC_GPR3_LVDS1_MUX_CTL_OFFSET); + reg = (reg & ~(IOMUXC_GPR3_LVDS1_MUX_CTL_MASK | + IOMUXC_GPR3_HDMI_MUX_CTL_MASK)) | + (IOMUXC_GPR3_MUX_SRC_IPU1_DI0 << + IOMUXC_GPR3_LVDS1_MUX_CTL_OFFSET); writel(reg, &iomux->gpr[3]); } #endif /* CONFIG_VIDEO_IPUV3 */ @@ -538,6 +542,7 @@ int board_mmc_init(bd_t *bis) { struct src *psrc = (struct src *)SRC_BASE_ADDR; unsigned reg = readl(&psrc->sbmr1) >> 11; + /* * Upon reading BOOT_CFG register the following map is done: * Bit 11 and 12 of BOOT_CFG register can determine the current @@ -546,7 +551,6 @@ int board_mmc_init(bd_t *bis) * 0x2 SD2 * 0x3 SD4 */ - switch (reg & 0x3) { case 0x1: imx_iomux_v3_setup_multiple_pads( @@ -836,6 +840,7 @@ void board_init_f(ulong dummy) arch_cpu_init();

ccgr_init(); + gpr_init();

/* iomux and setup of i2c */

From: Jagan Teki jagan@amarulasolutions.com

Now SabreSD board support SPL and non-SPL with devicetree enabled, so update the README according with images generated with respective builds.

Cc: Stefano Babic sbabic@denx.de Cc: Fabio Estevam fabio.estevam@nxp.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- board/freescale/imx6sabresd/README | 46 +++++++++++++++++++------------------- 1 file changed, 23 insertions(+), 23 deletions(-)

diff --git a/board/freescale/imx6sabresd/README b/board/freescale/imx6sabresd/README index 628d35f..71f9fe2 100644 --- a/board/freescale/imx6sabresd/README +++ b/board/freescale/imx6sabresd/README @@ -3,11 +3,11 @@ How to use and build U-Boot on mx6sabresd:

Currently there are four methods for booting mx6sabresd boards:

-1. Booting from SD card via normal U-Boot (u-boot.imx) +1. Booting from SD card via normal U-Boot (u-boot-dtb.imx)

2. Booting from eMMC via normal U-Boot

-3. Booting via SPL (SPL and u-boot.img) +3. Booting via SPL (SPL and u-boot-dtb.img)

4. Booting via Falcon mode (SPL launches the kernel directly)

@@ -15,42 +15,42 @@ Currently there are four methods for booting mx6sabresd boards: 1. Booting from SD card via normal U-Boot -----------------------------------------

-$ make mx6qsabresd_defconfig (If you want to build for mx6qsabresd) +$ make imx6q_sabresd_defconfig (If you want to build for imx6 quad sabresd)

or

-$ make mx6dlsabresd_defconfig (If you want to build for mx6dlsabresd) +$ make imx6dl_sabresd_defconfig (If you want to build for imx6 duallite sabresd)

$ make

-This will generate the image called u-boot.imx. +This will generate the image called u-boot-dtb.imx.

-- Flash the u-boot.imx binary into the SD card: +- Flash the u-boot-dtb.imx binary into the SD card:

-$ sudo dd if=u-boot.imx of=/dev/sdb bs=1K seek=1 && sync +$ sudo dd if=u-boot-dtb.imx of=/dev/sdb bs=1K seek=1 && sync

2. Booting from eMMC via normal U-Boot --------------------------------------

-$ make mx6qsabresd_defconfig (If you want to build for mx6qsabresd) +$ make imx6q_sabresd_defconfig (If you want to build for imx6 quad sabresd)

or

-$ make mx6dlsabresd_defconfig (If you want to build for mx6dlsabresd) +$ make imx6dl_sabresd_defconfig (If you want to build for imx6 duallite sabresd)

$ make

-This will generate the image called u-boot.imx. +This will generate the image called u-boot-dtb.imx.

-- Flash the u-boot.imx binary into the eMMC: +- Flash the u-boot-dtb.imx binary into the eMMC:

Set SW6 to download mode: 00001100

Plug a usb cable to USB-OTG and load the u-boot image using the imx_usb_loader tool (https://github.com/boundarydevices/imx_usb_loader):

-$ sudo ./imx_usb u-boot.imx +$ sudo ./imx_usb u-boot-dtb.imx

In U-boot change the eMMC partition config:

@@ -60,9 +60,9 @@ Mount the eMMC in the host PC:

=> ums 0 mmc 2

-Flash the u-boot.imx binary +Flash the u-boot-dtb.imx binary

-$ sudo dd if=u-boot.imx of=/dev/sdX bs=1K seek=1 && sync +$ sudo dd if=u-boot-dtb.imx of=/dev/sdX bs=1K seek=1 && sync

Set SW6 to eMMC 8-bit boot: 11010110

@@ -70,38 +70,38 @@ Set SW6 to eMMC 8-bit boot: 11010110 3. Booting via SPL ------------------

-Other method for building U-Boot on mx6qsabresd and mx6qpsabresd is +Other method for building U-Boot on imx6 quad and quadplus sabresd is through SPL. In order to do so:

-$ make mx6sabresd_spl_defconfig +$ make imx6qdl_sabresd_spl_defconfig $ make

-This will generate the SPL image called SPL and the u-boot.img. +This will generate the SPL image called SPL and the u-boot-dtb.img.

- Flash the SPL image into the SD card:

$ sudo dd if=SPL of=/dev/sdb bs=1K seek=1 && sync

-- Flash the u-boot.img image into the SD card: +- Flash the u-boot-dtb.img image into the SD card:

-$ sudo dd if=u-boot.img of=/dev/sdb bs=1K seek=69 && sync +$ sudo dd if=u-boot-dtb.img of=/dev/sdb bs=1K seek=69 && sync

4. Booting via Falcon mode --------------------------

-$ make mx6sabresd_spl_defconfig +$ make imx6qdl_sabresd_spl_defconfig $ make

-This will generate the SPL image called SPL and the u-boot.img. +This will generate the SPL image called SPL and the u-boot-dtb.img.

- Flash the SPL image into the SD card:

$ sudo dd if=SPL of=/dev/sdb bs=1K seek=1 oflag=sync status=none && sync

-- Flash the u-boot.img image into the SD card: +- Flash the u-boot-dtb.img image into the SD card:

-$ sudo dd if=u-boot.img of=/dev/sdb bs=1K seek=69 oflag=sync status=none && sync +$ sudo dd if=u-boot-dtb.img of=/dev/sdb bs=1K seek=69 oflag=sync status=none && sync

Create a partition for root file system and extract it there: