[PATCH 0/2] Generate all SR boot binaries
Add support for missing HS SRs in the build for J721E and J7200.
Boot logs: https://gist.github.com/nehamalcom/e652752623537aced8cf31308015d7c9
Neha Malcom Francis (2): arm: dts: k3-j721e-binman: Add support for HSSE2.0 and HSFS1.1 arm: dts: k3-j7200-binman: Add support for HSSE1.0 and HSFS1.0
arch/arm/dts/k3-j7200-binman.dtsi | 95 +++++++++++++- arch/arm/dts/k3-j721e-binman.dtsi | 201 +++++++++++++++++++++++++++++- 2 files changed, 294 insertions(+), 2 deletions(-)
J721E has SR1.1 and SR2.0 having three variants of each GP, HS-FS and HS-SE. Current build does not generate HS-SE SR2.0 and HS-FS SR1.1 so add support for them.
Reported-by: Suman Anna s-anna@ti.com Signed-off-by: Neha Malcom Francis n-francis@ti.com --- arch/arm/dts/k3-j721e-binman.dtsi | 201 +++++++++++++++++++++++++++++- 1 file changed, 200 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/k3-j721e-binman.dtsi b/arch/arm/dts/k3-j721e-binman.dtsi index 75a6e9599b9..90e4a31329e 100644 --- a/arch/arm/dts/k3-j721e-binman.dtsi +++ b/arch/arm/dts/k3-j721e-binman.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ */
#include "k3-binman.dtsi" @@ -129,6 +129,205 @@ }; };
+&binman { + tiboot3-j721e_sr2-hs-evm.bin { + filename = "tiboot3-j721e_sr2-hs-evm.bin"; + ti-secure-rom { + content = <&u_boot_spl_sr2>; + core = "public"; + core-opts = <2>; + load = <CONFIG_SPL_TEXT_BASE>; + keyfile = "custMpk.pem"; + }; + u_boot_spl_sr2: u-boot-spl { + no-expanded; + }; + }; + sysfw_sr2 { + filename = "sysfw.bin_sr2"; + ti-secure-rom { + content = <&ti_fs_cert_sr2>; + core = "secure"; + load = <0x40000>; + keyfile = "custMpk.pem"; + countersign; + }; + ti_fs_cert_sr2: ti-fs-cert.bin { + filename = "ti-sysfw/ti-fs-firmware-j721e_sr2-hs-cert.bin"; + type = "blob-ext"; + optional; + }; + ti-fs-firmware-j721e_sr2-hs-enc.bin { + filename = "ti-sysfw/ti-fs-firmware-j721e_sr2-hs-enc.bin"; + type = "blob-ext"; + optional; + }; + }; + itb_sr2 { + filename = "sysfw-j721e_sr2-hs-evm.itb"; + fit { + description = "SYSFW and Config fragments"; + #address-cells = <1>; + images { + sysfw.bin { + description = "sysfw"; + type = "firmware"; + arch = "arm"; + compression = "none"; + blob-ext { + filename = "sysfw.bin_sr2"; + }; + }; + board-cfg.bin { + description = "board-cfg"; + type = "firmware"; + arch = "arm"; + compression = "none"; + ti-secure { + content = <&board_cfg_sr2>; + keyfile = "custMpk.pem"; + }; + board_cfg_sr2: board-cfg { + filename = "board-cfg.bin"; + type = "blob-ext"; + }; + + }; + pm-cfg.bin { + description = "pm-cfg"; + type = "firmware"; + arch = "arm"; + compression = "none"; + ti-secure { + content = <&pm_cfg_sr2>; + keyfile = "custMpk.pem"; + }; + pm_cfg_sr2: pm-cfg { + filename = "pm-cfg.bin"; + type = "blob-ext"; + }; + }; + rm-cfg.bin { + description = "rm-cfg"; + type = "firmware"; + arch = "arm"; + compression = "none"; + ti-secure { + content = <&rm_cfg_sr2>; + keyfile = "custMpk.pem"; + }; + rm_cfg_sr2: rm-cfg { + filename = "rm-cfg.bin"; + type = "blob-ext"; + }; + }; + sec-cfg.bin { + description = "sec-cfg"; + type = "firmware"; + arch = "arm"; + compression = "none"; + ti-secure { + content = <&sec_cfg_sr2>; + keyfile = "custMpk.pem"; + }; + sec_cfg_sr2: sec-cfg { + filename = "sec-cfg.bin"; + type = "blob-ext"; + }; + }; + }; + }; + }; +}; + +&binman { + tiboot3-j721e_sr1_1-hs-fs-evm.bin { + filename = "tiboot3-j721e_sr1_1-hs-fs-evm.bin"; + ti-secure-rom { + content = <&u_boot_spl_fs_sr1_1>; + core = "public"; + core-opts = <2>; + load = <CONFIG_SPL_TEXT_BASE>; + keyfile = "custMpk.pem"; + }; + u_boot_spl_fs_sr1_1: u-boot-spl { + no-expanded; + }; + }; + sysfw_fs_sr1_1 { + filename = "sysfw.bin_fs_sr1_1"; + ti-fs-cert-fs.bin { + filename = "ti-sysfw/ti-fs-firmware-j721e_sr1_1-hs-fs-cert.bin"; + type = "blob-ext"; + optional; + }; + ti-fs-firmware-j721e-hs-fs-enc.bin { + filename = "ti-sysfw/ti-fs-firmware-j721e_sr1_1-hs-fs-enc.bin"; + type = "blob-ext"; + optional; + }; + }; + itb_fs_sr1_1 { + filename = "sysfw-j721e_sr1_1-hs-fs-evm.itb"; + fit { + description = "SYSFW and Config fragments"; + #address-cells = <1>; + images { + sysfw.bin { + description = "sysfw"; + type = "firmware"; + arch = "arm"; + compression = "none"; + blob-ext { + filename = "sysfw.bin_fs_sr1_1"; + }; + }; + board-cfg.bin { + description = "board-cfg"; + type = "firmware"; + arch = "arm"; + compression = "none"; + board-cfg { + filename = "board-cfg.bin"; + type = "blob-ext"; + }; + + }; + pm-cfg.bin { + description = "pm-cfg"; + type = "firmware"; + arch = "arm"; + compression = "none"; + pm-cfg { + filename = "pm-cfg.bin"; + type = "blob-ext"; + }; + }; + rm-cfg.bin { + description = "rm-cfg"; + type = "firmware"; + arch = "arm"; + compression = "none"; + rm-cfg { + filename = "rm-cfg.bin"; + type = "blob-ext"; + }; + }; + sec-cfg.bin { + description = "sec-cfg"; + type = "firmware"; + arch = "arm"; + compression = "none"; + sec-cfg { + filename = "sec-cfg.bin"; + type = "blob-ext"; + }; + }; + }; + }; + }; +}; + &binman { tiboot3-j721e_sr2-hs-fs-evm.bin { filename = "tiboot3-j721e_sr2-hs-fs-evm.bin";
On 4/22/24 4:40 PM, Neha Malcom Francis wrote:
J721E has SR1.1 and SR2.0 having three variants of each GP, HS-FS and HS-SE. Current build does not generate HS-SE SR2.0 and HS-FS SR1.1 so add support for them.
Reported-by: Suman Anna s-anna@ti.com Signed-off-by: Neha Malcom Francis n-francis@ti.com
arch/arm/dts/k3-j721e-binman.dtsi | 201 +++++++++++++++++++++++++++++- 1 file changed, 200 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/k3-j721e-binman.dtsi b/arch/arm/dts/k3-j721e-binman.dtsi index 75a6e9599b9..90e4a31329e 100644 --- a/arch/arm/dts/k3-j721e-binman.dtsi +++ b/arch/arm/dts/k3-j721e-binman.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /*
- Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/
- Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
*/
#include "k3-binman.dtsi"
@@ -129,6 +129,205 @@ }; };
+&binman {
- tiboot3-j721e_sr2-hs-evm.bin {
This already seems to exist in this file, it is hidden up in the first binman{} GP node at the top. Might just need split out from that.
Andrew
filename = "tiboot3-j721e_sr2-hs-evm.bin";ti-secure-rom {content = <&u_boot_spl_sr2>;core = "public";core-opts = <2>;load = <CONFIG_SPL_TEXT_BASE>;keyfile = "custMpk.pem";};u_boot_spl_sr2: u-boot-spl {no-expanded;};- };
- sysfw_sr2 {
filename = "sysfw.bin_sr2";ti-secure-rom {content = <&ti_fs_cert_sr2>;core = "secure";load = <0x40000>;keyfile = "custMpk.pem";countersign;};ti_fs_cert_sr2: ti-fs-cert.bin {filename = "ti-sysfw/ti-fs-firmware-j721e_sr2-hs-cert.bin";type = "blob-ext";optional;};ti-fs-firmware-j721e_sr2-hs-enc.bin {filename = "ti-sysfw/ti-fs-firmware-j721e_sr2-hs-enc.bin";type = "blob-ext";optional;};- };
- itb_sr2 {
filename = "sysfw-j721e_sr2-hs-evm.itb";fit {description = "SYSFW and Config fragments";#address-cells = <1>;images {sysfw.bin {description = "sysfw";type = "firmware";arch = "arm";compression = "none";blob-ext {filename = "sysfw.bin_sr2";};};board-cfg.bin {description = "board-cfg";type = "firmware";arch = "arm";compression = "none";ti-secure {content = <&board_cfg_sr2>;keyfile = "custMpk.pem";};board_cfg_sr2: board-cfg {filename = "board-cfg.bin";type = "blob-ext";};};pm-cfg.bin {description = "pm-cfg";type = "firmware";arch = "arm";compression = "none";ti-secure {content = <&pm_cfg_sr2>;keyfile = "custMpk.pem";};pm_cfg_sr2: pm-cfg {filename = "pm-cfg.bin";type = "blob-ext";};};rm-cfg.bin {description = "rm-cfg";type = "firmware";arch = "arm";compression = "none";ti-secure {content = <&rm_cfg_sr2>;keyfile = "custMpk.pem";};rm_cfg_sr2: rm-cfg {filename = "rm-cfg.bin";type = "blob-ext";};};sec-cfg.bin {description = "sec-cfg";type = "firmware";arch = "arm";compression = "none";ti-secure {content = <&sec_cfg_sr2>;keyfile = "custMpk.pem";};sec_cfg_sr2: sec-cfg {filename = "sec-cfg.bin";type = "blob-ext";};};};};- };
+};
+&binman {
- tiboot3-j721e_sr1_1-hs-fs-evm.bin {
filename = "tiboot3-j721e_sr1_1-hs-fs-evm.bin";ti-secure-rom {content = <&u_boot_spl_fs_sr1_1>;core = "public";core-opts = <2>;load = <CONFIG_SPL_TEXT_BASE>;keyfile = "custMpk.pem";};u_boot_spl_fs_sr1_1: u-boot-spl {no-expanded;};- };
- sysfw_fs_sr1_1 {
filename = "sysfw.bin_fs_sr1_1";ti-fs-cert-fs.bin {filename = "ti-sysfw/ti-fs-firmware-j721e_sr1_1-hs-fs-cert.bin";type = "blob-ext";optional;};ti-fs-firmware-j721e-hs-fs-enc.bin {filename = "ti-sysfw/ti-fs-firmware-j721e_sr1_1-hs-fs-enc.bin";type = "blob-ext";optional;};- };
- itb_fs_sr1_1 {
filename = "sysfw-j721e_sr1_1-hs-fs-evm.itb";fit {description = "SYSFW and Config fragments";#address-cells = <1>;images {sysfw.bin {description = "sysfw";type = "firmware";arch = "arm";compression = "none";blob-ext {filename = "sysfw.bin_fs_sr1_1";};};board-cfg.bin {description = "board-cfg";type = "firmware";arch = "arm";compression = "none";board-cfg {filename = "board-cfg.bin";type = "blob-ext";};};pm-cfg.bin {description = "pm-cfg";type = "firmware";arch = "arm";compression = "none";pm-cfg {filename = "pm-cfg.bin";type = "blob-ext";};};rm-cfg.bin {description = "rm-cfg";type = "firmware";arch = "arm";compression = "none";rm-cfg {filename = "rm-cfg.bin";type = "blob-ext";};};sec-cfg.bin {description = "sec-cfg";type = "firmware";arch = "arm";compression = "none";sec-cfg {filename = "sec-cfg.bin";type = "blob-ext";};};};};- };
+};
- &binman { tiboot3-j721e_sr2-hs-fs-evm.bin { filename = "tiboot3-j721e_sr2-hs-fs-evm.bin";
Hi Andrew,
On 22-Apr-24 3:37 AM, Andrew Davis wrote:
On 4/22/24 4:40 PM, Neha Malcom Francis wrote:
J721E has SR1.1 and SR2.0 having three variants of each GP, HS-FS and HS-SE. Current build does not generate HS-SE SR2.0 and HS-FS SR1.1 so add support for them.
Reported-by: Suman Anna s-anna@ti.com Signed-off-by: Neha Malcom Francis n-francis@ti.com
arch/arm/dts/k3-j721e-binman.dtsi | 201 +++++++++++++++++++++++++++++- 1 file changed, 200 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/k3-j721e-binman.dtsi b/arch/arm/dts/k3-j721e-binman.dtsi index 75a6e9599b9..90e4a31329e 100644 --- a/arch/arm/dts/k3-j721e-binman.dtsi +++ b/arch/arm/dts/k3-j721e-binman.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /*
- Copyright (C) 2022-2023 Texas Instruments Incorporated -
- Copyright (C) 2022-2024 Texas Instruments Incorporated -
https://www.ti.com/ */ #include "k3-binman.dtsi" @@ -129,6 +129,205 @@ }; }; +&binman { + tiboot3-j721e_sr2-hs-evm.bin {
This already seems to exist in this file, it is hidden up in the first binman{} GP node at the top. Might just need split out from that.
Andrew
Oh thanks for catching that!
+ filename = "tiboot3-j721e_sr2-hs-evm.bin"; + ti-secure-rom { + content = <&u_boot_spl_sr2>; + core = "public"; + core-opts = <2>; + load = <CONFIG_SPL_TEXT_BASE>; + keyfile = "custMpk.pem"; + }; + u_boot_spl_sr2: u-boot-spl { + no-expanded; + }; + }; + sysfw_sr2 { + filename = "sysfw.bin_sr2"; + ti-secure-rom { + content = <&ti_fs_cert_sr2>; + core = "secure"; + load = <0x40000>; + keyfile = "custMpk.pem"; + countersign; + }; + ti_fs_cert_sr2: ti-fs-cert.bin { + filename = "ti-sysfw/ti-fs-firmware-j721e_sr2-hs-cert.bin"; + type = "blob-ext"; + optional; + }; + ti-fs-firmware-j721e_sr2-hs-enc.bin { + filename = "ti-sysfw/ti-fs-firmware-j721e_sr2-hs-enc.bin"; + type = "blob-ext"; + optional; + }; + }; + itb_sr2 { + filename = "sysfw-j721e_sr2-hs-evm.itb"; + fit { + description = "SYSFW and Config fragments"; + #address-cells = <1>; + images { + sysfw.bin { + description = "sysfw"; + type = "firmware"; + arch = "arm"; + compression = "none"; + blob-ext { + filename = "sysfw.bin_sr2"; + }; + }; + board-cfg.bin { + description = "board-cfg"; + type = "firmware"; + arch = "arm"; + compression = "none"; + ti-secure { + content = <&board_cfg_sr2>; + keyfile = "custMpk.pem"; + }; + board_cfg_sr2: board-cfg { + filename = "board-cfg.bin"; + type = "blob-ext"; + };
+ }; + pm-cfg.bin { + description = "pm-cfg"; + type = "firmware"; + arch = "arm"; + compression = "none"; + ti-secure { + content = <&pm_cfg_sr2>; + keyfile = "custMpk.pem"; + }; + pm_cfg_sr2: pm-cfg { + filename = "pm-cfg.bin"; + type = "blob-ext"; + }; + }; + rm-cfg.bin { + description = "rm-cfg"; + type = "firmware"; + arch = "arm"; + compression = "none"; + ti-secure { + content = <&rm_cfg_sr2>; + keyfile = "custMpk.pem"; + }; + rm_cfg_sr2: rm-cfg { + filename = "rm-cfg.bin"; + type = "blob-ext"; + }; + }; + sec-cfg.bin { + description = "sec-cfg"; + type = "firmware"; + arch = "arm"; + compression = "none"; + ti-secure { + content = <&sec_cfg_sr2>; + keyfile = "custMpk.pem"; + }; + sec_cfg_sr2: sec-cfg { + filename = "sec-cfg.bin"; + type = "blob-ext"; + }; + }; + }; + }; + }; +};
+&binman { + tiboot3-j721e_sr1_1-hs-fs-evm.bin { + filename = "tiboot3-j721e_sr1_1-hs-fs-evm.bin"; + ti-secure-rom { + content = <&u_boot_spl_fs_sr1_1>; + core = "public"; + core-opts = <2>; + load = <CONFIG_SPL_TEXT_BASE>; + keyfile = "custMpk.pem"; + }; + u_boot_spl_fs_sr1_1: u-boot-spl { + no-expanded; + }; + }; + sysfw_fs_sr1_1 { + filename = "sysfw.bin_fs_sr1_1"; + ti-fs-cert-fs.bin { + filename = "ti-sysfw/ti-fs-firmware-j721e_sr1_1-hs-fs-cert.bin"; + type = "blob-ext"; + optional; + }; + ti-fs-firmware-j721e-hs-fs-enc.bin { + filename = "ti-sysfw/ti-fs-firmware-j721e_sr1_1-hs-fs-enc.bin"; + type = "blob-ext"; + optional; + }; + }; + itb_fs_sr1_1 { + filename = "sysfw-j721e_sr1_1-hs-fs-evm.itb"; + fit { + description = "SYSFW and Config fragments"; + #address-cells = <1>; + images { + sysfw.bin { + description = "sysfw"; + type = "firmware"; + arch = "arm"; + compression = "none"; + blob-ext { + filename = "sysfw.bin_fs_sr1_1"; + }; + }; + board-cfg.bin { + description = "board-cfg"; + type = "firmware"; + arch = "arm"; + compression = "none"; + board-cfg { + filename = "board-cfg.bin"; + type = "blob-ext"; + };
+ }; + pm-cfg.bin { + description = "pm-cfg"; + type = "firmware"; + arch = "arm"; + compression = "none"; + pm-cfg { + filename = "pm-cfg.bin"; + type = "blob-ext"; + }; + }; + rm-cfg.bin { + description = "rm-cfg"; + type = "firmware"; + arch = "arm"; + compression = "none"; + rm-cfg { + filename = "rm-cfg.bin"; + type = "blob-ext"; + }; + }; + sec-cfg.bin { + description = "sec-cfg"; + type = "firmware"; + arch = "arm"; + compression = "none"; + sec-cfg { + filename = "sec-cfg.bin"; + type = "blob-ext"; + }; + }; + }; + }; + }; +};
&binman { tiboot3-j721e_sr2-hs-fs-evm.bin { filename = "tiboot3-j721e_sr2-hs-fs-evm.bin";
J7200 has SR1.0 and SR2.0 having three variants of each GP, HS-FS and HS-SE. Current build does not generate HS-SE SR1.0 and HS-FS SR1.0 so add support for them.
Reported-by: Suman Anna s-anna@ti.com Reported-by: Aniket Limaye a-limaye@ti.com Signed-off-by: Neha Malcom Francis n-francis@ti.com --- arch/arm/dts/k3-j7200-binman.dtsi | 95 ++++++++++++++++++++++++++++++- 1 file changed, 94 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/k3-j7200-binman.dtsi b/arch/arm/dts/k3-j7200-binman.dtsi index 06db8659876..e8020fec2dc 100644 --- a/arch/arm/dts/k3-j7200-binman.dtsi +++ b/arch/arm/dts/k3-j7200-binman.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ */
#include "k3-binman.dtsi" @@ -47,6 +47,52 @@ config = "pm-cfg_j7200.yaml"; };
+&binman { + tiboot3-j7200-hs-evm.bin { + filename = "tiboot3-j7200-hs-evm.bin"; + ti-secure-rom { + content = <&u_boot_spl_sr1>, <&ti_fs_enc_sr1>, <&combined_tifs_cfg_sr1>, + <&combined_dm_cfg_sr1>, <&sysfw_inner_cert_sr1>; + combined; + dm-data; + core-opts = <2>; + sysfw-inner-cert; + keyfile = "custMpk.pem"; + sw-rev = <1>; + content-sbl = <&u_boot_spl_sr1>; + content-sysfw = <&ti_fs_enc_sr1>; + content-sysfw-data = <&combined_tifs_cfg_sr1>; + content-sysfw-inner-cert = <&sysfw_inner_cert_sr1>; + content-dm-data = <&combined_dm_cfg_sr1>; + load = <0x41c00000>; + load-sysfw = <0x40000>; + load-sysfw-data = <0x7f000>; + load-dm-data = <0x41c80000>; + }; + u_boot_spl_sr1: u-boot-spl { + no-expanded; + }; + ti_fs_enc_sr1: ti-fs-enc.bin { + filename = "ti-sysfw/ti-fs-firmware-j7200-hs-enc.bin"; + type = "blob-ext"; + optional; + }; + combined_tifs_cfg_sr1: combined-tifs-cfg.bin { + filename = "combined-tifs-cfg.bin"; + type = "blob-ext"; + }; + sysfw_inner_cert_sr1: sysfw-inner-cert { + filename = "ti-sysfw/ti-fs-firmware-j7200-hs-cert.bin"; + type = "blob-ext"; + optional; + }; + combined_dm_cfg_sr1: combined-dm-cfg.bin { + filename = "combined-dm-cfg.bin"; + type = "blob-ext"; + }; + }; +}; + &binman { tiboot3-j7200_sr2-hs-evm.bin { filename = "tiboot3-j7200_sr2-hs-evm.bin"; @@ -92,6 +138,53 @@ }; };
+&binman { + tiboot3-j7200-hs-fs-evm.bin { + filename = "tiboot3-j7200-hs-fs-evm.bin"; + ti-secure-rom { + content = <&u_boot_spl_fs_sr1>, <&ti_fs_enc_fs_sr1>, + <&combined_tifs_cfg_fs_sr1>, <&combined_dm_cfg_fs_sr1>, + <&sysfw_inner_cert_fs_sr1>; + combined; + dm-data; + core-opts = <2>; + sysfw-inner-cert; + keyfile = "custMpk.pem"; + sw-rev = <1>; + content-sbl = <&u_boot_spl_fs_sr1>; + content-sysfw = <&ti_fs_enc_fs_sr1>; + content-sysfw-data = <&combined_tifs_cfg_fs_sr1>; + content-sysfw-inner-cert = <&sysfw_inner_cert_fs_sr1>; + content-dm-data = <&combined_dm_cfg_fs_sr1>; + load = <0x41c00000>; + load-sysfw = <0x40000>; + load-sysfw-data = <0x7f000>; + load-dm-data = <0x41c80000>; + }; + u_boot_spl_fs_sr1: u-boot-spl { + no-expanded; + }; + ti_fs_enc_fs_sr1: ti-fs-enc.bin { + filename = "ti-sysfw/ti-fs-firmware-j7200-hs-fs-enc.bin"; + type = "blob-ext"; + optional; + }; + combined_tifs_cfg_fs_sr1: combined-tifs-cfg.bin { + filename = "combined-tifs-cfg.bin"; + type = "blob-ext"; + }; + sysfw_inner_cert_fs_sr1: sysfw-inner-cert { + filename = "ti-sysfw/ti-fs-firmware-j7200-hs-fs-cert.bin"; + type = "blob-ext"; + optional; + }; + combined_dm_cfg_fs_sr1: combined-dm-cfg.bin { + filename = "combined-dm-cfg.bin"; + type = "blob-ext"; + }; + }; +}; + &binman { tiboot3-j7200_sr2-hs-fs-evm.bin { filename = "tiboot3-j7200_sr2-hs-fs-evm.bin";
participants (2)
-
Andrew Davis -
Neha Malcom Francis