There are some more extensions, which are for both boards and some more boards from this manufacturer will follow soon.

Signed-off-by: Heiko Schocher hs@denx.de --- Makefile | 4 +- board/keymile/mgcoge/Makefile | 50 ++++++ board/keymile/mgcoge/config.mk | 24 +++ board/keymile/mgcoge/mgcoge.c | 360 +++++++++++++++++++++++++++++++++++++++ board/keymile/mgsuvd/Makefile | 44 +++++ board/keymile/mgsuvd/config.mk | 28 +++ board/keymile/mgsuvd/mgsuvd.c | 227 ++++++++++++++++++++++++ board/keymile/mgsuvd/u-boot.lds | 143 ++++++++++++++++ board/mgcoge/Makefile | 50 ------ board/mgcoge/config.mk | 24 --- board/mgcoge/mgcoge.c | 360 --------------------------------------- board/mgsuvd/Makefile | 44 ----- board/mgsuvd/config.mk | 28 --- board/mgsuvd/mgsuvd.c | 227 ------------------------ board/mgsuvd/u-boot.lds | 143 ---------------- 15 files changed, 878 insertions(+), 878 deletions(-) create mode 100644 board/keymile/mgcoge/Makefile create mode 100644 board/keymile/mgcoge/config.mk create mode 100644 board/keymile/mgcoge/mgcoge.c create mode 100644 board/keymile/mgsuvd/Makefile create mode 100644 board/keymile/mgsuvd/config.mk create mode 100644 board/keymile/mgsuvd/mgsuvd.c create mode 100644 board/keymile/mgsuvd/u-boot.lds delete mode 100644 board/mgcoge/Makefile delete mode 100644 board/mgcoge/config.mk delete mode 100644 board/mgcoge/mgcoge.c delete mode 100644 board/mgsuvd/Makefile delete mode 100644 board/mgsuvd/config.mk delete mode 100644 board/mgsuvd/mgsuvd.c delete mode 100644 board/mgsuvd/u-boot.lds

diff --git a/Makefile b/Makefile index 7c13ce8..7c6c786 100644 --- a/Makefile +++ b/Makefile @@ -922,7 +922,7 @@ MBX860T_config: unconfig @$(MKCONFIG) $(@:_config=) ppc mpc8xx mbx8xx

mgsuvd_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8xx mgsuvd + @$(MKCONFIG) $(@:_config=) ppc mpc8xx mgsuvd keymile

MHPC_config: unconfig @$(MKCONFIG) $(@:_config=) ppc mpc8xx mhpc eltec @@ -1706,7 +1706,7 @@ ISPAN_REVB_config: unconfig @$(MKCONFIG) -a ISPAN ppc mpc8260 ispan

mgcoge_config : unconfig - @$(MKCONFIG) mgcoge ppc mpc8260 mgcoge + @$(MKCONFIG) mgcoge ppc mpc8260 mgcoge keymile

MPC8260ADS_config \ MPC8260ADS_lowboot_config \ diff --git a/board/keymile/mgcoge/Makefile b/board/keymile/mgcoge/Makefile new file mode 100644 index 0000000..d4087cc --- /dev/null +++ b/board/keymile/mgcoge/Makefile @@ -0,0 +1,50 @@ +# +# (C) Copyright 2001-2007 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := $(BOARD).o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/keymile/mgcoge/config.mk b/board/keymile/mgcoge/config.mk new file mode 100644 index 0000000..143bc9f --- /dev/null +++ b/board/keymile/mgcoge/config.mk @@ -0,0 +1,24 @@ +# +# (C) Copyright 2007 +# Heiko Schocher, DENX Software Engineering, hs@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +TEXT_BASE = 0xFE000000 diff --git a/board/keymile/mgcoge/mgcoge.c b/board/keymile/mgcoge/mgcoge.c new file mode 100644 index 0000000..51b6dc6 --- /dev/null +++ b/board/keymile/mgcoge/mgcoge.c @@ -0,0 +1,360 @@ +/* + * (C) Copyright 2007 + * Heiko Schocher, DENX Software Engineering, hs@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <mpc8260.h> +#include <ioports.h> + +#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) +#include <libfdt.h> +#endif + +/* + * I/O Port configuration table + * + * if conf is 1, then that port pin will be configured at boot time + * according to the five values podr/pdir/ppar/psor/pdat for that entry + */ +const iop_conf_t iop_conf_tab[4][32] = { + + /* Port A */ + { /* conf ppar psor pdir podr pdat */ + /* PA31 */ { 0, 0, 0, 0, 0, 0 }, /* PA31 */ + /* PA30 */ { 0, 0, 0, 0, 0, 0 }, /* PA30 */ + /* PA29 */ { 0, 0, 0, 0, 0, 0 }, /* PA29 */ + /* PA28 */ { 0, 0, 0, 0, 0, 0 }, /* PA28 */ + /* PA27 */ { 0, 0, 0, 0, 0, 0 }, /* PA27 */ + /* PA26 */ { 0, 0, 0, 0, 0, 0 }, /* PA26 */ + /* PA25 */ { 0, 0, 0, 0, 0, 0 }, /* PA25 */ + /* PA24 */ { 0, 0, 0, 0, 0, 0 }, /* PA24 */ + /* PA23 */ { 0, 0, 0, 0, 0, 0 }, /* PA23 */ + /* PA22 */ { 0, 0, 0, 0, 0, 0 }, /* PA22 */ + /* PA21 */ { 0, 0, 0, 0, 0, 0 }, /* PA21 */ + /* PA20 */ { 0, 0, 0, 0, 0, 0 }, /* PA20 */ + /* PA19 */ { 0, 0, 0, 0, 0, 0 }, /* PA19 */ + /* PA18 */ { 0, 0, 0, 0, 0, 0 }, /* PA18 */ + /* PA17 */ { 0, 0, 0, 0, 0, 0 }, /* PA17 */ + /* PA16 */ { 0, 0, 0, 0, 0, 0 }, /* PA16 */ + /* PA15 */ { 0, 0, 0, 0, 0, 0 }, /* PA15 */ + /* PA14 */ { 0, 0, 0, 0, 0, 0 }, /* PA14 */ + /* PA13 */ { 0, 0, 0, 0, 0, 0 }, /* PA13 */ + /* PA12 */ { 0, 0, 0, 0, 0, 0 }, /* PA12 */ + /* PA11 */ { 0, 0, 0, 0, 0, 0 }, /* PA11 */ + /* PA10 */ { 0, 0, 0, 0, 0, 0 }, /* PA10 */ + /* PA9 */ { 1, 1, 0, 1, 0, 0 }, /* SMC2 TxD */ + /* PA8 */ { 1, 1, 0, 0, 0, 0 }, /* SMC2 RxD */ + /* PA7 */ { 0, 0, 0, 0, 0, 0 }, /* PA7 */ + /* PA6 */ { 0, 0, 0, 0, 0, 0 }, /* PA6 */ + /* PA5 */ { 0, 0, 0, 0, 0, 0 }, /* PA5 */ + /* PA4 */ { 0, 0, 0, 0, 0, 0 }, /* PA4 */ + /* PA3 */ { 0, 0, 0, 0, 0, 0 }, /* PA3 */ + /* PA2 */ { 0, 0, 0, 0, 0, 0 }, /* PA2 */ + /* PA1 */ { 0, 0, 0, 0, 0, 0 }, /* PA1 */ + /* PA0 */ { 0, 0, 0, 0, 0, 0 } /* PA0 */ + }, + + /* Port B */ + { /* conf ppar psor pdir podr pdat */ + /* PB31 */ { 0, 0, 0, 0, 0, 0 }, /* PB31 */ + /* PB30 */ { 0, 0, 0, 0, 0, 0 }, /* PB30 */ + /* PB29 */ { 0, 0, 0, 0, 0, 0 }, /* PB29 */ + /* PB28 */ { 0, 0, 0, 0, 0, 0 }, /* PB28 */ + /* PB27 */ { 0, 0, 0, 0, 0, 0 }, /* PB27 */ + /* PB26 */ { 0, 0, 0, 0, 0, 0 }, /* PB26 */ + /* PB25 */ { 0, 0, 0, 0, 0, 0 }, /* PB25 */ + /* PB24 */ { 0, 0, 0, 0, 0, 0 }, /* PB24 */ + /* PB23 */ { 0, 0, 0, 0, 0, 0 }, /* PB23 */ + /* PB22 */ { 0, 0, 0, 0, 0, 0 }, /* PB22 */ + /* PB21 */ { 0, 0, 0, 0, 0, 0 }, /* PB21 */ + /* PB20 */ { 0, 0, 0, 0, 0, 0 }, /* PB20 */ + /* PB19 */ { 0, 0, 0, 0, 0, 0 }, /* PB19 */ + /* PB18 */ { 0, 0, 0, 0, 0, 0 }, /* PB18 */ + /* PB17 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ + /* PB16 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ + /* PB15 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ + /* PB14 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ + /* PB13 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ + /* PB12 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ + /* PB11 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ + /* PB10 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ + /* PB9 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ + /* PB8 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ + /* PB7 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ + /* PB6 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ + /* PB5 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ + /* PB4 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ + /* PB3 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ + /* PB2 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ + /* PB1 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ + /* PB0 */ { 0, 0, 0, 0, 0, 0 } /* non-existent */ + }, + + /* Port C */ + { /* conf ppar psor pdir podr pdat */ + /* PC31 */ { 0, 0, 0, 0, 0, 0 }, /* PC31 */ + /* PC30 */ { 0, 0, 0, 0, 0, 0 }, /* PC30 */ + /* PC29 */ { 0, 0, 0, 0, 0, 0 }, /* PC29 */ + /* PC28 */ { 0, 0, 0, 0, 0, 0 }, /* PC28 */ + /* PC27 */ { 0, 0, 0, 0, 0, 0 }, /* PC27 */ + /* PC26 */ { 0, 0, 0, 0, 0, 0 }, /* PC26 */ + /* PC25 */ { 1, 1, 0, 0, 0, 0 }, /* SCC4 RxClk */ + /* PC24 */ { 1, 1, 0, 0, 0, 0 }, /* SCC4 TxClk */ + /* PC23 */ { 0, 0, 0, 0, 0, 0 }, /* PC23 */ + /* PC22 */ { 0, 0, 0, 0, 0, 0 }, /* PC22 */ + /* PC21 */ { 0, 0, 0, 0, 0, 0 }, /* PC21 */ + /* PC20 */ { 0, 0, 0, 0, 0, 0 }, /* PC20 */ + /* PC19 */ { 0, 0, 0, 0, 0, 0 }, /* PC19 */ + /* PC18 */ { 0, 0, 0, 0, 0, 0 }, /* PC18 */ + /* PC17 */ { 0, 0, 0, 0, 0, 0 }, /* PC17 */ + /* PC16 */ { 0, 0, 0, 0, 0, 0 }, /* PC16 */ + /* PC15 */ { 0, 0, 0, 0, 0, 0 }, /* PC15 */ + /* PC14 */ { 0, 0, 0, 0, 0, 0 }, /* PC14 */ + /* PC13 */ { 0, 0, 0, 0, 0, 0 }, /* PC13 */ + /* PC12 */ { 0, 0, 0, 0, 0, 0 }, /* PC12 */ + /* PC11 */ { 0, 0, 0, 0, 0, 0 }, /* PC11 */ + /* PC10 */ { 0, 0, 0, 0, 0, 0 }, /* PC10 */ + /* PC9 */ { 1, 1, 0, 0, 0, 0 }, /* SCC4: CTS */ + /* PC8 */ { 1, 1, 0, 0, 0, 0 }, /* SCC4: CD */ + /* PC7 */ { 0, 0, 0, 0, 0, 0 }, /* PC7 */ + /* PC6 */ { 0, 0, 0, 0, 0, 0 }, /* PC6 */ + /* PC5 */ { 0, 0, 0, 0, 0, 0 }, /* PC5 */ + /* PC4 */ { 0, 0, 0, 0, 0, 0 }, /* PC4 */ + /* PC3 */ { 0, 0, 0, 0, 0, 0 }, /* PC3 */ + /* PC2 */ { 0, 0, 0, 0, 0, 0 }, /* PC2 */ + /* PC1 */ { 0, 0, 0, 0, 0, 0 }, /* PC1 */ + /* PC0 */ { 0, 0, 0, 0, 0, 0 }, /* PC0 */ + }, + + /* Port D */ + { /* conf ppar psor pdir podr pdat */ + /* PD31 */ { 0, 0, 0, 0, 0, 0 }, /* PD31 */ + /* PD30 */ { 0, 0, 0, 0, 0, 0 }, /* PD30 */ + /* PD29 */ { 0, 0, 0, 0, 0, 0 }, /* PD29 */ + /* PD28 */ { 0, 0, 0, 0, 0, 0 }, /* PD28 */ + /* PD27 */ { 0, 0, 0, 0, 0, 0 }, /* PD27 */ + /* PD26 */ { 0, 0, 0, 0, 0, 0 }, /* PD26 */ + /* PD25 */ { 0, 0, 0, 0, 0, 0 }, /* PD25 */ + /* PD24 */ { 0, 0, 0, 0, 0, 0 }, /* PD24 */ + /* PD23 */ { 0, 0, 0, 0, 0, 0 }, /* PD23 */ + /* PD22 */ { 1, 1, 0, 0, 0, 0 }, /* SCC4: RXD */ + /* PD21 */ { 1, 1, 0, 1, 0, 0 }, /* SCC4: TXD */ + /* PD20 */ { 1, 1, 0, 1, 0, 0 }, /* SCC4: RTS */ + /* PD19 */ { 0, 0, 0, 0, 0, 0 }, /* PD19 */ + /* PD18 */ { 0, 0, 0, 0, 0, 0 }, /* PD18 */ + /* PD17 */ { 0, 0, 0, 0, 0, 0 }, /* PD17 */ + /* PD16 */ { 0, 0, 0, 0, 0, 0 }, /* PD16 */ + /* PD15 */ { 0, 0, 0, 0, 0, 0 }, /* PD15 */ + /* PD14 */ { 0, 0, 0, 0, 0, 0 }, /* PD14 */ + /* PD13 */ { 0, 0, 0, 0, 0, 0 }, /* PD13 */ + /* PD12 */ { 0, 0, 0, 0, 0, 0 }, /* PD12 */ + /* PD11 */ { 0, 0, 0, 0, 0, 0 }, /* PD11 */ + /* PD10 */ { 0, 0, 0, 0, 0, 0 }, /* PD10 */ + /* PD9 */ { 0, 0, 0, 0, 0, 0 }, /* PD9 */ + /* PD8 */ { 0, 0, 0, 0, 0, 0 }, /* PD8 */ + /* PD7 */ { 0, 0, 0, 0, 0, 0 }, /* PD7 */ + /* PD6 */ { 0, 0, 0, 0, 0, 0 }, /* PD6 */ + /* PD5 */ { 0, 0, 0, 0, 0, 0 }, /* PD5 */ + /* PD4 */ { 0, 0, 0, 0, 0, 0 }, /* PD4 */ + /* PD3 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ + /* PD2 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ + /* PD1 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ + /* PD0 */ { 0, 0, 0, 0, 0, 0 } /* non-existent */ + } +}; + +/* Try SDRAM initialization with P/LSDMR=sdmr and ORx=orx + * + * This routine performs standard 8260 initialization sequence + * and calculates the available memory size. It may be called + * several times to try different SDRAM configurations on both + * 60x and local buses. + */ +static long int try_init (volatile memctl8260_t * memctl, ulong sdmr, + ulong orx, volatile uchar * base) +{ + volatile uchar c = 0xff; + volatile uint *sdmr_ptr; + volatile uint *orx_ptr; + ulong maxsize, size; + int i; + + /* We must be able to test a location outsize the maximum legal size + * to find out THAT we are outside; but this address still has to be + * mapped by the controller. That means, that the initial mapping has + * to be (at least) twice as large as the maximum expected size. + */ + maxsize = (1 + (~orx | 0x7fff))/* / 2*/; + + sdmr_ptr = &memctl->memc_psdmr; + orx_ptr = &memctl->memc_or1; + + *orx_ptr = orx; + + /* + * Quote from 8260 UM (10.4.2 SDRAM Power-On Initialization, 10-35): + * + * "At system reset, initialization software must set up the + * programmable parameters in the memory controller banks registers + * (ORx, BRx, P/LSDMR). After all memory parameters are configured, + * system software should execute the following initialization sequence + * for each SDRAM device. + * + * 1. Issue a PRECHARGE-ALL-BANKS command + * 2. Issue eight CBR REFRESH commands + * 3. Issue a MODE-SET command to initialize the mode register + * + * The initial commands are executed by setting P/LSDMR[OP] and + * accessing the SDRAM with a single-byte transaction." + * + * The appropriate BRx/ORx registers have already been set when we + * get here. The SDRAM can be accessed at the address CFG_SDRAM_BASE. + */ + + *sdmr_ptr = sdmr | PSDMR_OP_PREA; + *base = c; + + *sdmr_ptr = sdmr | PSDMR_OP_CBRR; + for (i = 0; i < 8; i++) + *base = c; + + *sdmr_ptr = sdmr | PSDMR_OP_MRW; + *(base + CFG_MRS_OFFS) = c; /* setting MR on address lines */ + + *sdmr_ptr = sdmr | PSDMR_OP_NORM | PSDMR_RFEN; + *base = c; + + size = get_ram_size((long *)base, maxsize); + *orx_ptr = orx | ~(size - 1); + + return (size); +} + +phys_size_t initdram(int board_type) +{ + volatile immap_t *immap = (immap_t *) CFG_IMMR; + volatile memctl8260_t *memctl = &immap->im_memctl; + + long psize; + + memctl->memc_psrt = CFG_PSRT; + memctl->memc_mptpr = CFG_MPTPR; + +#ifndef CFG_RAMBOOT + /* 60x SDRAM setup: + */ + psize = try_init (memctl, CFG_PSDMR, CFG_OR1, + (uchar *) CFG_SDRAM_BASE); +#endif /* CFG_RAMBOOT */ + + icache_enable (); + + return (psize); +} + +int checkboard(void) +{ + puts("Board: mgcoge\n"); + + return 0; +} + +/* + * Early board initalization. + */ +int board_early_init_r(void) +{ + /* setup the UPIOx */ + *(char *)(CFG_PIGGY_BASE + 0x02) = 0xc0; + *(char *)(CFG_PIGGY_BASE + 0x03) = 0x15; + return 0; +} + +#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) +/* + * update "memory" property in the blob + */ +void ft_blob_update(void *blob, bd_t *bd) +{ + int ret, nodeoffset = 0; + ulong memory_data[2] = {0}; + ulong flash_data[8] = {0}; + + memory_data[0] = cpu_to_be32(bd->bi_memstart); + memory_data[1] = cpu_to_be32(bd->bi_memsize); + + nodeoffset = fdt_path_offset (blob, "/memory"); + if (nodeoffset >= 0) { + ret = fdt_setprop(blob, nodeoffset, "reg", memory_data, + sizeof(memory_data)); + if (ret < 0) + printf("ft_blob_update(): cannot set /memory/reg " + "property err:%s\n", fdt_strerror(ret)); + } + else { + /* memory node is required in dts */ + printf("ft_blob_update(): cannot find /memory node " + "err:%s\n", fdt_strerror(nodeoffset)); + } + /* update Flash addr, size */ + flash_data[2] = cpu_to_be32(CFG_FLASH_BASE); + flash_data[3] = cpu_to_be32(CFG_FLASH_SIZE); + flash_data[4] = cpu_to_be32(1); + flash_data[5] = cpu_to_be32(0); + flash_data[6] = cpu_to_be32(CFG_FLASH_BASE_1); + flash_data[7] = cpu_to_be32(CFG_FLASH_SIZE_1); + nodeoffset = fdt_path_offset (blob, "/localbus"); + if (nodeoffset >= 0) { + ret = fdt_setprop(blob, nodeoffset, "ranges", flash_data, + sizeof(flash_data)); + if (ret < 0) + printf("ft_blob_update(): cannot set /localbus/ranges " + "property err:%s\n", fdt_strerror(ret)); + } + else { + /* memory node is required in dts */ + printf("ft_blob_update(): cannot find /localbus node " + "err:%s\n", fdt_strerror(nodeoffset)); + } + /* MAC Adresse */ + nodeoffset = fdt_path_offset (blob, "/soc/cpm/ethernet"); + if (nodeoffset >= 0) { + ret = fdt_setprop(blob, nodeoffset, "mac-address", bd->bi_enetaddr, + sizeof(uchar) * 6); + if (ret < 0) + printf("ft_blob_update(): cannot set /soc/cpm/ethernet/mac-address " + "property err:%s\n", fdt_strerror(ret)); + } + else { + /* memory node is required in dts */ + printf("ft_blob_update(): cannot find /soc/cpm/ethernet node " + "err:%s\n", fdt_strerror(nodeoffset)); + } + +} + +void ft_board_setup(void *blob, bd_t *bd) +{ + ft_cpu_setup( blob, bd); + ft_blob_update(blob, bd); +} +#endif /* defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) */ diff --git a/board/keymile/mgsuvd/Makefile b/board/keymile/mgsuvd/Makefile new file mode 100644 index 0000000..af0d400 --- /dev/null +++ b/board/keymile/mgsuvd/Makefile @@ -0,0 +1,44 @@ +# +# (C) Copyright 2007 +# Heiko Schocher, DENX Software Engineering, hs@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS = $(BOARD).o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/keymile/mgsuvd/config.mk b/board/keymile/mgsuvd/config.mk new file mode 100644 index 0000000..8625cea --- /dev/null +++ b/board/keymile/mgsuvd/config.mk @@ -0,0 +1,28 @@ +# +# (C) Copyright 2007 +# Heiko Schocher, DENX Software Engineering, hs@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# +# mgsvud boards +# + +TEXT_BASE = 0xf0000000 diff --git a/board/keymile/mgsuvd/mgsuvd.c b/board/keymile/mgsuvd/mgsuvd.c new file mode 100644 index 0000000..c51ea7e --- /dev/null +++ b/board/keymile/mgsuvd/mgsuvd.c @@ -0,0 +1,227 @@ +/* + * (C) Copyright 2007 + * Heiko Schocher, DENX Software Engineering, hs@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#if 0 +#define DEBUG +#endif + +#include <common.h> +#include <mpc8xx.h> + +#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) +#include <libfdt.h> +#endif + +DECLARE_GLOBAL_DATA_PTR; + +const uint sdram_table[] = +{ + 0x0f07fc04, 0x0ffffc04, 0x00bdfc04, 0x0ff77c00, + 0x1ffffc05, 0xfffffc04, 0xfffffc04, 0xfffffc04, + /* 0x08 Burst Read */ + 0x0f07fc04, 0x0ffffc04, 0x00bdfc04, 0x00fffc00, + 0x00fffc00, 0x00fffc00, 0x0ff77c00, 0x1ffffc05, + /* 0x10 Load mode register */ + 0x0ffffc34, 0x0ff57c04, 0x0ffffc04, 0x1ffffc05, + 0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04, + /* 0x18 Single Write */ + 0x0f07fc04, 0x0ffffc00, 0x00bd7c04, 0x0ffffc04, + 0x0ff77c04, 0x1ffffc05, 0xfffffc04, 0xfffffc04, + /* 0x20 Burst Write */ + 0x0f07fc04, 0x0ffffc00, 0x00bd7c00, 0x00fffc00, + 0x00fffc00, 0x00fffc04, 0x0ffffc04, 0x0ff77c04, + 0x1ffffc05, 0xfffffc04, 0xfffffc04, 0xfffffc04, + 0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04, + /* 0x30 Precharge all and Refresh */ + 0x0ff77c04, 0x0ffffc04, 0x0ff5fc84, 0x0ffffc04, + 0x0ffffc04, 0x0ffffc84, 0x1ffffc05, 0xfffffc04, + 0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04, + /* 0x3C Exception */ + 0x7ffffc04, 0xfffffc07, 0xfffffc04, 0xfffffc04, +}; + +int checkboard (void) +{ + puts ("Board: Keymile mgsuvd\n"); + return (0); +} + +phys_size_t initdram (int board_type) +{ + volatile immap_t *immap = (immap_t *) CFG_IMMR; + volatile memctl8xx_t *memctl = &immap->im_memctl; + long int size; + + upmconfig (UPMB, (uint *) sdram_table, + sizeof (sdram_table) / sizeof (uint)); + + /* + * Preliminary prescaler for refresh (depends on number of + * banks): This value is selected for four cycles every 62.4 us + * with two SDRAM banks or four cycles every 31.2 us with one + * bank. It will be adjusted after memory sizing. + */ + memctl->memc_mptpr = CFG_MPTPR; + + /* + * The following value is used as an address (i.e. opcode) for + * the LOAD MODE REGISTER COMMAND during SDRAM initialisation. If + * the port size is 32bit the SDRAM does NOT "see" the lower two + * address lines, i.e. mar=0x00000088 -> opcode=0x00000022 for + * MICRON SDRAMs: + * -> 0 00 010 0 010 + * | | | | +- Burst Length = 4 + * | | | +----- Burst Type = Sequential + * | | +------- CAS Latency = 2 + * | +----------- Operating Mode = Standard + * +-------------- Write Burst Mode = Programmed Burst Length + */ + memctl->memc_mar = CFG_MAR; + + /* + * Map controller banks 1 to the SDRAM banks 1 at + * preliminary addresses - these have to be modified after the + * SDRAM size has been determined. + */ + memctl->memc_or1 = CFG_OR1_PRELIM; + memctl->memc_br1 = CFG_BR1_PRELIM; + + memctl->memc_mbmr = CFG_MBMR & (~(MBMR_PTBE)); /* no refresh yet */ + + udelay (200); + + /* perform SDRAM initializsation sequence */ + + memctl->memc_mcr = 0x80802830; /* SDRAM bank 0 */ + udelay (1); + memctl->memc_mcr = 0x80802110; /* SDRAM bank 0 - execute twice */ + udelay (1); + + memctl->memc_mbmr |= MBMR_PTBE; /* enable refresh */ + + udelay (1000); + + /* + * Check Bank 0 Memory Size for re-configuration + * + */ + size = get_ram_size(SDRAM_BASE1_PRELIM, SDRAM_MAX_SIZE); + + udelay (1000); + + debug ("SDRAM Bank 0: %ld MB\n", size >> 20); + + return (size); +} + +/* + * Early board initalization. + */ +int board_early_init_r(void) +{ + /* setup the UPIOx */ + *(char *)(CFG_PIGGY_BASE + 0x02) = 0xc0; + *(char *)(CFG_PIGGY_BASE + 0x03) = 0x35; + return 0; +} + +#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) +/* + * update "memory" property in the blob + */ +void ft_blob_update(void *blob, bd_t *bd) +{ + int ret, nodeoffset = 0; + ulong brg_data[1] = {0}; + ulong memory_data[2] = {0}; + ulong flash_data[4] = {0}; + + memory_data[0] = cpu_to_be32(bd->bi_memstart); + memory_data[1] = cpu_to_be32(bd->bi_memsize); + + nodeoffset = fdt_path_offset (blob, "/memory"); + if (nodeoffset >= 0) { + ret = fdt_setprop(blob, nodeoffset, "reg", memory_data, + sizeof(memory_data)); + if (ret < 0) + printf("ft_blob_update(): cannot set /memory/reg " + "property err:%s\n", fdt_strerror(ret)); + } + else { + /* memory node is required in dts */ + printf("ft_blob_update(): cannot find /memory node " + "err:%s\n", fdt_strerror(nodeoffset)); + } + + flash_data[2] = cpu_to_be32(bd->bi_flashstart); + flash_data[3] = cpu_to_be32(bd->bi_flashsize); + nodeoffset = fdt_path_offset (blob, "/localbus"); + if (nodeoffset >= 0) { + ret = fdt_setprop(blob, nodeoffset, "ranges", flash_data, + sizeof(flash_data)); + if (ret < 0) + printf("ft_blob_update(): cannot set /localbus/ranges " + "property err:%s\n", fdt_strerror(ret)); + } + else { + /* memory node is required in dts */ + printf("ft_blob_update(): cannot find /localbus node " + "err:%s\n", fdt_strerror(nodeoffset)); + } + /* BRG */ + brg_data[0] = cpu_to_be32(bd->bi_busfreq); + nodeoffset = fdt_path_offset (blob, "/soc/cpm"); + if (nodeoffset >= 0) { + ret = fdt_setprop(blob, nodeoffset, "brg-frequency", brg_data, + sizeof(brg_data)); + if (ret < 0) + printf("ft_blob_update(): cannot set /soc/cpm/brg-frequency " + "property err:%s\n", fdt_strerror(ret)); + } + else { + /* memory node is required in dts */ + printf("ft_blob_update(): cannot find /soc/cpm node " + "err:%s\n", fdt_strerror(nodeoffset)); + } + /* MAC Adresse */ + nodeoffset = fdt_path_offset (blob, "/soc/cpm/ethernet"); + if (nodeoffset >= 0) { + ret = fdt_setprop(blob, nodeoffset, "mac-address", bd->bi_enetaddr, + sizeof(uchar) * 6); + if (ret < 0) + printf("ft_blob_update(): cannot set /soc/cpm/scc/mac-address " + "property err:%s\n", fdt_strerror(ret)); + } + else { + /* memory node is required in dts */ + printf("ft_blob_update(): cannot find /soc/cpm/ethernet node " + "err:%s\n", fdt_strerror(nodeoffset)); + } +} + +void ft_board_setup(void *blob, bd_t *bd) +{ + ft_cpu_setup( blob, bd); + ft_blob_update(blob, bd); +} +#endif /* defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) */ diff --git a/board/keymile/mgsuvd/u-boot.lds b/board/keymile/mgsuvd/u-boot.lds new file mode 100644 index 0000000..26aa5d6 --- /dev/null +++ b/board/keymile/mgsuvd/u-boot.lds @@ -0,0 +1,143 @@ +/* + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_ARCH(powerpc) +/* Do we need any of these for elf? + __DYNAMIC = 0; */ +SECTIONS +{ + /* Read-only sections, merged into text segment: */ + . = + SIZEOF_HEADERS; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .rel.text : { *(.rel.text) } + .rela.text : { *(.rela.text) } + .rel.data : { *(.rel.data) } + .rela.data : { *(.rela.data) } + .rel.rodata : { *(.rel.rodata) } + .rela.rodata : { *(.rela.rodata) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.bss : { *(.rel.bss) } + .rela.bss : { *(.rela.bss) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + .init : { *(.init) } + .plt : { *(.plt) } + .text : + { + /* WARNING - the following is hand-optimized to fit within */ + /* the sector layout of our flash chips! XXX FIXME XXX */ + + cpu/mpc8xx/start.o (.text) + cpu/mpc8xx/traps.o (.text) + common/dlmalloc.o (.text) + lib_ppc/ppcstring.o (.text) + lib_generic/vsprintf.o (.text) + lib_generic/crc32.o (.text) + lib_generic/zlib.o (.text) + lib_ppc/cache.o (.text) + lib_ppc/time.o (.text) + + . = DEFINED(env_offset) ? env_offset : .; + common/env_embedded.o (.ppcenv) + + *(.text) + *(.fixup) + *(.got1) + } + _etext = .; + PROVIDE (etext = .); + .rodata : + { + *(.rodata) + *(.rodata1) + *(.rodata.str1.4) + *(.eh_frame) + } + .fini : { *(.fini) } =0 + .ctors : { *(.ctors) } + .dtors : { *(.dtors) } + + /* Read-write section, merged into data segment: */ + . = (. + 0x00FF) & 0xFFFFFF00; + _erotext = .; + PROVIDE (erotext = .); + .reloc : + { + *(.got) + _GOT2_TABLE_ = .; + *(.got2) + _FIXUP_TABLE_ = .; + *(.fixup) + } + __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; + __fixup_entries = (. - _FIXUP_TABLE_)>>2; + + .data : + { + *(.data) + *(.data1) + *(.sdata) + *(.sdata2) + *(.dynamic) + CONSTRUCTORS + } + _edata = .; + PROVIDE (edata = .); + + . = .; + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + + . = .; + __start___ex_table = .; + __ex_table : { *(__ex_table) } + __stop___ex_table = .; + + . = ALIGN(256); + __init_begin = .; + .text.init : { *(.text.init) } + .data.init : { *(.data.init) } + . = ALIGN(256); + __init_end = .; + + __bss_start = .; + .bss (NOLOAD) : + { + *(.sbss) *(.scommon) + *(.dynbss) + *(.bss) + *(COMMON) + } + _end = . ; + PROVIDE (end = .); +} diff --git a/board/mgcoge/Makefile b/board/mgcoge/Makefile deleted file mode 100644 index d4087cc..0000000 --- a/board/mgcoge/Makefile +++ /dev/null @@ -1,50 +0,0 @@ -# -# (C) Copyright 2001-2007 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -LIB = $(obj)lib$(BOARD).a - -COBJS := $(BOARD).o - -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) -SOBJS := $(addprefix $(obj),$(SOBJS)) - -$(LIB): $(obj).depend $(OBJS) - $(AR) $(ARFLAGS) $@ $(OBJS) - -clean: - rm -f $(SOBJS) $(OBJS) - -distclean: clean - rm -f $(LIB) core *.bak $(obj).depend - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/board/mgcoge/config.mk b/board/mgcoge/config.mk deleted file mode 100644 index 143bc9f..0000000 --- a/board/mgcoge/config.mk +++ /dev/null @@ -1,24 +0,0 @@ -# -# (C) Copyright 2007 -# Heiko Schocher, DENX Software Engineering, hs@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -TEXT_BASE = 0xFE000000 diff --git a/board/mgcoge/mgcoge.c b/board/mgcoge/mgcoge.c deleted file mode 100644 index 51b6dc6..0000000 --- a/board/mgcoge/mgcoge.c +++ /dev/null @@ -1,360 +0,0 @@ -/* - * (C) Copyright 2007 - * Heiko Schocher, DENX Software Engineering, hs@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <mpc8260.h> -#include <ioports.h> - -#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) -#include <libfdt.h> -#endif - -/* - * I/O Port configuration table - * - * if conf is 1, then that port pin will be configured at boot time - * according to the five values podr/pdir/ppar/psor/pdat for that entry - */ -const iop_conf_t iop_conf_tab[4][32] = { - - /* Port A */ - { /* conf ppar psor pdir podr pdat */ - /* PA31 */ { 0, 0, 0, 0, 0, 0 }, /* PA31 */ - /* PA30 */ { 0, 0, 0, 0, 0, 0 }, /* PA30 */ - /* PA29 */ { 0, 0, 0, 0, 0, 0 }, /* PA29 */ - /* PA28 */ { 0, 0, 0, 0, 0, 0 }, /* PA28 */ - /* PA27 */ { 0, 0, 0, 0, 0, 0 }, /* PA27 */ - /* PA26 */ { 0, 0, 0, 0, 0, 0 }, /* PA26 */ - /* PA25 */ { 0, 0, 0, 0, 0, 0 }, /* PA25 */ - /* PA24 */ { 0, 0, 0, 0, 0, 0 }, /* PA24 */ - /* PA23 */ { 0, 0, 0, 0, 0, 0 }, /* PA23 */ - /* PA22 */ { 0, 0, 0, 0, 0, 0 }, /* PA22 */ - /* PA21 */ { 0, 0, 0, 0, 0, 0 }, /* PA21 */ - /* PA20 */ { 0, 0, 0, 0, 0, 0 }, /* PA20 */ - /* PA19 */ { 0, 0, 0, 0, 0, 0 }, /* PA19 */ - /* PA18 */ { 0, 0, 0, 0, 0, 0 }, /* PA18 */ - /* PA17 */ { 0, 0, 0, 0, 0, 0 }, /* PA17 */ - /* PA16 */ { 0, 0, 0, 0, 0, 0 }, /* PA16 */ - /* PA15 */ { 0, 0, 0, 0, 0, 0 }, /* PA15 */ - /* PA14 */ { 0, 0, 0, 0, 0, 0 }, /* PA14 */ - /* PA13 */ { 0, 0, 0, 0, 0, 0 }, /* PA13 */ - /* PA12 */ { 0, 0, 0, 0, 0, 0 }, /* PA12 */ - /* PA11 */ { 0, 0, 0, 0, 0, 0 }, /* PA11 */ - /* PA10 */ { 0, 0, 0, 0, 0, 0 }, /* PA10 */ - /* PA9 */ { 1, 1, 0, 1, 0, 0 }, /* SMC2 TxD */ - /* PA8 */ { 1, 1, 0, 0, 0, 0 }, /* SMC2 RxD */ - /* PA7 */ { 0, 0, 0, 0, 0, 0 }, /* PA7 */ - /* PA6 */ { 0, 0, 0, 0, 0, 0 }, /* PA6 */ - /* PA5 */ { 0, 0, 0, 0, 0, 0 }, /* PA5 */ - /* PA4 */ { 0, 0, 0, 0, 0, 0 }, /* PA4 */ - /* PA3 */ { 0, 0, 0, 0, 0, 0 }, /* PA3 */ - /* PA2 */ { 0, 0, 0, 0, 0, 0 }, /* PA2 */ - /* PA1 */ { 0, 0, 0, 0, 0, 0 }, /* PA1 */ - /* PA0 */ { 0, 0, 0, 0, 0, 0 } /* PA0 */ - }, - - /* Port B */ - { /* conf ppar psor pdir podr pdat */ - /* PB31 */ { 0, 0, 0, 0, 0, 0 }, /* PB31 */ - /* PB30 */ { 0, 0, 0, 0, 0, 0 }, /* PB30 */ - /* PB29 */ { 0, 0, 0, 0, 0, 0 }, /* PB29 */ - /* PB28 */ { 0, 0, 0, 0, 0, 0 }, /* PB28 */ - /* PB27 */ { 0, 0, 0, 0, 0, 0 }, /* PB27 */ - /* PB26 */ { 0, 0, 0, 0, 0, 0 }, /* PB26 */ - /* PB25 */ { 0, 0, 0, 0, 0, 0 }, /* PB25 */ - /* PB24 */ { 0, 0, 0, 0, 0, 0 }, /* PB24 */ - /* PB23 */ { 0, 0, 0, 0, 0, 0 }, /* PB23 */ - /* PB22 */ { 0, 0, 0, 0, 0, 0 }, /* PB22 */ - /* PB21 */ { 0, 0, 0, 0, 0, 0 }, /* PB21 */ - /* PB20 */ { 0, 0, 0, 0, 0, 0 }, /* PB20 */ - /* PB19 */ { 0, 0, 0, 0, 0, 0 }, /* PB19 */ - /* PB18 */ { 0, 0, 0, 0, 0, 0 }, /* PB18 */ - /* PB17 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ - /* PB16 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ - /* PB15 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ - /* PB14 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ - /* PB13 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ - /* PB12 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ - /* PB11 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ - /* PB10 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ - /* PB9 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ - /* PB8 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ - /* PB7 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ - /* PB6 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ - /* PB5 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ - /* PB4 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ - /* PB3 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ - /* PB2 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ - /* PB1 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ - /* PB0 */ { 0, 0, 0, 0, 0, 0 } /* non-existent */ - }, - - /* Port C */ - { /* conf ppar psor pdir podr pdat */ - /* PC31 */ { 0, 0, 0, 0, 0, 0 }, /* PC31 */ - /* PC30 */ { 0, 0, 0, 0, 0, 0 }, /* PC30 */ - /* PC29 */ { 0, 0, 0, 0, 0, 0 }, /* PC29 */ - /* PC28 */ { 0, 0, 0, 0, 0, 0 }, /* PC28 */ - /* PC27 */ { 0, 0, 0, 0, 0, 0 }, /* PC27 */ - /* PC26 */ { 0, 0, 0, 0, 0, 0 }, /* PC26 */ - /* PC25 */ { 1, 1, 0, 0, 0, 0 }, /* SCC4 RxClk */ - /* PC24 */ { 1, 1, 0, 0, 0, 0 }, /* SCC4 TxClk */ - /* PC23 */ { 0, 0, 0, 0, 0, 0 }, /* PC23 */ - /* PC22 */ { 0, 0, 0, 0, 0, 0 }, /* PC22 */ - /* PC21 */ { 0, 0, 0, 0, 0, 0 }, /* PC21 */ - /* PC20 */ { 0, 0, 0, 0, 0, 0 }, /* PC20 */ - /* PC19 */ { 0, 0, 0, 0, 0, 0 }, /* PC19 */ - /* PC18 */ { 0, 0, 0, 0, 0, 0 }, /* PC18 */ - /* PC17 */ { 0, 0, 0, 0, 0, 0 }, /* PC17 */ - /* PC16 */ { 0, 0, 0, 0, 0, 0 }, /* PC16 */ - /* PC15 */ { 0, 0, 0, 0, 0, 0 }, /* PC15 */ - /* PC14 */ { 0, 0, 0, 0, 0, 0 }, /* PC14 */ - /* PC13 */ { 0, 0, 0, 0, 0, 0 }, /* PC13 */ - /* PC12 */ { 0, 0, 0, 0, 0, 0 }, /* PC12 */ - /* PC11 */ { 0, 0, 0, 0, 0, 0 }, /* PC11 */ - /* PC10 */ { 0, 0, 0, 0, 0, 0 }, /* PC10 */ - /* PC9 */ { 1, 1, 0, 0, 0, 0 }, /* SCC4: CTS */ - /* PC8 */ { 1, 1, 0, 0, 0, 0 }, /* SCC4: CD */ - /* PC7 */ { 0, 0, 0, 0, 0, 0 }, /* PC7 */ - /* PC6 */ { 0, 0, 0, 0, 0, 0 }, /* PC6 */ - /* PC5 */ { 0, 0, 0, 0, 0, 0 }, /* PC5 */ - /* PC4 */ { 0, 0, 0, 0, 0, 0 }, /* PC4 */ - /* PC3 */ { 0, 0, 0, 0, 0, 0 }, /* PC3 */ - /* PC2 */ { 0, 0, 0, 0, 0, 0 }, /* PC2 */ - /* PC1 */ { 0, 0, 0, 0, 0, 0 }, /* PC1 */ - /* PC0 */ { 0, 0, 0, 0, 0, 0 }, /* PC0 */ - }, - - /* Port D */ - { /* conf ppar psor pdir podr pdat */ - /* PD31 */ { 0, 0, 0, 0, 0, 0 }, /* PD31 */ - /* PD30 */ { 0, 0, 0, 0, 0, 0 }, /* PD30 */ - /* PD29 */ { 0, 0, 0, 0, 0, 0 }, /* PD29 */ - /* PD28 */ { 0, 0, 0, 0, 0, 0 }, /* PD28 */ - /* PD27 */ { 0, 0, 0, 0, 0, 0 }, /* PD27 */ - /* PD26 */ { 0, 0, 0, 0, 0, 0 }, /* PD26 */ - /* PD25 */ { 0, 0, 0, 0, 0, 0 }, /* PD25 */ - /* PD24 */ { 0, 0, 0, 0, 0, 0 }, /* PD24 */ - /* PD23 */ { 0, 0, 0, 0, 0, 0 }, /* PD23 */ - /* PD22 */ { 1, 1, 0, 0, 0, 0 }, /* SCC4: RXD */ - /* PD21 */ { 1, 1, 0, 1, 0, 0 }, /* SCC4: TXD */ - /* PD20 */ { 1, 1, 0, 1, 0, 0 }, /* SCC4: RTS */ - /* PD19 */ { 0, 0, 0, 0, 0, 0 }, /* PD19 */ - /* PD18 */ { 0, 0, 0, 0, 0, 0 }, /* PD18 */ - /* PD17 */ { 0, 0, 0, 0, 0, 0 }, /* PD17 */ - /* PD16 */ { 0, 0, 0, 0, 0, 0 }, /* PD16 */ - /* PD15 */ { 0, 0, 0, 0, 0, 0 }, /* PD15 */ - /* PD14 */ { 0, 0, 0, 0, 0, 0 }, /* PD14 */ - /* PD13 */ { 0, 0, 0, 0, 0, 0 }, /* PD13 */ - /* PD12 */ { 0, 0, 0, 0, 0, 0 }, /* PD12 */ - /* PD11 */ { 0, 0, 0, 0, 0, 0 }, /* PD11 */ - /* PD10 */ { 0, 0, 0, 0, 0, 0 }, /* PD10 */ - /* PD9 */ { 0, 0, 0, 0, 0, 0 }, /* PD9 */ - /* PD8 */ { 0, 0, 0, 0, 0, 0 }, /* PD8 */ - /* PD7 */ { 0, 0, 0, 0, 0, 0 }, /* PD7 */ - /* PD6 */ { 0, 0, 0, 0, 0, 0 }, /* PD6 */ - /* PD5 */ { 0, 0, 0, 0, 0, 0 }, /* PD5 */ - /* PD4 */ { 0, 0, 0, 0, 0, 0 }, /* PD4 */ - /* PD3 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ - /* PD2 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ - /* PD1 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */ - /* PD0 */ { 0, 0, 0, 0, 0, 0 } /* non-existent */ - } -}; - -/* Try SDRAM initialization with P/LSDMR=sdmr and ORx=orx - * - * This routine performs standard 8260 initialization sequence - * and calculates the available memory size. It may be called - * several times to try different SDRAM configurations on both - * 60x and local buses. - */ -static long int try_init (volatile memctl8260_t * memctl, ulong sdmr, - ulong orx, volatile uchar * base) -{ - volatile uchar c = 0xff; - volatile uint *sdmr_ptr; - volatile uint *orx_ptr; - ulong maxsize, size; - int i; - - /* We must be able to test a location outsize the maximum legal size - * to find out THAT we are outside; but this address still has to be - * mapped by the controller. That means, that the initial mapping has - * to be (at least) twice as large as the maximum expected size. - */ - maxsize = (1 + (~orx | 0x7fff))/* / 2*/; - - sdmr_ptr = &memctl->memc_psdmr; - orx_ptr = &memctl->memc_or1; - - *orx_ptr = orx; - - /* - * Quote from 8260 UM (10.4.2 SDRAM Power-On Initialization, 10-35): - * - * "At system reset, initialization software must set up the - * programmable parameters in the memory controller banks registers - * (ORx, BRx, P/LSDMR). After all memory parameters are configured, - * system software should execute the following initialization sequence - * for each SDRAM device. - * - * 1. Issue a PRECHARGE-ALL-BANKS command - * 2. Issue eight CBR REFRESH commands - * 3. Issue a MODE-SET command to initialize the mode register - * - * The initial commands are executed by setting P/LSDMR[OP] and - * accessing the SDRAM with a single-byte transaction." - * - * The appropriate BRx/ORx registers have already been set when we - * get here. The SDRAM can be accessed at the address CFG_SDRAM_BASE. - */ - - *sdmr_ptr = sdmr | PSDMR_OP_PREA; - *base = c; - - *sdmr_ptr = sdmr | PSDMR_OP_CBRR; - for (i = 0; i < 8; i++) - *base = c; - - *sdmr_ptr = sdmr | PSDMR_OP_MRW; - *(base + CFG_MRS_OFFS) = c; /* setting MR on address lines */ - - *sdmr_ptr = sdmr | PSDMR_OP_NORM | PSDMR_RFEN; - *base = c; - - size = get_ram_size((long *)base, maxsize); - *orx_ptr = orx | ~(size - 1); - - return (size); -} - -phys_size_t initdram(int board_type) -{ - volatile immap_t *immap = (immap_t *) CFG_IMMR; - volatile memctl8260_t *memctl = &immap->im_memctl; - - long psize; - - memctl->memc_psrt = CFG_PSRT; - memctl->memc_mptpr = CFG_MPTPR; - -#ifndef CFG_RAMBOOT - /* 60x SDRAM setup: - */ - psize = try_init (memctl, CFG_PSDMR, CFG_OR1, - (uchar *) CFG_SDRAM_BASE); -#endif /* CFG_RAMBOOT */ - - icache_enable (); - - return (psize); -} - -int checkboard(void) -{ - puts("Board: mgcoge\n"); - - return 0; -} - -/* - * Early board initalization. - */ -int board_early_init_r(void) -{ - /* setup the UPIOx */ - *(char *)(CFG_PIGGY_BASE + 0x02) = 0xc0; - *(char *)(CFG_PIGGY_BASE + 0x03) = 0x15; - return 0; -} - -#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) -/* - * update "memory" property in the blob - */ -void ft_blob_update(void *blob, bd_t *bd) -{ - int ret, nodeoffset = 0; - ulong memory_data[2] = {0}; - ulong flash_data[8] = {0}; - - memory_data[0] = cpu_to_be32(bd->bi_memstart); - memory_data[1] = cpu_to_be32(bd->bi_memsize); - - nodeoffset = fdt_path_offset (blob, "/memory"); - if (nodeoffset >= 0) { - ret = fdt_setprop(blob, nodeoffset, "reg", memory_data, - sizeof(memory_data)); - if (ret < 0) - printf("ft_blob_update(): cannot set /memory/reg " - "property err:%s\n", fdt_strerror(ret)); - } - else { - /* memory node is required in dts */ - printf("ft_blob_update(): cannot find /memory node " - "err:%s\n", fdt_strerror(nodeoffset)); - } - /* update Flash addr, size */ - flash_data[2] = cpu_to_be32(CFG_FLASH_BASE); - flash_data[3] = cpu_to_be32(CFG_FLASH_SIZE); - flash_data[4] = cpu_to_be32(1); - flash_data[5] = cpu_to_be32(0); - flash_data[6] = cpu_to_be32(CFG_FLASH_BASE_1); - flash_data[7] = cpu_to_be32(CFG_FLASH_SIZE_1); - nodeoffset = fdt_path_offset (blob, "/localbus"); - if (nodeoffset >= 0) { - ret = fdt_setprop(blob, nodeoffset, "ranges", flash_data, - sizeof(flash_data)); - if (ret < 0) - printf("ft_blob_update(): cannot set /localbus/ranges " - "property err:%s\n", fdt_strerror(ret)); - } - else { - /* memory node is required in dts */ - printf("ft_blob_update(): cannot find /localbus node " - "err:%s\n", fdt_strerror(nodeoffset)); - } - /* MAC Adresse */ - nodeoffset = fdt_path_offset (blob, "/soc/cpm/ethernet"); - if (nodeoffset >= 0) { - ret = fdt_setprop(blob, nodeoffset, "mac-address", bd->bi_enetaddr, - sizeof(uchar) * 6); - if (ret < 0) - printf("ft_blob_update(): cannot set /soc/cpm/ethernet/mac-address " - "property err:%s\n", fdt_strerror(ret)); - } - else { - /* memory node is required in dts */ - printf("ft_blob_update(): cannot find /soc/cpm/ethernet node " - "err:%s\n", fdt_strerror(nodeoffset)); - } - -} - -void ft_board_setup(void *blob, bd_t *bd) -{ - ft_cpu_setup( blob, bd); - ft_blob_update(blob, bd); -} -#endif /* defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) */ diff --git a/board/mgsuvd/Makefile b/board/mgsuvd/Makefile deleted file mode 100644 index af0d400..0000000 --- a/board/mgsuvd/Makefile +++ /dev/null @@ -1,44 +0,0 @@ -# -# (C) Copyright 2007 -# Heiko Schocher, DENX Software Engineering, hs@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -LIB = $(obj)lib$(BOARD).a - -COBJS = $(BOARD).o - -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) -SOBJS := $(addprefix $(obj),$(SOBJS)) - -$(LIB): $(obj).depend $(OBJS) - $(AR) $(ARFLAGS) $@ $(OBJS) - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/board/mgsuvd/config.mk b/board/mgsuvd/config.mk deleted file mode 100644 index 8625cea..0000000 --- a/board/mgsuvd/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2007 -# Heiko Schocher, DENX Software Engineering, hs@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# mgsvud boards -# - -TEXT_BASE = 0xf0000000 diff --git a/board/mgsuvd/mgsuvd.c b/board/mgsuvd/mgsuvd.c deleted file mode 100644 index c51ea7e..0000000 --- a/board/mgsuvd/mgsuvd.c +++ /dev/null @@ -1,227 +0,0 @@ -/* - * (C) Copyright 2007 - * Heiko Schocher, DENX Software Engineering, hs@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#if 0 -#define DEBUG -#endif - -#include <common.h> -#include <mpc8xx.h> - -#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) -#include <libfdt.h> -#endif - -DECLARE_GLOBAL_DATA_PTR; - -const uint sdram_table[] = -{ - 0x0f07fc04, 0x0ffffc04, 0x00bdfc04, 0x0ff77c00, - 0x1ffffc05, 0xfffffc04, 0xfffffc04, 0xfffffc04, - /* 0x08 Burst Read */ - 0x0f07fc04, 0x0ffffc04, 0x00bdfc04, 0x00fffc00, - 0x00fffc00, 0x00fffc00, 0x0ff77c00, 0x1ffffc05, - /* 0x10 Load mode register */ - 0x0ffffc34, 0x0ff57c04, 0x0ffffc04, 0x1ffffc05, - 0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04, - /* 0x18 Single Write */ - 0x0f07fc04, 0x0ffffc00, 0x00bd7c04, 0x0ffffc04, - 0x0ff77c04, 0x1ffffc05, 0xfffffc04, 0xfffffc04, - /* 0x20 Burst Write */ - 0x0f07fc04, 0x0ffffc00, 0x00bd7c00, 0x00fffc00, - 0x00fffc00, 0x00fffc04, 0x0ffffc04, 0x0ff77c04, - 0x1ffffc05, 0xfffffc04, 0xfffffc04, 0xfffffc04, - 0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04, - /* 0x30 Precharge all and Refresh */ - 0x0ff77c04, 0x0ffffc04, 0x0ff5fc84, 0x0ffffc04, - 0x0ffffc04, 0x0ffffc84, 0x1ffffc05, 0xfffffc04, - 0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04, - /* 0x3C Exception */ - 0x7ffffc04, 0xfffffc07, 0xfffffc04, 0xfffffc04, -}; - -int checkboard (void) -{ - puts ("Board: Keymile mgsuvd\n"); - return (0); -} - -phys_size_t initdram (int board_type) -{ - volatile immap_t *immap = (immap_t *) CFG_IMMR; - volatile memctl8xx_t *memctl = &immap->im_memctl; - long int size; - - upmconfig (UPMB, (uint *) sdram_table, - sizeof (sdram_table) / sizeof (uint)); - - /* - * Preliminary prescaler for refresh (depends on number of - * banks): This value is selected for four cycles every 62.4 us - * with two SDRAM banks or four cycles every 31.2 us with one - * bank. It will be adjusted after memory sizing. - */ - memctl->memc_mptpr = CFG_MPTPR; - - /* - * The following value is used as an address (i.e. opcode) for - * the LOAD MODE REGISTER COMMAND during SDRAM initialisation. If - * the port size is 32bit the SDRAM does NOT "see" the lower two - * address lines, i.e. mar=0x00000088 -> opcode=0x00000022 for - * MICRON SDRAMs: - * -> 0 00 010 0 010 - * | | | | +- Burst Length = 4 - * | | | +----- Burst Type = Sequential - * | | +------- CAS Latency = 2 - * | +----------- Operating Mode = Standard - * +-------------- Write Burst Mode = Programmed Burst Length - */ - memctl->memc_mar = CFG_MAR; - - /* - * Map controller banks 1 to the SDRAM banks 1 at - * preliminary addresses - these have to be modified after the - * SDRAM size has been determined. - */ - memctl->memc_or1 = CFG_OR1_PRELIM; - memctl->memc_br1 = CFG_BR1_PRELIM; - - memctl->memc_mbmr = CFG_MBMR & (~(MBMR_PTBE)); /* no refresh yet */ - - udelay (200); - - /* perform SDRAM initializsation sequence */ - - memctl->memc_mcr = 0x80802830; /* SDRAM bank 0 */ - udelay (1); - memctl->memc_mcr = 0x80802110; /* SDRAM bank 0 - execute twice */ - udelay (1); - - memctl->memc_mbmr |= MBMR_PTBE; /* enable refresh */ - - udelay (1000); - - /* - * Check Bank 0 Memory Size for re-configuration - * - */ - size = get_ram_size(SDRAM_BASE1_PRELIM, SDRAM_MAX_SIZE); - - udelay (1000); - - debug ("SDRAM Bank 0: %ld MB\n", size >> 20); - - return (size); -} - -/* - * Early board initalization. - */ -int board_early_init_r(void) -{ - /* setup the UPIOx */ - *(char *)(CFG_PIGGY_BASE + 0x02) = 0xc0; - *(char *)(CFG_PIGGY_BASE + 0x03) = 0x35; - return 0; -} - -#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) -/* - * update "memory" property in the blob - */ -void ft_blob_update(void *blob, bd_t *bd) -{ - int ret, nodeoffset = 0; - ulong brg_data[1] = {0}; - ulong memory_data[2] = {0}; - ulong flash_data[4] = {0}; - - memory_data[0] = cpu_to_be32(bd->bi_memstart); - memory_data[1] = cpu_to_be32(bd->bi_memsize); - - nodeoffset = fdt_path_offset (blob, "/memory"); - if (nodeoffset >= 0) { - ret = fdt_setprop(blob, nodeoffset, "reg", memory_data, - sizeof(memory_data)); - if (ret < 0) - printf("ft_blob_update(): cannot set /memory/reg " - "property err:%s\n", fdt_strerror(ret)); - } - else { - /* memory node is required in dts */ - printf("ft_blob_update(): cannot find /memory node " - "err:%s\n", fdt_strerror(nodeoffset)); - } - - flash_data[2] = cpu_to_be32(bd->bi_flashstart); - flash_data[3] = cpu_to_be32(bd->bi_flashsize); - nodeoffset = fdt_path_offset (blob, "/localbus"); - if (nodeoffset >= 0) { - ret = fdt_setprop(blob, nodeoffset, "ranges", flash_data, - sizeof(flash_data)); - if (ret < 0) - printf("ft_blob_update(): cannot set /localbus/ranges " - "property err:%s\n", fdt_strerror(ret)); - } - else { - /* memory node is required in dts */ - printf("ft_blob_update(): cannot find /localbus node " - "err:%s\n", fdt_strerror(nodeoffset)); - } - /* BRG */ - brg_data[0] = cpu_to_be32(bd->bi_busfreq); - nodeoffset = fdt_path_offset (blob, "/soc/cpm"); - if (nodeoffset >= 0) { - ret = fdt_setprop(blob, nodeoffset, "brg-frequency", brg_data, - sizeof(brg_data)); - if (ret < 0) - printf("ft_blob_update(): cannot set /soc/cpm/brg-frequency " - "property err:%s\n", fdt_strerror(ret)); - } - else { - /* memory node is required in dts */ - printf("ft_blob_update(): cannot find /soc/cpm node " - "err:%s\n", fdt_strerror(nodeoffset)); - } - /* MAC Adresse */ - nodeoffset = fdt_path_offset (blob, "/soc/cpm/ethernet"); - if (nodeoffset >= 0) { - ret = fdt_setprop(blob, nodeoffset, "mac-address", bd->bi_enetaddr, - sizeof(uchar) * 6); - if (ret < 0) - printf("ft_blob_update(): cannot set /soc/cpm/scc/mac-address " - "property err:%s\n", fdt_strerror(ret)); - } - else { - /* memory node is required in dts */ - printf("ft_blob_update(): cannot find /soc/cpm/ethernet node " - "err:%s\n", fdt_strerror(nodeoffset)); - } -} - -void ft_board_setup(void *blob, bd_t *bd) -{ - ft_cpu_setup( blob, bd); - ft_blob_update(blob, bd); -} -#endif /* defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) */ diff --git a/board/mgsuvd/u-boot.lds b/board/mgsuvd/u-boot.lds deleted file mode 100644 index 26aa5d6..0000000 --- a/board/mgsuvd/u-boot.lds +++ /dev/null @@ -1,143 +0,0 @@ -/* - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -OUTPUT_ARCH(powerpc) -/* Do we need any of these for elf? - __DYNAMIC = 0; */ -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - . = + SIZEOF_HEADERS; - .interp : { *(.interp) } - .hash : { *(.hash) } - .dynsym : { *(.dynsym) } - .dynstr : { *(.dynstr) } - .rel.text : { *(.rel.text) } - .rela.text : { *(.rela.text) } - .rel.data : { *(.rel.data) } - .rela.data : { *(.rela.data) } - .rel.rodata : { *(.rel.rodata) } - .rela.rodata : { *(.rela.rodata) } - .rel.got : { *(.rel.got) } - .rela.got : { *(.rela.got) } - .rel.ctors : { *(.rel.ctors) } - .rela.ctors : { *(.rela.ctors) } - .rel.dtors : { *(.rel.dtors) } - .rela.dtors : { *(.rela.dtors) } - .rel.bss : { *(.rel.bss) } - .rela.bss : { *(.rela.bss) } - .rel.plt : { *(.rel.plt) } - .rela.plt : { *(.rela.plt) } - .init : { *(.init) } - .plt : { *(.plt) } - .text : - { - /* WARNING - the following is hand-optimized to fit within */ - /* the sector layout of our flash chips! XXX FIXME XXX */ - - cpu/mpc8xx/start.o (.text) - cpu/mpc8xx/traps.o (.text) - common/dlmalloc.o (.text) - lib_ppc/ppcstring.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_generic/zlib.o (.text) - lib_ppc/cache.o (.text) - lib_ppc/time.o (.text) - - . = DEFINED(env_offset) ? env_offset : .; - common/env_embedded.o (.ppcenv) - - *(.text) - *(.fixup) - *(.got1) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(.rodata) - *(.rodata1) - *(.rodata.str1.4) - *(.eh_frame) - } - .fini : { *(.fini) } =0 - .ctors : { *(.ctors) } - .dtors : { *(.dtors) } - - /* Read-write section, merged into data segment: */ - . = (. + 0x00FF) & 0xFFFFFF00; - _erotext = .; - PROVIDE (erotext = .); - .reloc : - { - *(.got) - _GOT2_TABLE_ = .; - *(.got2) - _FIXUP_TABLE_ = .; - *(.fixup) - } - __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data) - *(.data1) - *(.sdata) - *(.sdata2) - *(.dynamic) - CONSTRUCTORS - } - _edata = .; - PROVIDE (edata = .); - - . = .; - __u_boot_cmd_start = .; - .u_boot_cmd : { *(.u_boot_cmd) } - __u_boot_cmd_end = .; - - - . = .; - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(256); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(256); - __init_end = .; - - __bss_start = .; - .bss (NOLOAD) : - { - *(.sbss) *(.scommon) - *(.dynbss) - *(.bss) - *(COMMON) - } - _end = . ; - PROVIDE (end = .); -}