Rename CONFIG_SPL_RESET_SUPPORT to CONFIG_SPL_DM_RESET, so can use CONFIG_IS_ENABLED(DM_RESET) checking in reset.h later.

Signed-off-by: Ley Foon Tan ley.foon.tan@intel.com --- arch/arm/mach-stm32mp/Kconfig | 2 +- common/spl/Kconfig | 2 +- drivers/Makefile | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig index abceede..898ad6b 100644 --- a/arch/arm/mach-stm32mp/Kconfig +++ b/arch/arm/mach-stm32mp/Kconfig @@ -13,7 +13,7 @@ config SPL select SPL_OF_TRANSLATE select SPL_PINCTRL select SPL_REGMAP - select SPL_RESET_SUPPORT + select SPL_DM_RESET select SPL_SERIAL_SUPPORT select SPL_SYSCON select SPL_DRIVERS_MISC_SUPPORT diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 431710a..bf301a9 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -577,7 +577,7 @@ config SPL_POST_MEM_SUPPORT performed before booting. This enables the drivers in post/drivers as part of an SPL build.

-config SPL_RESET_SUPPORT +config SPL_DM_RESET bool "Support reset drivers" depends on SPL help diff --git a/drivers/Makefile b/drivers/Makefile index a213ea9..66834c3 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -28,7 +28,7 @@ obj-$(CONFIG_ARMADA_XP) += ddr/marvell/axp/ obj-$(CONFIG_ALTERA_SDRAM) += ddr/altera/ obj-$(CONFIG_SPL_POWER_SUPPORT) += power/ power/pmic/ obj-$(CONFIG_SPL_POWER_SUPPORT) += power/regulator/ -obj-$(CONFIG_SPL_RESET_SUPPORT) += reset/ +obj-$(CONFIG_SPL_DM_RESET) += reset/ obj-$(CONFIG_SPL_MTD_SUPPORT) += mtd/ obj-$(CONFIG_SPL_ONENAND_SUPPORT) += mtd/onenand/ obj-$(CONFIG_SPL_UBI) += mtd/ubispl/

Add code to reset all reset signals as in mmc DT node. A reset property is an optional feature, so only print out a warning and do not fail if a reset property is not present.

If a reset property is discovered, then use it to deassert, thus bringing the IP out of reset.

Signed-off-by: Ley Foon Tan ley.foon.tan@intel.com Reviewed-by: Simon Glass sjg@chromium.org

--- v3: - Removed #ifdef CONFIG_DM_RESET switch.

v5: - Added Simon's Reviewed-by. --- drivers/mmc/socfpga_dw_mmc.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+)

diff --git a/drivers/mmc/socfpga_dw_mmc.c b/drivers/mmc/socfpga_dw_mmc.c index d0a0362..4be4eb5 100644 --- a/drivers/mmc/socfpga_dw_mmc.c +++ b/drivers/mmc/socfpga_dw_mmc.c @@ -13,6 +13,7 @@ #include <linux/libfdt.h> #include <linux/err.h> #include <malloc.h> +#include <reset.h>

DECLARE_GLOBAL_DATA_PTR;

@@ -33,6 +34,20 @@ struct dwmci_socfpga_priv_data { unsigned int smplsel; };

+static void socfpga_dwmci_reset(struct udevice *dev) +{ + struct reset_ctl_bulk reset_bulk; + int ret; + + ret = reset_get_bulk(dev, &reset_bulk); + if (ret) { + dev_warn(dev, "Can't get reset: %d\n", ret); + return; + } + + reset_deassert_bulk(&reset_bulk); +} + static void socfpga_dwmci_clksel(struct dwmci_host *host) { struct dwmci_socfpga_priv_data *priv = host->priv; @@ -109,6 +124,8 @@ static int socfpga_dwmmc_probe(struct udevice *dev) struct dwmci_socfpga_priv_data *priv = dev_get_priv(dev); struct dwmci_host *host = &priv->host;

+ socfpga_dwmci_reset(dev); + #ifdef CONFIG_BLK dwmci_setup_cfg(&plat->cfg, host, host->bus_hz, 400000); host->mmc = &plat->mmc;

Add code to reset all reset signals as in serial DT node. A reset property is an optional feature, so do not fail if a reset property is not present.

If a reset property is discovered, then use it to deassert, thus bringing the IP out of reset.

Signed-off-by: Ley Foon Tan ley.foon.tan@intel.com Reviewed-by: Marek Vasut marex@denx.de Reviewed-by: Simon Glass sjg@chromium.org

--- v2: - Added Marek's Reviewed-by.

v5: - Added Simon's Reviewed-by. --- drivers/serial/ns16550.c | 8 ++++++++ 1 file changed, 8 insertions(+)

diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 53550bf..9c80090 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -9,6 +9,7 @@ #include <dm.h> #include <errno.h> #include <ns16550.h> +#include <reset.h> #include <serial.h> #include <watchdog.h> #include <linux/types.h> @@ -177,6 +178,7 @@ void NS16550_init(NS16550_t com_port, int baud_divisor) #if defined(CONFIG_ARCH_OMAP2PLUS) serial_out(0x7, &com_port->mdr1); /* mode select reset TL16C750*/ #endif + serial_out(UART_MCRVAL, &com_port->mcr); serial_out(ns16550_getfcr(com_port), &com_port->fcr); if (baud_divisor != -1) @@ -370,6 +372,12 @@ static int ns16550_serial_setbrg(struct udevice *dev, int baudrate) int ns16550_serial_probe(struct udevice *dev) { struct NS16550 *const com_port = dev_get_priv(dev); + struct reset_ctl_bulk reset_bulk; + int ret; + + ret = reset_get_bulk(dev, &reset_bulk); + if (!ret) + reset_deassert_bulk(&reset_bulk);

com_port->plat = dev_get_platdata(dev); NS16550_init(com_port, -1);

Add code to reset all reset signals as in Ethernet DT node. A reset property is an optional feature, so only print out a warning and do not fail if a reset property is not present.

If a reset property is discovered, then use it to deassert, thus bringing the IP out of reset.

Signed-off-by: Ley Foon Tan ley.foon.tan@intel.com Reviewed-by: Simon Glass sjg@chromium.org Acked-by: Joe Hershberger joe.hershberger@ni.com

--- v2: - Removed 'return' when failed to reset.

v5: - Added Simon's Reviewed-by.

v6: - Added Joe's Acked-by. --- drivers/net/designware.c | 8 ++++++++ 1 file changed, 8 insertions(+)

diff --git a/drivers/net/designware.c b/drivers/net/designware.c index cf12521..6797691 100644 --- a/drivers/net/designware.c +++ b/drivers/net/designware.c @@ -15,6 +15,7 @@ #include <miiphy.h> #include <malloc.h> #include <pci.h> +#include <reset.h> #include <linux/compiler.h> #include <linux/err.h> #include <linux/kernel.h> @@ -664,6 +665,7 @@ int designware_eth_probe(struct udevice *dev) u32 iobase = pdata->iobase; ulong ioaddr; int ret; + struct reset_ctl_bulk reset_bulk; #ifdef CONFIG_CLK int i, err, clock_nb;

@@ -710,6 +712,12 @@ int designware_eth_probe(struct udevice *dev) } #endif

+ ret = reset_get_bulk(dev, &reset_bulk); + if (ret) + dev_warn(dev, "Can't get reset: %d\n", ret); + else + reset_deassert_bulk(&reset_bulk); + #ifdef CONFIG_DM_PCI /* * If we are on PCI bus, either directly attached to a PCI root port,