Re: [U-Boot] [PATCH v2 2/2] powerpc/c29xpcie: 8k page size NAND boot support base on TPL/SPL

11 Dec
2013
11 Dec
'13
7:20 a.m.
SET_TLB_ENTRY(1, CONFIG_SYS_NAND_BASE, CONFIG_SYS_NAND_BASE_PHYS,
MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 5, BOOKE_PAGESZ_64K, 1),
No.
Without MAS3_SX, the board can't run in booting from NAND.
SET_TLB_ENTRY(1, CONFIG_SYS_PLATFORM_SRAM_BASE, @@ -61,7 +72,8 @@
struct fsl_e_tlb_entry tlb_table[] = { MAS3_SX|MAS3_SW|MAS3_SR, 0, 0, 7, BOOKE_PAGESZ_256K, 1),
-#ifdef CONFIG_SYS_RAMBOOT +#if defined(CONFIG_SYS_RAMBOOT) || (defined(CONFIG_SPL) \
SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE, MAS3_SX|MAS3_SW|MAS3_SR, 0,&& !defined(CONFIG_SPL_COMMON_INIT_DDR))
This will have the result of mapping DDR in the SPL where it's not used, but not in the TPL where it is.
For the TPL the ddr initial by initdram(), so don't need to mapping ddr here. I intend to change it to #if defined(CONFIG_SYS_RAMBOOT) || !defined(CONFIG_SPL_COMMON_INIT_DDR) Is it more clear?
-Scott
-Po Liu
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