[U-Boot] [PATCH] mx6qsabresd: Add 8-bit USDHC support

USDHC3 has 8 pins wired in mx6qsabresd. Configure the extra pins.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com --- board/freescale/mx6qsabresd/mx6qsabresd.c | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/board/freescale/mx6qsabresd/mx6qsabresd.c b/board/freescale/mx6qsabresd/mx6qsabresd.c index 4f47fd3..56ec153 100644 --- a/board/freescale/mx6qsabresd/mx6qsabresd.c +++ b/board/freescale/mx6qsabresd/mx6qsabresd.c @@ -81,6 +81,10 @@ iomux_v3_cfg_t usdhc3_pads[] = { MX6Q_PAD_SD3_DAT1__USDHC3_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), MX6Q_PAD_SD3_DAT2__USDHC3_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), MX6Q_PAD_SD3_DAT3__USDHC3_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6Q_PAD_SD3_DAT4__USDHC3_DAT4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6Q_PAD_SD3_DAT5__USDHC3_DAT5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6Q_PAD_SD3_DAT6__USDHC3_DAT6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6Q_PAD_SD3_DAT7__USDHC3_DAT7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), MX6Q_PAD_NANDF_D0__GPIO_2_0 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ };

On 18/09/2012 21:27, Fabio Estevam wrote:
USDHC3 has 8 pins wired in mx6qsabresd. Configure the extra pins.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com
Applied to u-boot-imx, next branch, thanks.
Best regards, Stefano Babic
participants (2)
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Fabio Estevam
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Stefano Babic