[U-Boot] [PATCH] x86: Fix PCI UART compatible string for crownbay and galileo

With recent ns16550 driver changes, we only changed the legacy UART (at I/O port 0x3f8) compatible string, but forgot to change the PCI UART compatible string. Now fix it.
Signed-off-by: Bin Meng bmeng.cn@gmail.com ---
arch/x86/dts/crownbay.dts | 8 ++++---- arch/x86/dts/galileo.dts | 2 +- 2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts index 8ee59f6..0850c86 100644 --- a/arch/x86/dts/crownbay.dts +++ b/arch/x86/dts/crownbay.dts @@ -121,7 +121,7 @@ "pci8086,8811", "pciclass,070002", "pciclass,0700", - "x86-uart"; + "ns16550"; u-boot,dm-pre-reloc; reg = <0x00025100 0x0 0x0 0x0 0x0 0x01025110 0x0 0x0 0x0 0x0>; @@ -135,7 +135,7 @@ "pci8086,8812", "pciclass,070002", "pciclass,0700", - "x86-uart"; + "ns16550"; u-boot,dm-pre-reloc; reg = <0x00025200 0x0 0x0 0x0 0x0 0x01025210 0x0 0x0 0x0 0x0>; @@ -149,7 +149,7 @@ "pci8086,8813", "pciclass,070002", "pciclass,0700", - "x86-uart"; + "ns16550"; u-boot,dm-pre-reloc; reg = <0x00025300 0x0 0x0 0x0 0x0 0x01025310 0x0 0x0 0x0 0x0>; @@ -163,7 +163,7 @@ "pci8086,8814", "pciclass,070002", "pciclass,0700", - "x86-uart"; + "ns16550"; u-boot,dm-pre-reloc; reg = <0x00025400 0x0 0x0 0x0 0x0 0x01025410 0x0 0x0 0x0 0x0>; diff --git a/arch/x86/dts/galileo.dts b/arch/x86/dts/galileo.dts index 2342de7..55165e1 100644 --- a/arch/x86/dts/galileo.dts +++ b/arch/x86/dts/galileo.dts @@ -70,7 +70,7 @@ "pci8086,0936", "pciclass,070002", "pciclass,0700", - "x86-uart"; + "ns16550"; u-boot,dm-pre-reloc; reg = <0x0000a500 0x0 0x0 0x0 0x0 0x0200a510 0x0 0x0 0x0 0x0>;

On 7 December 2015 at 06:28, Bin Meng bmeng.cn@gmail.com wrote:
With recent ns16550 driver changes, we only changed the legacy UART (at I/O port 0x3f8) compatible string, but forgot to change the PCI UART compatible string. Now fix it.
Signed-off-by: Bin Meng bmeng.cn@gmail.com
arch/x86/dts/crownbay.dts | 8 ++++---- arch/x86/dts/galileo.dts | 2 +- 2 files changed, 5 insertions(+), 5 deletions(-)
Acked-by: Simon Glass sjg@chromium.org

On Wed, Dec 9, 2015 at 3:34 AM, Simon Glass sjg@chromium.org wrote:
On 7 December 2015 at 06:28, Bin Meng bmeng.cn@gmail.com wrote:
With recent ns16550 driver changes, we only changed the legacy UART (at I/O port 0x3f8) compatible string, but forgot to change the PCI UART compatible string. Now fix it.
Signed-off-by: Bin Meng bmeng.cn@gmail.com
arch/x86/dts/crownbay.dts | 8 ++++---- arch/x86/dts/galileo.dts | 2 +- 2 files changed, 5 insertions(+), 5 deletions(-)
Acked-by: Simon Glass sjg@chromium.org
applied to u-boot-x86/master, thanks!
participants (2)
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Bin Meng
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Simon Glass