[U-Boot] [PATCH 1/2] rockchip: config: rk3399: clean with make savedefconfig
Clean the evb-rk3399_defconfig with make savedefconfig.
Signed-off-by: Kever Yang kever.yang@rock-chips.com ---
configs/evb-rk3399_defconfig | 14 +++++--------- 1 file changed, 5 insertions(+), 9 deletions(-)
diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig index 50b0d74..1ee775f 100644 --- a/configs/evb-rk3399_defconfig +++ b/configs/evb-rk3399_defconfig @@ -1,20 +1,17 @@ CONFIG_ARM=y CONFIG_ARCH_ROCKCHIP=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_ROCKCHIP_RK3399=y +CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb" CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y -CONFIG_SPL_OF_LIBFDT=y -CONFIG_SPL_ATF_SUPPORT=y -CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200 -CONFIG_SPL_ATF_TEXT_BASE=0x00010000 # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 -CONFIG_SPL_LIBCOMMON_SUPPORT=y -CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_SYS_MALLOC_F_LEN=0x4000 +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMLS is not set CONFIG_CMD_GPT=y @@ -23,7 +20,6 @@ CONFIG_CMD_SF=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TIME=y -CONFIG_CMD_PXE=y CONFIG_SPL_OF_CONTROL=y CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_SPL_OF_PLATDATA=y
Enable gmac for evb-rk3399.
Signed-off-by: Kever Yang kever.yang@rock-chips.com ---
arch/arm/dts/rk3399-evb.dts | 23 +++++++++++++++++++++++ configs/evb-rk3399_defconfig | 4 ++++ 2 files changed, 27 insertions(+)
diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts index c3a7ca2..5e7d3bf 100644 --- a/arch/arm/dts/rk3399-evb.dts +++ b/arch/arm/dts/rk3399-evb.dts @@ -51,6 +51,13 @@ regulator-name = "vcc5v0_host"; gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>; }; + + clkin_gmac: external-gmac-clock { + compatible = "fixed-clock"; + clock-frequency = <125000000>; + clock-output-names = "clkin_gmac"; + #clock-cells = <0>; + }; };
&emmc_phy { @@ -125,3 +132,19 @@ }; }; }; + +&gmac { + phy-supply = <&vcc_phy>; + phy-mode = "rgmii"; + clock_in_out = "input"; + snps,reset-gpio = <&gpio3 16 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + snps,reset-delays-us = <0 10000 50000>; + assigned-clocks = <&cru SCLK_RMII_SRC>; + assigned-clock-parents = <&clkin_gmac>; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; + tx_delay = <0x10>; + rx_delay = <0x10>; + status = "okay"; +}; diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig index 1ee775f..4a17daf 100644 --- a/configs/evb-rk3399_defconfig +++ b/configs/evb-rk3399_defconfig @@ -23,6 +23,7 @@ CONFIG_CMD_TIME=y CONFIG_SPL_OF_CONTROL=y CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_SPL_OF_PLATDATA=y +CONFIG_NET_RANDOM_ETHADDR=y CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y CONFIG_SYSCON=y @@ -33,6 +34,9 @@ CONFIG_ROCKCHIP_GPIO=y CONFIG_MMC_DW=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_GMAC_ROCKCHIP=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_ROCKCHIP_RK3399_PINCTRL=y
Hi Simon,
Please ignore this patch, the GMAC RST pin IO number is wrong in this patch, I will send a new patch for it.
Thanks, - Kever On 04/12/2017 11:54 AM, Kever Yang wrote:
Enable gmac for evb-rk3399.
Signed-off-by: Kever Yang kever.yang@rock-chips.com
arch/arm/dts/rk3399-evb.dts | 23 +++++++++++++++++++++++ configs/evb-rk3399_defconfig | 4 ++++ 2 files changed, 27 insertions(+)
diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts index c3a7ca2..5e7d3bf 100644 --- a/arch/arm/dts/rk3399-evb.dts +++ b/arch/arm/dts/rk3399-evb.dts @@ -51,6 +51,13 @@ regulator-name = "vcc5v0_host"; gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>; };
clkin_gmac: external-gmac-clock {
compatible = "fixed-clock";clock-frequency = <125000000>;clock-output-names = "clkin_gmac";#clock-cells = <0>;}; };
&emmc_phy {
@@ -125,3 +132,19 @@ }; }; };
+&gmac {
phy-supply = <&vcc_phy>;- phy-mode = "rgmii";
- clock_in_out = "input";
- snps,reset-gpio = <&gpio3 16 GPIO_ACTIVE_LOW>;
- snps,reset-active-low;
- snps,reset-delays-us = <0 10000 50000>;
- assigned-clocks = <&cru SCLK_RMII_SRC>;
- assigned-clock-parents = <&clkin_gmac>;
- pinctrl-names = "default";
- pinctrl-0 = <&rgmii_pins>;
- tx_delay = <0x10>;
- rx_delay = <0x10>;
- status = "okay";
+}; diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig index 1ee775f..4a17daf 100644 --- a/configs/evb-rk3399_defconfig +++ b/configs/evb-rk3399_defconfig @@ -23,6 +23,7 @@ CONFIG_CMD_TIME=y CONFIG_SPL_OF_CONTROL=y CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_SPL_OF_PLATDATA=y +CONFIG_NET_RANDOM_ETHADDR=y CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y CONFIG_SYSCON=y @@ -33,6 +34,9 @@ CONFIG_ROCKCHIP_GPIO=y CONFIG_MMC_DW=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_GMAC_ROCKCHIP=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_ROCKCHIP_RK3399_PINCTRL=y
On 11 April 2017 at 21:54, Kever Yang kever.yang@rock-chips.com wrote:
Clean the evb-rk3399_defconfig with make savedefconfig.
Signed-off-by: Kever Yang kever.yang@rock-chips.com
configs/evb-rk3399_defconfig | 14 +++++--------- 1 file changed, 5 insertions(+), 9 deletions(-)
Acked-by: Simon Glass sjg@chromium.org
On 16 April 2017 at 13:30, Simon Glass sjg@chromium.org wrote:
On 11 April 2017 at 21:54, Kever Yang kever.yang@rock-chips.com wrote:
Clean the evb-rk3399_defconfig with make savedefconfig.
Signed-off-by: Kever Yang kever.yang@rock-chips.com
configs/evb-rk3399_defconfig | 14 +++++--------- 1 file changed, 5 insertions(+), 9 deletions(-)
Acked-by: Simon Glass sjg@chromium.org
Applied to u-boot-rockchip/next, thanks!
participants (2)
-
Kever Yang -
Simon Glass