DRA71x processors are reduced pin and software compatible derivative of DRA72 processors. Add support for detection of SR2.1 version of DRA71x family of processors.

Signed-off-by: Vishal Mahaveer vishalm@ti.com --- arch/arm/include/asm/arch-omap5/omap.h | 1 + arch/arm/include/asm/omap_common.h | 1 + arch/arm/mach-omap2/omap5/hw_data.c | 2 ++ arch/arm/mach-omap2/omap5/hwinit.c | 3 +++ arch/arm/mach-omap2/omap5/sdram.c | 2 ++ board/ti/dra7xx/evm.c | 3 +++ 6 files changed, 12 insertions(+)

diff --git a/arch/arm/include/asm/arch-omap5/omap.h b/arch/arm/include/asm/arch-omap5/omap.h index b047f0d..6705544 100644 --- a/arch/arm/include/asm/arch-omap5/omap.h +++ b/arch/arm/include/asm/arch-omap5/omap.h @@ -63,6 +63,7 @@ #define DRA752_CONTROL_ID_CODE_ES2_0 0x2B99002F #define DRA722_CONTROL_ID_CODE_ES1_0 0x0B9BC02F #define DRA722_CONTROL_ID_CODE_ES2_0 0x1B9BC02F +#define DRA722_CONTROL_ID_CODE_ES2_1 0x2B9BC02F

/* UART */ #define UART1_BASE (OMAP54XX_L4_PER_BASE + 0x6a000) diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h index ef5c481..46ee9c2 100644 --- a/arch/arm/include/asm/omap_common.h +++ b/arch/arm/include/asm/omap_common.h @@ -766,6 +766,7 @@ static inline u8 is_dra72x(void) #define DRA752_ES2_0 0x07520200 #define DRA722_ES1_0 0x07220100 #define DRA722_ES2_0 0x07220200 +#define DRA722_ES2_1 0x07220210

/* * silicon device type diff --git a/arch/arm/mach-omap2/omap5/hw_data.c b/arch/arm/mach-omap2/omap5/hw_data.c index 4ad6b53..06a9fd2 100644 --- a/arch/arm/mach-omap2/omap5/hw_data.c +++ b/arch/arm/mach-omap2/omap5/hw_data.c @@ -719,6 +719,7 @@ void __weak hw_data_init(void)

case DRA722_ES1_0: case DRA722_ES2_0: + case DRA722_ES2_1: *prcm = &dra7xx_prcm; *dplls_data = &dra72x_dplls; *ctrl = &dra7xx_ctrl; @@ -753,6 +754,7 @@ void get_ioregs(const struct ctrl_ioregs **regs) *regs = &ioregs_dra72x_es1; break; case DRA722_ES2_0: + case DRA722_ES2_1: *regs = &ioregs_dra72x_es2; break;

diff --git a/arch/arm/mach-omap2/omap5/hwinit.c b/arch/arm/mach-omap2/omap5/hwinit.c index afe59e0..d53900f 100644 --- a/arch/arm/mach-omap2/omap5/hwinit.c +++ b/arch/arm/mach-omap2/omap5/hwinit.c @@ -377,6 +377,9 @@ void init_omap_revision(void) case DRA722_CONTROL_ID_CODE_ES2_0: *omap_si_rev = DRA722_ES2_0; break; + case DRA722_CONTROL_ID_CODE_ES2_1: + *omap_si_rev = DRA722_ES2_1; + break; default: *omap_si_rev = OMAP5430_SILICON_ID_INVALID; } diff --git a/arch/arm/mach-omap2/omap5/sdram.c b/arch/arm/mach-omap2/omap5/sdram.c index 7712923..684b5bc 100644 --- a/arch/arm/mach-omap2/omap5/sdram.c +++ b/arch/arm/mach-omap2/omap5/sdram.c @@ -481,6 +481,7 @@ void __weak emif_get_ext_phy_ctrl_const_regs(u32 emif_nr, *size = ARRAY_SIZE(dra_ddr3_ext_phy_ctrl_const_base_666MHz); break; case DRA722_ES2_0: + case DRA722_ES2_1: *regs = dra_ddr3_ext_phy_ctrl_const_base_666MHz_es2; *size = ARRAY_SIZE(dra_ddr3_ext_phy_ctrl_const_base_666MHz_es2); break; @@ -714,6 +715,7 @@ const struct read_write_regs *get_bug_regs(u32 *iterations) case DRA752_ES2_0: case DRA722_ES1_0: case DRA722_ES2_0: + case DRA722_ES2_1: bug_00339_regs_ptr = dra_bug_00339_regs; *iterations = sizeof(dra_bug_00339_regs)/ sizeof(dra_bug_00339_regs[0]); diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c index 93d3d0b..58feb15 100644 --- a/board/ti/dra7xx/evm.c +++ b/board/ti/dra7xx/evm.c @@ -236,6 +236,7 @@ void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs) break; case DRA722_ES1_0: case DRA722_ES2_0: + case DRA722_ES2_1: if (ram_size < CONFIG_MAX_MEM_MAPPED) *regs = &emif_1_regs_ddr3_666_mhz_1cs_dra_es1; else @@ -299,6 +300,7 @@ void emif_get_dmm_regs(const struct dmm_lisa_map_regs **dmm_lisa_regs) break; case DRA722_ES1_0: case DRA722_ES2_0: + case DRA722_ES2_1: default: if (ram_size < CONFIG_MAX_MEM_MAPPED) *dmm_lisa_regs = &lisa_map_2G_x_2; @@ -643,6 +645,7 @@ void recalibrate_iodelay(void) switch (omap_revision()) { case DRA722_ES1_0: case DRA722_ES2_0: + case DRA722_ES2_1: pads = dra72x_core_padconf_array_common; npads = ARRAY_SIZE(dra72x_core_padconf_array_common); if (board_is_dra71x_evm()) {