[U-Boot] [PATCH 1/5] spl: dm: disable SPI DM flash for non-DM SPL

From: Pan Jiafei Jiafei.Pan@freescale.com
This patch solves the problem that spiboot cannot be performed in non-DM SPL.
Signed-off-by: Pan Jiafei Jiafei.Pan@freescale.com Signed-off-by: Chuanhua Han chuanhua.han@nxp.com --- depends on: - https://patchwork.ozlabs.org/project/uboot/list/?series=99439
include/config_uncmd_spl.h | 1 + 1 file changed, 1 insertion(+)
diff --git a/include/config_uncmd_spl.h b/include/config_uncmd_spl.h index c2f9735ce7..da94b3d9df 100644 --- a/include/config_uncmd_spl.h +++ b/include/config_uncmd_spl.h @@ -15,6 +15,7 @@ #undef CONFIG_DM_GPIO #undef CONFIG_DM_I2C #undef CONFIG_DM_SPI +#undef CONFIG_DM_SPI_FLASH #endif
#undef CONFIG_DM_WARN

Modify the Freescale ESPI driver to support the driver model. Also resolved the following problems:
===================== WARNING ====================== This board does not use CONFIG_DM_SPI. Please update the board before v2019.04 for no dm conversion and v2019.07 for partially dm converted drivers. Failure to update can lead to driver/board removal See doc/driver-model/MIGRATION.txt for more info. ==================================================== ===================== WARNING ====================== This board does not use CONFIG_DM_SPI_FLASH. Please update the board to use CONFIG_SPI_FLASH before the v2019.07 release. Failure to update by the deadline may result in board removal. See doc/driver-model/MIGRATION.txt for more info. ====================================================
Signed-off-by: Chuanhua Han chuanhua.han@nxp.com --- depends on: - https://patchwork.ozlabs.org/project/uboot/list/?series=99439
drivers/spi/fsl_espi.c | 450 +++++++++++++++++++++++++++++------------ 1 file changed, 316 insertions(+), 134 deletions(-)
diff --git a/drivers/spi/fsl_espi.c b/drivers/spi/fsl_espi.c index 7444ae1a06..6ebe57c30b 100644 --- a/drivers/spi/fsl_espi.c +++ b/drivers/spi/fsl_espi.c @@ -4,17 +4,27 @@ * * Copyright 2010-2011 Freescale Semiconductor, Inc. * Author: Mingkai Hu (Mingkai.hu@freescale.com) + * Chuanhua Han (chuanhua.han@nxp.com) */
#include <common.h> - #include <malloc.h> #include <spi.h> #include <asm/immap_85xx.h> +#include <dm.h> +#include <errno.h> +#include <fdtdec.h> + +struct fsl_espi_platdata { + uint flags; + uint speed_hz; + uint num_chipselect; + fdt_addr_t regs_addr; +};
-struct fsl_spi_slave { - struct spi_slave slave; +struct fsl_espi_priv { ccsr_espi_t *espi; + u32 speed_hz; unsigned int div16; unsigned int pm; int tx_timeout; @@ -25,9 +35,18 @@ struct fsl_spi_slave { unsigned int max_transfer_length; };
+struct fsl_spi_slave { + struct spi_slave slave; + struct fsl_espi_priv priv; +}; + #define to_fsl_spi_slave(s) container_of(s, struct fsl_spi_slave, slave) +#define to_fsl_spi_priv(p) container_of(p, struct fsl_spi_slave, priv) #define US_PER_SECOND 1000000UL
+/* default SCK frequency, unit: HZ */ +#define FSL_ESPI_DEFAULT_SCK_FREQ 10000000 + #define ESPI_MAX_CS_NUM 4 #define ESPI_FIFO_WIDTH_BIT 32
@@ -62,121 +81,46 @@ struct fsl_spi_slave {
#define ESPI_MAX_DATA_TRANSFER_LEN 0xFFF0
-struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int mode) -{ - struct fsl_spi_slave *fsl; - sys_info_t sysinfo; - unsigned long spibrg = 0; - unsigned long spi_freq = 0; - unsigned char pm = 0; - - if (!spi_cs_is_valid(bus, cs)) - return NULL; - - fsl = spi_alloc_slave(struct fsl_spi_slave, bus, cs); - if (!fsl) - return NULL; - - fsl->espi = (void *)(CONFIG_SYS_MPC85xx_ESPI_ADDR); - fsl->mode = mode; - fsl->max_transfer_length = ESPI_MAX_DATA_TRANSFER_LEN; - - /* Set eSPI BRG clock source */ - get_sys_info(&sysinfo); - spibrg = sysinfo.freq_systembus / 2; - fsl->div16 = 0; - if ((spibrg / max_hz) > 32) { - fsl->div16 = ESPI_CSMODE_DIV16; - pm = spibrg / (max_hz * 16 * 2); - if (pm > 16) { - pm = 16; - debug("Requested speed is too low: %d Hz, %ld Hz " - "is used.\n", max_hz, spibrg / (32 * 16)); - } - } else - pm = spibrg / (max_hz * 2); - if (pm) - pm--; - fsl->pm = pm; - - if (fsl->div16) - spi_freq = spibrg / ((pm + 1) * 2 * 16); - else - spi_freq = spibrg / ((pm + 1) * 2); - - /* set tx_timeout to 10 times of one espi FIFO entry go out */ - fsl->tx_timeout = DIV_ROUND_UP((US_PER_SECOND * ESPI_FIFO_WIDTH_BIT - * 10), spi_freq); - - return &fsl->slave; -} - -void spi_free_slave(struct spi_slave *slave) +#ifndef CONFIG_DM_SPI +void spi_cs_activate(struct spi_slave *slave) { struct fsl_spi_slave *fsl = to_fsl_spi_slave(slave); - free(fsl); -} + ccsr_espi_t *espi = fsl->priv.espi; + unsigned int com = 0; + size_t data_len = fsl->priv.data_len;
-int spi_claim_bus(struct spi_slave *slave) + com &= ~(ESPI_COM_CS(0x3) | ESPI_COM_TRANLEN(0xFFFF)); + com |= ESPI_COM_CS(slave->cs); + com |= ESPI_COM_TRANLEN(data_len - 1); + out_be32(&espi->com, com); +} +#else +void fsl_spi_cs_activate(struct fsl_espi_priv *priv, uint cs) { - struct fsl_spi_slave *fsl = to_fsl_spi_slave(slave); - ccsr_espi_t *espi = fsl->espi; - unsigned char pm = fsl->pm; - unsigned int cs = slave->cs; - unsigned int mode = fsl->mode; - unsigned int div16 = fsl->div16; - int i; - - debug("%s: bus:%i cs:%i\n", __func__, slave->bus, cs); - - /* Enable eSPI interface */ - out_be32(&espi->mode, ESPI_MODE_RXTHR(3) - | ESPI_MODE_TXTHR(4) | ESPI_MODE_EN); - - out_be32(&espi->event, 0xffffffff); /* Clear all eSPI events */ - out_be32(&espi->mask, 0x00000000); /* Mask all eSPI interrupts */ - - /* Init CS mode interface */ - for (i = 0; i < ESPI_MAX_CS_NUM; i++) - out_be32(&espi->csmode[i], ESPI_CSMODE_INIT_VAL); - - out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs]) & - ~(ESPI_CSMODE_PM(0xF) | ESPI_CSMODE_DIV16 - | ESPI_CSMODE_CI_INACTIVEHIGH | ESPI_CSMODE_CP_BEGIN_EDGCLK - | ESPI_CSMODE_REV_MSB_FIRST | ESPI_CSMODE_LEN(0xF))); - - /* Set eSPI BRG clock source */ - out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs]) - | ESPI_CSMODE_PM(pm) | div16); - - /* Set eSPI mode */ - if (mode & SPI_CPHA) - out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs]) - | ESPI_CSMODE_CP_BEGIN_EDGCLK); - if (mode & SPI_CPOL) - out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs]) - | ESPI_CSMODE_CI_INACTIVEHIGH); - - /* Character bit order: msb first */ - out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs]) - | ESPI_CSMODE_REV_MSB_FIRST); - - /* Character length in bits, between 0x3~0xf, i.e. 4bits~16bits */ - out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs]) - | ESPI_CSMODE_LEN(7)); + ccsr_espi_t *espi = priv->espi; + unsigned int com = 0; + size_t data_len = priv->data_len;
- return 0; + com &= ~(ESPI_COM_CS(0x3) | ESPI_COM_TRANLEN(0xFFFF)); + com |= ESPI_COM_CS(cs); + com |= ESPI_COM_TRANLEN(data_len - 1); + out_be32(&espi->com, com); } +#endif
-void spi_release_bus(struct spi_slave *slave) +void spi_cs_deactivate(struct spi_slave *slave) { + struct fsl_spi_slave *fsl = to_fsl_spi_slave(slave); + ccsr_espi_t *espi = fsl->priv.espi;
+ /* clear the RXCNT and TXCNT */ + out_be32(&espi->mode, in_be32(&espi->mode) & (~ESPI_MODE_EN)); + out_be32(&espi->mode, in_be32(&espi->mode) | ESPI_MODE_EN); }
-static void fsl_espi_tx(struct fsl_spi_slave *fsl, const void *dout) +static void fsl_espi_tx(struct fsl_espi_priv *priv, const void *dout) { - ccsr_espi_t *espi = fsl->espi; + ccsr_espi_t *espi = priv->espi; unsigned int tmpdout, event; int tmp_tx_timeout;
@@ -189,7 +133,7 @@ static void fsl_espi_tx(struct fsl_spi_slave *fsl, const void *dout) out_be32(&espi->event, ESPI_EV_TNF); debug("***spi_xfer:...%08x written\n", tmpdout);
- tmp_tx_timeout = fsl->tx_timeout; + tmp_tx_timeout = priv->tx_timeout; /* Wait for eSPI transmit to go out */ while (tmp_tx_timeout--) { event = in_be32(&espi->event); @@ -204,9 +148,10 @@ static void fsl_espi_tx(struct fsl_spi_slave *fsl, const void *dout) debug("***spi_xfer:...Tx timeout! event = %08x\n", event); }
-static int fsl_espi_rx(struct fsl_spi_slave *fsl, void *din, unsigned int bytes) +static int fsl_espi_rx(struct fsl_espi_priv *priv, void *din, + unsigned int bytes) { - ccsr_espi_t *espi = fsl->espi; + ccsr_espi_t *espi = priv->espi; unsigned int tmpdin, rx_times; unsigned char *buf, *p_cursor;
@@ -236,11 +181,12 @@ static int fsl_espi_rx(struct fsl_spi_slave *fsl, void *din, unsigned int bytes) return bytes; }
-int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *data_out, - void *data_in, unsigned long flags) +int espi_xfer(struct fsl_espi_priv *priv, uint cs, unsigned int bitlen, + const void *data_out, void *data_in, unsigned long flags) { - struct fsl_spi_slave *fsl = to_fsl_spi_slave(slave); - ccsr_espi_t *espi = fsl->espi; + struct fsl_spi_slave *fsl = to_fsl_spi_priv(priv); + struct spi_slave *slave = &fsl->slave; + ccsr_espi_t *espi = priv->espi; unsigned int event, rx_bytes; const void *dout = NULL; void *din = NULL; @@ -249,16 +195,17 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *data_out, int num_bytes; unsigned char *buffer = NULL; size_t buf_len; - u8 *cmd_buf = fsl->cmd_buf; - size_t cmd_len = fsl->cmd_len; + u8 *cmd_buf = priv->cmd_buf; + size_t cmd_len = priv->cmd_len; size_t data_len = bitlen / 8; size_t rx_offset = 0; int rf_cnt;
- max_tran_len = fsl->max_transfer_length; + max_tran_len = priv->max_transfer_length; switch (flags) { case SPI_XFER_BEGIN: - cmd_len = fsl->cmd_len = data_len; + cmd_len = data_len; + priv->cmd_len = cmd_len; memcpy(cmd_buf, data_out, cmd_len); return 0; case 0: @@ -303,8 +250,13 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *data_out, tran_len = min(data_len, (size_t)max_tran_len); num_blks = DIV_ROUND_UP(tran_len + cmd_len, 4); num_bytes = (tran_len + cmd_len) % 4; - fsl->data_len = tran_len + cmd_len; - spi_cs_activate(slave); + priv->data_len = tran_len + cmd_len; + #ifdef CONFIG_DM_SPI + fsl_spi_cs_activate(priv, cs); + #else + spi_cs_activate(slave); + #endif +
/* Clear all eSPI events */ out_be32(&espi->event , 0xffffffff); @@ -312,7 +264,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *data_out, while (num_blks) { event = in_be32(&espi->event); if (event & ESPI_EV_TNF) { - fsl_espi_tx(fsl, dout); + fsl_espi_tx(priv, dout); /* Set up the next iteration */ if (len > 4) { len -= 4; @@ -330,7 +282,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *data_out, rx_bytes = num_bytes; else continue; - if (fsl_espi_rx(fsl, din, rx_bytes) + if (fsl_espi_rx(priv, din, rx_bytes) == rx_bytes) { num_blks--; if (din) @@ -354,30 +306,260 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *data_out, return 0; }
+void espi_claim_bus(struct fsl_espi_priv *priv, unsigned int cs) +{ + ccsr_espi_t *espi = priv->espi; + unsigned char pm = priv->pm; + unsigned int mode = priv->mode; + unsigned int div16 = priv->div16; + int i; + + /* Enable eSPI interface */ + out_be32(&espi->mode, ESPI_MODE_RXTHR(3) + | ESPI_MODE_TXTHR(4) | ESPI_MODE_EN); + + out_be32(&espi->event, 0xffffffff); /* Clear all eSPI events */ + out_be32(&espi->mask, 0x00000000); /* Mask all eSPI interrupts */ + + /* Init CS mode interface */ + for (i = 0; i < ESPI_MAX_CS_NUM; i++) + out_be32(&espi->csmode[i], ESPI_CSMODE_INIT_VAL); + + out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs]) & + ~(ESPI_CSMODE_PM(0xF) | ESPI_CSMODE_DIV16 + | ESPI_CSMODE_CI_INACTIVEHIGH | ESPI_CSMODE_CP_BEGIN_EDGCLK + | ESPI_CSMODE_REV_MSB_FIRST | ESPI_CSMODE_LEN(0xF))); + + /* Set eSPI BRG clock source */ + out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs]) + | ESPI_CSMODE_PM(pm) | div16); + + /* Set eSPI mode */ + if (mode & SPI_CPHA) + out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs]) + | ESPI_CSMODE_CP_BEGIN_EDGCLK); + if (mode & SPI_CPOL) + out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs]) + | ESPI_CSMODE_CI_INACTIVEHIGH); + + /* Character bit order: msb first */ + out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs]) + | ESPI_CSMODE_REV_MSB_FIRST); + + /* Character length in bits, between 0x3~0xf, i.e. 4bits~16bits */ + out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs]) + | ESPI_CSMODE_LEN(7)); +} + +void espi_setup_slave(struct fsl_espi_priv *priv) +{ + unsigned int max_hz; + sys_info_t sysinfo; + unsigned long spibrg = 0; + unsigned long spi_freq = 0; + unsigned char pm = 0; + + max_hz = priv->speed_hz; + + get_sys_info(&sysinfo); + spibrg = sysinfo.freq_systembus / 2; + priv->div16 = 0; + if ((spibrg / max_hz) > 32) { + priv->div16 = ESPI_CSMODE_DIV16; + pm = spibrg / (max_hz * 16 * 2); + if (pm > 16) { + pm = 16; + debug("max_hz is too low: %d Hz, %ld Hz is used.\n", + max_hz, spibrg / (32 * 16)); + } + } else { + pm = spibrg / (max_hz * 2); + } + if (pm) + pm--; + priv->pm = pm; + + if (priv->div16) + spi_freq = spibrg / ((pm + 1) * 2 * 16); + else + spi_freq = spibrg / ((pm + 1) * 2); + + /* set tx_timeout to 10 times of one espi FIFO entry go out */ + priv->tx_timeout = DIV_ROUND_UP((US_PER_SECOND * ESPI_FIFO_WIDTH_BIT + * 10), spi_freq);/* Set eSPI BRG clock source */ +} + +#ifndef CONFIG_DM_SPI int spi_cs_is_valid(unsigned int bus, unsigned int cs) { return bus == 0 && cs < ESPI_MAX_CS_NUM; }
-void spi_cs_activate(struct spi_slave *slave) +struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, + unsigned int max_hz, unsigned int mode) +{ + struct fsl_spi_slave *fsl; + + if (!spi_cs_is_valid(bus, cs)) + return NULL; + + fsl = spi_alloc_slave(struct fsl_spi_slave, bus, cs); + if (!fsl) + return NULL; + + fsl->priv.espi = (void *)(CONFIG_SYS_MPC85xx_ESPI_ADDR); + fsl->priv.mode = mode; + fsl->priv.max_transfer_length = ESPI_MAX_DATA_TRANSFER_LEN; + fsl->priv.speed_hz = FSL_ESPI_DEFAULT_SCK_FREQ; + + espi_setup_slave(&fsl->priv); + + return &fsl->slave; +} + +void spi_free_slave(struct spi_slave *slave) { struct fsl_spi_slave *fsl = to_fsl_spi_slave(slave); - ccsr_espi_t *espi = fsl->espi; - unsigned int com = 0; - size_t data_len = fsl->data_len;
- com &= ~(ESPI_COM_CS(0x3) | ESPI_COM_TRANLEN(0xFFFF)); - com |= ESPI_COM_CS(slave->cs); - com |= ESPI_COM_TRANLEN(data_len - 1); - out_be32(&espi->com, com); + free(fsl); }
-void spi_cs_deactivate(struct spi_slave *slave) +int spi_claim_bus(struct spi_slave *slave) { struct fsl_spi_slave *fsl = to_fsl_spi_slave(slave); - ccsr_espi_t *espi = fsl->espi;
- /* clear the RXCNT and TXCNT */ - out_be32(&espi->mode, in_be32(&espi->mode) & (~ESPI_MODE_EN)); - out_be32(&espi->mode, in_be32(&espi->mode) | ESPI_MODE_EN); + espi_claim_bus(&fsl->priv, slave->cs); + + return 0; +} + +void spi_release_bus(struct spi_slave *slave) +{ + /* Nothing to do */ +} + +int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, + void *din, unsigned long flags) +{ + struct fsl_spi_slave *espi = (struct fsl_spi_slave *)slave; + + return espi_xfer(&espi->priv, slave->cs, bitlen, dout, din, flags); +} +#else +static int fsl_espi_claim_bus(struct udevice *dev) +{ + struct udevice *bus = dev->parent; + struct dm_spi_slave_platdata *slave_plat = + dev_get_parent_platdata(dev); + + struct fsl_espi_priv *priv = dev_get_priv(bus); + + espi_claim_bus(priv, slave_plat->cs); + + return 0; +} + +static int fsl_espi_release_bus(struct udevice *dev) +{ + /* Nothing to do */ + return 0; +} + +static int fsl_espi_xfer(struct udevice *dev, unsigned int bitlen, + const void *dout, void *din, unsigned long flags) +{ + struct fsl_espi_priv *priv; + struct dm_spi_slave_platdata *slave_plat = dev_get_parent_platdata(dev); + struct udevice *bus; + + bus = dev->parent; + priv = dev_get_priv(bus); + return espi_xfer(priv, slave_plat->cs, bitlen, dout, din, flags); +} + +static int fsl_espi_set_speed(struct udevice *bus, uint speed) +{ + /* Nothing to do */ + return 0; } + +static int fsl_espi_set_mode(struct udevice *bus, uint mode) +{ + /* Nothing to do */ + return 0; +} + +static int fsl_espi_ofdata_to_platdata(struct udevice *bus) +{ + fdt_addr_t addr; + struct fsl_espi_platdata *plat = bus->platdata; + const void *blob = gd->fdt_blob; + int node = dev_of_offset(bus); + + addr = dev_read_addr(bus); + if (addr == FDT_ADDR_T_NONE) + return -EINVAL; + + plat->regs_addr = lower_32_bits(addr); + plat->speed_hz = fdtdec_get_int(blob, node, "spi-max-frequency", + FSL_ESPI_DEFAULT_SCK_FREQ); + + debug("ESPI: regs=%p, max-frequency=%d\n", + &plat->regs_addr, plat->speed_hz); + + return 0; +} + +static int fsl_espi_probe(struct udevice *bus) +{ + struct fsl_espi_platdata *plat = dev_get_platdata(bus); + struct fsl_espi_priv *priv = dev_get_priv(bus); + + priv->espi = (ccsr_espi_t *)((u32)plat->regs_addr); + priv->max_transfer_length = ESPI_MAX_DATA_TRANSFER_LEN; + priv->speed_hz = plat->speed_hz; + + espi_setup_slave(priv); + + debug("%s probe done, bus-num %d.\n", bus->name, bus->seq); + return 0; +} + +static int fsl_espi_child_pre_probe(struct udevice *dev) +{ + /* Nothing to do */ + return 0; +} + +static int fsl_espi_bind(struct udevice *bus) +{ + debug("%s assigned req_seq %d.\n", bus->name, bus->req_seq); + return 0; +} + +static const struct dm_spi_ops fsl_espi_ops = { + .claim_bus = fsl_espi_claim_bus, + .release_bus = fsl_espi_release_bus, + .xfer = fsl_espi_xfer, + .set_speed = fsl_espi_set_speed, + .set_mode = fsl_espi_set_mode, +}; + +static const struct udevice_id fsl_espi_ids[] = { + { .compatible = "fsl,mpc8536-espi" }, + { } +}; + +U_BOOT_DRIVER(fsl_espi) = { + .name = "fsl_espi", + .id = UCLASS_SPI, + .of_match = fsl_espi_ids, + .ops = &fsl_espi_ops, + .ofdata_to_platdata = fsl_espi_ofdata_to_platdata, + .platdata_auto_alloc_size = sizeof(struct fsl_espi_platdata), + .priv_auto_alloc_size = sizeof(struct fsl_espi_priv), + .probe = fsl_espi_probe, + .child_pre_probe = fsl_espi_child_pre_probe, + .bind = fsl_espi_bind, +}; +#endif

On Tue, Apr 23, 2019 at 4:17 PM Chuanhua Han chuanhua.han@nxp.com wrote:
Modify the Freescale ESPI driver to support the driver model. Also resolved the following problems:
===================== WARNING ====================== This board does not use CONFIG_DM_SPI. Please update the board before v2019.04 for no dm conversion and v2019.07 for partially dm converted drivers. Failure to update can lead to driver/board removal See doc/driver-model/MIGRATION.txt for more info. ==================================================== ===================== WARNING ====================== This board does not use CONFIG_DM_SPI_FLASH. Please update the board to use CONFIG_SPI_FLASH before the v2019.07 release. Failure to update by the deadline may result in board removal. See doc/driver-model/MIGRATION.txt for more info. ====================================================
Signed-off-by: Chuanhua Han chuanhua.han@nxp.com
depends on: - https://patchwork.ozlabs.org/project/uboot/list/?series=99439
drivers/spi/fsl_espi.c | 450 +++++++++++++++++++++++++++++------------ 1 file changed, 316 insertions(+), 134 deletions(-)
diff --git a/drivers/spi/fsl_espi.c b/drivers/spi/fsl_espi.c index 7444ae1a06..6ebe57c30b 100644 --- a/drivers/spi/fsl_espi.c +++ b/drivers/spi/fsl_espi.c @@ -4,17 +4,27 @@
- Copyright 2010-2011 Freescale Semiconductor, Inc.
- Author: Mingkai Hu (Mingkai.hu@freescale.com)
*/
Chuanhua Han (chuanhua.han@nxp.com)
#include <common.h>
#include <malloc.h> #include <spi.h> #include <asm/immap_85xx.h> +#include <dm.h> +#include <errno.h> +#include <fdtdec.h>
+struct fsl_espi_platdata {
uint flags;
uint speed_hz;
uint num_chipselect;
fdt_addr_t regs_addr;
+};
-struct fsl_spi_slave {
struct spi_slave slave;
+struct fsl_espi_priv { ccsr_espi_t *espi;
u32 speed_hz; unsigned int div16; unsigned int pm; int tx_timeout;
@@ -25,9 +35,18 @@ struct fsl_spi_slave { unsigned int max_transfer_length; };
+struct fsl_spi_slave {
struct spi_slave slave;
struct fsl_espi_priv priv;
+};
#define to_fsl_spi_slave(s) container_of(s, struct fsl_spi_slave, slave) +#define to_fsl_spi_priv(p) container_of(p, struct fsl_spi_slave, priv) #define US_PER_SECOND 1000000UL
+/* default SCK frequency, unit: HZ */ +#define FSL_ESPI_DEFAULT_SCK_FREQ 10000000
#define ESPI_MAX_CS_NUM 4 #define ESPI_FIFO_WIDTH_BIT 32
@@ -62,121 +81,46 @@ struct fsl_spi_slave {
#define ESPI_MAX_DATA_TRANSFER_LEN 0xFFF0
-struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
unsigned int max_hz, unsigned int mode)
-{
struct fsl_spi_slave *fsl;
sys_info_t sysinfo;
unsigned long spibrg = 0;
unsigned long spi_freq = 0;
unsigned char pm = 0;
if (!spi_cs_is_valid(bus, cs))
return NULL;
fsl = spi_alloc_slave(struct fsl_spi_slave, bus, cs);
if (!fsl)
return NULL;
fsl->espi = (void *)(CONFIG_SYS_MPC85xx_ESPI_ADDR);
fsl->mode = mode;
fsl->max_transfer_length = ESPI_MAX_DATA_TRANSFER_LEN;
/* Set eSPI BRG clock source */
get_sys_info(&sysinfo);
spibrg = sysinfo.freq_systembus / 2;
fsl->div16 = 0;
if ((spibrg / max_hz) > 32) {
fsl->div16 = ESPI_CSMODE_DIV16;
pm = spibrg / (max_hz * 16 * 2);
if (pm > 16) {
pm = 16;
debug("Requested speed is too low: %d Hz, %ld Hz "
"is used.\n", max_hz, spibrg / (32 * 16));
}
} else
pm = spibrg / (max_hz * 2);
if (pm)
pm--;
fsl->pm = pm;
if (fsl->div16)
spi_freq = spibrg / ((pm + 1) * 2 * 16);
else
spi_freq = spibrg / ((pm + 1) * 2);
/* set tx_timeout to 10 times of one espi FIFO entry go out */
fsl->tx_timeout = DIV_ROUND_UP((US_PER_SECOND * ESPI_FIFO_WIDTH_BIT
* 10), spi_freq);
return &fsl->slave;
-}
-void spi_free_slave(struct spi_slave *slave) +#ifndef CONFIG_DM_SPI
Would you try for full dm-conversion? it would be hard to move all respective defconfigs to use but better try since we have next version deadline for full dm-conversion. thanks!

Hi,jagan Thank you for your replay!
-----Original Message----- From: Jagan Teki jagan@amarulasolutions.com Sent: 2019年4月24日 14:57 To: Chuanhua Han chuanhua.han@nxp.com Cc: Jagan Teki jagan@openedev.com; Wolfgang Denk wd@denx.de; Shengzhou Liu shengzhou.liu@nxp.com; Ruchika Gupta ruchika.gupta@nxp.com; U-Boot-Denx u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; Yinbo Zhu yinbo.zhu@nxp.com Subject: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert Freescale ESPI driver to driver model
WARNING: This email was created outside of NXP. DO NOT CLICK links or attachments unless you recognize the sender and know the content is safe.
On Tue, Apr 23, 2019 at 4:17 PM Chuanhua Han chuanhua.han@nxp.com wrote:
Modify the Freescale ESPI driver to support the driver model. Also resolved the following problems:
===================== WARNING ====================== This board
does
not use CONFIG_DM_SPI. Please update the board before v2019.04 for no dm conversion and v2019.07 for partially dm converted drivers. Failure to update can lead to driver/board removal See doc/driver-model/MIGRATION.txt for more info. ==================================================== ===================== WARNING ====================== This board
does
not use CONFIG_DM_SPI_FLASH. Please update the board to use CONFIG_SPI_FLASH before the v2019.07 release. Failure to update by the deadline may result in board removal. See doc/driver-model/MIGRATION.txt for more info. ====================================================
Signed-off-by: Chuanhua Han chuanhua.han@nxp.com
depends on: - https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatc
hwork.ozlabs.org%2Fproject%2Fuboot%2Flist%2F%3Fseries%3D99439&d ata
=02%7C01%7Cchuanhua.han%40nxp.com%7Cfa6bdd7859c4411b5d8608d6c8 8223e3%7
C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C63691685860819371 5&sda
ta=437CqPexTmJAzhl7wZ3lAUQVbmy%2B2NvHlurTcGTJKT0%3D&reserve d=0
drivers/spi/fsl_espi.c | 450 +++++++++++++++++++++++++++++------------ 1 file changed, 316 insertions(+), 134 deletions(-)
diff --git a/drivers/spi/fsl_espi.c b/drivers/spi/fsl_espi.c index 7444ae1a06..6ebe57c30b 100644 --- a/drivers/spi/fsl_espi.c +++ b/drivers/spi/fsl_espi.c @@ -4,17 +4,27 @@
- Copyright 2010-2011 Freescale Semiconductor, Inc.
- Author: Mingkai Hu (Mingkai.hu@freescale.com)
*/
Chuanhua Han (chuanhua.han@nxp.com)
#include <common.h>
#include <malloc.h> #include <spi.h> #include <asm/immap_85xx.h> +#include <dm.h> +#include <errno.h> +#include <fdtdec.h>
+struct fsl_espi_platdata {
uint flags;
uint speed_hz;
uint num_chipselect;
fdt_addr_t regs_addr;
+};
-struct fsl_spi_slave {
struct spi_slave slave;
+struct fsl_espi_priv { ccsr_espi_t *espi;
u32 speed_hz; unsigned int div16; unsigned int pm; int tx_timeout;
@@ -25,9 +35,18 @@ struct fsl_spi_slave { unsigned int max_transfer_length; };
+struct fsl_spi_slave {
struct spi_slave slave;
struct fsl_espi_priv priv;
+};
#define to_fsl_spi_slave(s) container_of(s, struct fsl_spi_slave, slave) +#define to_fsl_spi_priv(p) container_of(p, struct fsl_spi_slave, +priv) #define US_PER_SECOND 1000000UL
+/* default SCK frequency, unit: HZ */ +#define FSL_ESPI_DEFAULT_SCK_FREQ 10000000
#define ESPI_MAX_CS_NUM 4 #define ESPI_FIFO_WIDTH_BIT 32
@@ -62,121 +81,46 @@ struct fsl_spi_slave {
#define ESPI_MAX_DATA_TRANSFER_LEN 0xFFF0
-struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
unsigned int max_hz, unsigned int mode)
-{
struct fsl_spi_slave *fsl;
sys_info_t sysinfo;
unsigned long spibrg = 0;
unsigned long spi_freq = 0;
unsigned char pm = 0;
if (!spi_cs_is_valid(bus, cs))
return NULL;
fsl = spi_alloc_slave(struct fsl_spi_slave, bus, cs);
if (!fsl)
return NULL;
fsl->espi = (void *)(CONFIG_SYS_MPC85xx_ESPI_ADDR);
fsl->mode = mode;
fsl->max_transfer_length = ESPI_MAX_DATA_TRANSFER_LEN;
/* Set eSPI BRG clock source */
get_sys_info(&sysinfo);
spibrg = sysinfo.freq_systembus / 2;
fsl->div16 = 0;
if ((spibrg / max_hz) > 32) {
fsl->div16 = ESPI_CSMODE_DIV16;
pm = spibrg / (max_hz * 16 * 2);
if (pm > 16) {
pm = 16;
debug("Requested speed is too low: %d Hz, %ld
Hz "
"is used.\n", max_hz, spibrg / (32 * 16));
}
} else
pm = spibrg / (max_hz * 2);
if (pm)
pm--;
fsl->pm = pm;
if (fsl->div16)
spi_freq = spibrg / ((pm + 1) * 2 * 16);
else
spi_freq = spibrg / ((pm + 1) * 2);
/* set tx_timeout to 10 times of one espi FIFO entry go out */
fsl->tx_timeout = DIV_ROUND_UP((US_PER_SECOND *
ESPI_FIFO_WIDTH_BIT
* 10), spi_freq);
return &fsl->slave;
-}
-void spi_free_slave(struct spi_slave *slave) +#ifndef CONFIG_DM_SPI
Would you try for full dm-conversion? it would be hard to move all respective defconfigs to use but better try since we have next version deadline for full dm-conversion. thanks!
Currently my espi driver is modified to be compatible with dm configuration and non-dm configuration. If uboot don't need non-dm code in the future, I will remove this compatibility and only keep the dm driver code. Thank you.

On Thu, Apr 25, 2019 at 8:27 AM Chuanhua Han chuanhua.han@nxp.com wrote:
Hi,jagan Thank you for your replay!
-----Original Message----- From: Jagan Teki jagan@amarulasolutions.com Sent: 2019年4月24日 14:57 To: Chuanhua Han chuanhua.han@nxp.com Cc: Jagan Teki jagan@openedev.com; Wolfgang Denk wd@denx.de; Shengzhou Liu shengzhou.liu@nxp.com; Ruchika Gupta ruchika.gupta@nxp.com; U-Boot-Denx u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; Yinbo Zhu yinbo.zhu@nxp.com Subject: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert Freescale ESPI driver to driver model
WARNING: This email was created outside of NXP. DO NOT CLICK links or attachments unless you recognize the sender and know the content is safe.
On Tue, Apr 23, 2019 at 4:17 PM Chuanhua Han chuanhua.han@nxp.com wrote:
Modify the Freescale ESPI driver to support the driver model. Also resolved the following problems:
===================== WARNING ====================== This board
does
not use CONFIG_DM_SPI. Please update the board before v2019.04 for no dm conversion and v2019.07 for partially dm converted drivers. Failure to update can lead to driver/board removal See doc/driver-model/MIGRATION.txt for more info. ==================================================== ===================== WARNING ====================== This board
does
not use CONFIG_DM_SPI_FLASH. Please update the board to use CONFIG_SPI_FLASH before the v2019.07 release. Failure to update by the deadline may result in board removal. See doc/driver-model/MIGRATION.txt for more info. ====================================================
Signed-off-by: Chuanhua Han chuanhua.han@nxp.com
depends on: - https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatc
hwork.ozlabs.org%2Fproject%2Fuboot%2Flist%2F%3Fseries%3D99439&d ata
=02%7C01%7Cchuanhua.han%40nxp.com%7Cfa6bdd7859c4411b5d8608d6c8 8223e3%7
C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C63691685860819371 5&sda
ta=437CqPexTmJAzhl7wZ3lAUQVbmy%2B2NvHlurTcGTJKT0%3D&reserve d=0
drivers/spi/fsl_espi.c | 450 +++++++++++++++++++++++++++++------------ 1 file changed, 316 insertions(+), 134 deletions(-)
diff --git a/drivers/spi/fsl_espi.c b/drivers/spi/fsl_espi.c index 7444ae1a06..6ebe57c30b 100644 --- a/drivers/spi/fsl_espi.c +++ b/drivers/spi/fsl_espi.c @@ -4,17 +4,27 @@
- Copyright 2010-2011 Freescale Semiconductor, Inc.
- Author: Mingkai Hu (Mingkai.hu@freescale.com)
*/
Chuanhua Han (chuanhua.han@nxp.com)
#include <common.h>
#include <malloc.h> #include <spi.h> #include <asm/immap_85xx.h> +#include <dm.h> +#include <errno.h> +#include <fdtdec.h>
+struct fsl_espi_platdata {
uint flags;
uint speed_hz;
uint num_chipselect;
fdt_addr_t regs_addr;
+};
-struct fsl_spi_slave {
struct spi_slave slave;
+struct fsl_espi_priv { ccsr_espi_t *espi;
u32 speed_hz; unsigned int div16; unsigned int pm; int tx_timeout;
@@ -25,9 +35,18 @@ struct fsl_spi_slave { unsigned int max_transfer_length; };
+struct fsl_spi_slave {
struct spi_slave slave;
struct fsl_espi_priv priv;
+};
#define to_fsl_spi_slave(s) container_of(s, struct fsl_spi_slave, slave) +#define to_fsl_spi_priv(p) container_of(p, struct fsl_spi_slave, +priv) #define US_PER_SECOND 1000000UL
+/* default SCK frequency, unit: HZ */ +#define FSL_ESPI_DEFAULT_SCK_FREQ 10000000
#define ESPI_MAX_CS_NUM 4 #define ESPI_FIFO_WIDTH_BIT 32
@@ -62,121 +81,46 @@ struct fsl_spi_slave {
#define ESPI_MAX_DATA_TRANSFER_LEN 0xFFF0
-struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
unsigned int max_hz, unsigned int mode)
-{
struct fsl_spi_slave *fsl;
sys_info_t sysinfo;
unsigned long spibrg = 0;
unsigned long spi_freq = 0;
unsigned char pm = 0;
if (!spi_cs_is_valid(bus, cs))
return NULL;
fsl = spi_alloc_slave(struct fsl_spi_slave, bus, cs);
if (!fsl)
return NULL;
fsl->espi = (void *)(CONFIG_SYS_MPC85xx_ESPI_ADDR);
fsl->mode = mode;
fsl->max_transfer_length = ESPI_MAX_DATA_TRANSFER_LEN;
/* Set eSPI BRG clock source */
get_sys_info(&sysinfo);
spibrg = sysinfo.freq_systembus / 2;
fsl->div16 = 0;
if ((spibrg / max_hz) > 32) {
fsl->div16 = ESPI_CSMODE_DIV16;
pm = spibrg / (max_hz * 16 * 2);
if (pm > 16) {
pm = 16;
debug("Requested speed is too low: %d Hz, %ld
Hz "
"is used.\n", max_hz, spibrg / (32 * 16));
}
} else
pm = spibrg / (max_hz * 2);
if (pm)
pm--;
fsl->pm = pm;
if (fsl->div16)
spi_freq = spibrg / ((pm + 1) * 2 * 16);
else
spi_freq = spibrg / ((pm + 1) * 2);
/* set tx_timeout to 10 times of one espi FIFO entry go out */
fsl->tx_timeout = DIV_ROUND_UP((US_PER_SECOND *
ESPI_FIFO_WIDTH_BIT
* 10), spi_freq);
return &fsl->slave;
-}
-void spi_free_slave(struct spi_slave *slave) +#ifndef CONFIG_DM_SPI
Would you try for full dm-conversion? it would be hard to move all respective defconfigs to use but better try since we have next version deadline for full dm-conversion. thanks!
Currently my espi driver is modified to be compatible with dm configuration and non-dm configuration. If uboot don't need non-dm code in the future, I will remove this compatibility and only keep the dm driver code. Thank you.
Idea is to make fully dm supported and ie what we have migration deadline, doc/driver-model/MIGRATION.txt

-----Original Message----- From: Jagan Teki jagan@amarulasolutions.com Sent: 2019年4月26日 2:07 To: Chuanhua Han chuanhua.han@nxp.com Cc: Jagan Teki jagan@openedev.com; Wolfgang Denk wd@denx.de; Shengzhou Liu shengzhou.liu@nxp.com; Ruchika Gupta ruchika.gupta@nxp.com; U-Boot-Denx u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; Yinbo Zhu yinbo.zhu@nxp.com Subject: Re: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert Freescale ESPI driver to driver model
Caution: EXT Email
On Thu, Apr 25, 2019 at 8:27 AM Chuanhua Han chuanhua.han@nxp.com wrote:
Hi,jagan Thank you for your replay!
-----Original Message----- From: Jagan Teki jagan@amarulasolutions.com Sent: 2019年4月24日 14:57 To: Chuanhua Han chuanhua.han@nxp.com Cc: Jagan Teki jagan@openedev.com; Wolfgang Denk wd@denx.de; Shengzhou Liu shengzhou.liu@nxp.com; Ruchika Gupta ruchika.gupta@nxp.com; U-Boot-Denx u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; Yinbo Zhu yinbo.zhu@nxp.com Subject: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert Freescale ESPI driver to driver model
WARNING: This email was created outside of NXP. DO NOT CLICK links or attachments unless you recognize the sender and know the content is
safe.
On Tue, Apr 23, 2019 at 4:17 PM Chuanhua Han
wrote:
Modify the Freescale ESPI driver to support the driver model. Also resolved the following problems:
===================== WARNING ====================== This board
does
not use CONFIG_DM_SPI. Please update the board before v2019.04 for no dm conversion and v2019.07 for partially dm converted drivers. Failure to update can lead to driver/board removal See doc/driver-model/MIGRATION.txt for more info. ==================================================== ===================== WARNING ====================== This board
does
not use CONFIG_DM_SPI_FLASH. Please update the board to use CONFIG_SPI_FLASH before the v2019.07 release. Failure to update by the deadline may result in board removal. See doc/driver-model/MIGRATION.txt for more info. ====================================================
Signed-off-by: Chuanhua Han chuanhua.han@nxp.com
depends on: - https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2F patc
hwork.ozlabs.org%2Fproject%2Fuboot%2Flist%2F%3Fseries%3D99439&d
ata
=02%7C01%7Cchuanhua.han%40nxp.com%7Cfa6bdd7859c4411b5d8608d6c8
8223e3%7
C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C63691685860819371
5&sda
ta=437CqPexTmJAzhl7wZ3lAUQVbmy%2B2NvHlurTcGTJKT0%3D&reserve
d=0
drivers/spi/fsl_espi.c | 450 +++++++++++++++++++++++++++++------------ 1 file changed, 316 insertions(+), 134 deletions(-)
diff --git a/drivers/spi/fsl_espi.c b/drivers/spi/fsl_espi.c index 7444ae1a06..6ebe57c30b 100644 --- a/drivers/spi/fsl_espi.c +++ b/drivers/spi/fsl_espi.c @@ -4,17 +4,27 @@
- Copyright 2010-2011 Freescale Semiconductor, Inc.
- Author: Mingkai Hu (Mingkai.hu@freescale.com)
*/
Chuanhua Han (chuanhua.han@nxp.com)
#include <common.h>
#include <malloc.h> #include <spi.h> #include <asm/immap_85xx.h> +#include <dm.h> +#include <errno.h> +#include <fdtdec.h>
+struct fsl_espi_platdata {
uint flags;
uint speed_hz;
uint num_chipselect;
fdt_addr_t regs_addr;
+};
-struct fsl_spi_slave {
struct spi_slave slave;
+struct fsl_espi_priv { ccsr_espi_t *espi;
u32 speed_hz; unsigned int div16; unsigned int pm; int tx_timeout;
@@ -25,9 +35,18 @@ struct fsl_spi_slave { unsigned int max_transfer_length; };
+struct fsl_spi_slave {
struct spi_slave slave;
struct fsl_espi_priv priv; };
#define to_fsl_spi_slave(s) container_of(s, struct fsl_spi_slave, slave) +#define to_fsl_spi_priv(p) container_of(p, struct fsl_spi_slave, +priv) #define US_PER_SECOND 1000000UL
+/* default SCK frequency, unit: HZ */ +#define FSL_ESPI_DEFAULT_SCK_FREQ 10000000
#define ESPI_MAX_CS_NUM 4 #define ESPI_FIFO_WIDTH_BIT 32
@@ -62,121 +81,46 @@ struct fsl_spi_slave {
#define ESPI_MAX_DATA_TRANSFER_LEN 0xFFF0
-struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
unsigned int max_hz, unsigned int mode)
-{
struct fsl_spi_slave *fsl;
sys_info_t sysinfo;
unsigned long spibrg = 0;
unsigned long spi_freq = 0;
unsigned char pm = 0;
if (!spi_cs_is_valid(bus, cs))
return NULL;
fsl = spi_alloc_slave(struct fsl_spi_slave, bus, cs);
if (!fsl)
return NULL;
fsl->espi = (void *)(CONFIG_SYS_MPC85xx_ESPI_ADDR);
fsl->mode = mode;
fsl->max_transfer_length = ESPI_MAX_DATA_TRANSFER_LEN;
/* Set eSPI BRG clock source */
get_sys_info(&sysinfo);
spibrg = sysinfo.freq_systembus / 2;
fsl->div16 = 0;
if ((spibrg / max_hz) > 32) {
fsl->div16 = ESPI_CSMODE_DIV16;
pm = spibrg / (max_hz * 16 * 2);
if (pm > 16) {
pm = 16;
debug("Requested speed is too low: %d
Hz, %ld
Hz "
"is used.\n", max_hz, spibrg / (32 *
16));
}
} else
pm = spibrg / (max_hz * 2);
if (pm)
pm--;
fsl->pm = pm;
if (fsl->div16)
spi_freq = spibrg / ((pm + 1) * 2 * 16);
else
spi_freq = spibrg / ((pm + 1) * 2);
/* set tx_timeout to 10 times of one espi FIFO entry go out */
fsl->tx_timeout = DIV_ROUND_UP((US_PER_SECOND *
ESPI_FIFO_WIDTH_BIT
* 10), spi_freq);
return &fsl->slave;
-}
-void spi_free_slave(struct spi_slave *slave) +#ifndef CONFIG_DM_SPI
Would you try for full dm-conversion? it would be hard to move all respective defconfigs to use but better try since we have next version deadline for full dm-conversion. thanks!
Currently my espi driver is modified to be compatible with dm configuration and non-dm configuration. If uboot don't need non-dm code in the future, I will remove this compatibility and only keep the dm driver code. Thank you.
Idea is to make fully dm supported and ie what we have migration deadline, doc/driver-model/MIGRATION.txt
Do you mean that I need to delete the original non-dm code? Or there are some values in the dm code that do not come from dts! Can you tell me something about it? Thank you!

On Mon, May 6, 2019 at 12:29 PM Chuanhua Han chuanhua.han@nxp.com wrote:
-----Original Message----- From: Jagan Teki jagan@amarulasolutions.com Sent: 2019年4月26日 2:07 To: Chuanhua Han chuanhua.han@nxp.com Cc: Jagan Teki jagan@openedev.com; Wolfgang Denk wd@denx.de; Shengzhou Liu shengzhou.liu@nxp.com; Ruchika Gupta ruchika.gupta@nxp.com; U-Boot-Denx u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; Yinbo Zhu yinbo.zhu@nxp.com Subject: Re: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert Freescale ESPI driver to driver model
Caution: EXT Email
On Thu, Apr 25, 2019 at 8:27 AM Chuanhua Han chuanhua.han@nxp.com wrote:
Hi,jagan Thank you for your replay!
-----Original Message----- From: Jagan Teki jagan@amarulasolutions.com Sent: 2019年4月24日 14:57 To: Chuanhua Han chuanhua.han@nxp.com Cc: Jagan Teki jagan@openedev.com; Wolfgang Denk wd@denx.de; Shengzhou Liu shengzhou.liu@nxp.com; Ruchika Gupta ruchika.gupta@nxp.com; U-Boot-Denx u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; Yinbo Zhu yinbo.zhu@nxp.com Subject: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert Freescale ESPI driver to driver model
WARNING: This email was created outside of NXP. DO NOT CLICK links or attachments unless you recognize the sender and know the content is
safe.
On Tue, Apr 23, 2019 at 4:17 PM Chuanhua Han
wrote:
Modify the Freescale ESPI driver to support the driver model. Also resolved the following problems:
===================== WARNING ====================== This board
does
not use CONFIG_DM_SPI. Please update the board before v2019.04 for no dm conversion and v2019.07 for partially dm converted drivers. Failure to update can lead to driver/board removal See doc/driver-model/MIGRATION.txt for more info. ==================================================== ===================== WARNING ====================== This board
does
not use CONFIG_DM_SPI_FLASH. Please update the board to use CONFIG_SPI_FLASH before the v2019.07 release. Failure to update by the deadline may result in board removal. See doc/driver-model/MIGRATION.txt for more info. ====================================================
Signed-off-by: Chuanhua Han chuanhua.han@nxp.com
depends on: - https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2F patc
hwork.ozlabs.org%2Fproject%2Fuboot%2Flist%2F%3Fseries%3D99439&d
ata
=02%7C01%7Cchuanhua.han%40nxp.com%7Cfa6bdd7859c4411b5d8608d6c8
8223e3%7
C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C63691685860819371
5&sda
ta=437CqPexTmJAzhl7wZ3lAUQVbmy%2B2NvHlurTcGTJKT0%3D&reserve
d=0
drivers/spi/fsl_espi.c | 450 +++++++++++++++++++++++++++++------------ 1 file changed, 316 insertions(+), 134 deletions(-)
diff --git a/drivers/spi/fsl_espi.c b/drivers/spi/fsl_espi.c index 7444ae1a06..6ebe57c30b 100644 --- a/drivers/spi/fsl_espi.c +++ b/drivers/spi/fsl_espi.c @@ -4,17 +4,27 @@
- Copyright 2010-2011 Freescale Semiconductor, Inc.
- Author: Mingkai Hu (Mingkai.hu@freescale.com)
*/
Chuanhua Han (chuanhua.han@nxp.com)
#include <common.h>
#include <malloc.h> #include <spi.h> #include <asm/immap_85xx.h> +#include <dm.h> +#include <errno.h> +#include <fdtdec.h>
+struct fsl_espi_platdata {
uint flags;
uint speed_hz;
uint num_chipselect;
fdt_addr_t regs_addr;
+};
-struct fsl_spi_slave {
struct spi_slave slave;
+struct fsl_espi_priv { ccsr_espi_t *espi;
u32 speed_hz; unsigned int div16; unsigned int pm; int tx_timeout;
@@ -25,9 +35,18 @@ struct fsl_spi_slave { unsigned int max_transfer_length; };
+struct fsl_spi_slave {
struct spi_slave slave;
struct fsl_espi_priv priv; };
#define to_fsl_spi_slave(s) container_of(s, struct fsl_spi_slave, slave) +#define to_fsl_spi_priv(p) container_of(p, struct fsl_spi_slave, +priv) #define US_PER_SECOND 1000000UL
+/* default SCK frequency, unit: HZ */ +#define FSL_ESPI_DEFAULT_SCK_FREQ 10000000
#define ESPI_MAX_CS_NUM 4 #define ESPI_FIFO_WIDTH_BIT 32
@@ -62,121 +81,46 @@ struct fsl_spi_slave {
#define ESPI_MAX_DATA_TRANSFER_LEN 0xFFF0
-struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
unsigned int max_hz, unsigned int mode)
-{
struct fsl_spi_slave *fsl;
sys_info_t sysinfo;
unsigned long spibrg = 0;
unsigned long spi_freq = 0;
unsigned char pm = 0;
if (!spi_cs_is_valid(bus, cs))
return NULL;
fsl = spi_alloc_slave(struct fsl_spi_slave, bus, cs);
if (!fsl)
return NULL;
fsl->espi = (void *)(CONFIG_SYS_MPC85xx_ESPI_ADDR);
fsl->mode = mode;
fsl->max_transfer_length = ESPI_MAX_DATA_TRANSFER_LEN;
/* Set eSPI BRG clock source */
get_sys_info(&sysinfo);
spibrg = sysinfo.freq_systembus / 2;
fsl->div16 = 0;
if ((spibrg / max_hz) > 32) {
fsl->div16 = ESPI_CSMODE_DIV16;
pm = spibrg / (max_hz * 16 * 2);
if (pm > 16) {
pm = 16;
debug("Requested speed is too low: %d
Hz, %ld
Hz "
"is used.\n", max_hz, spibrg / (32 *
16));
}
} else
pm = spibrg / (max_hz * 2);
if (pm)
pm--;
fsl->pm = pm;
if (fsl->div16)
spi_freq = spibrg / ((pm + 1) * 2 * 16);
else
spi_freq = spibrg / ((pm + 1) * 2);
/* set tx_timeout to 10 times of one espi FIFO entry go out */
fsl->tx_timeout = DIV_ROUND_UP((US_PER_SECOND *
ESPI_FIFO_WIDTH_BIT
* 10), spi_freq);
return &fsl->slave;
-}
-void spi_free_slave(struct spi_slave *slave) +#ifndef CONFIG_DM_SPI
Would you try for full dm-conversion? it would be hard to move all respective defconfigs to use but better try since we have next version deadline for full dm-conversion. thanks!
Currently my espi driver is modified to be compatible with dm configuration and non-dm configuration. If uboot don't need non-dm code in the future, I will remove this compatibility and only keep the dm driver code. Thank you.
Idea is to make fully dm supported and ie what we have migration deadline, doc/driver-model/MIGRATION.txt
Do you mean that I need to delete the original non-dm code? Or there are some values in the dm code that do not come from dts! Can you tell me something about it? Thank you!
If not dt, can be done via platdata, we have few drivers with similar support drivers/spi/pl022_spi.c
Check the same and let me know for any help.

-----Original Message----- From: Jagan Teki jagan@amarulasolutions.com Sent: 2019年5月6日 15:03 To: Chuanhua Han chuanhua.han@nxp.com Cc: Jagan Teki jagan@openedev.com; Wolfgang Denk wd@denx.de; Shengzhou Liu shengzhou.liu@nxp.com; Ruchika Gupta ruchika.gupta@nxp.com; U-Boot-Denx u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; Yinbo Zhu yinbo.zhu@nxp.com Subject: Re: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert Freescale ESPI driver to driver model
Caution: EXT Email
On Mon, May 6, 2019 at 12:29 PM Chuanhua Han chuanhua.han@nxp.com wrote:
-----Original Message----- From: Jagan Teki jagan@amarulasolutions.com Sent: 2019年4月26日 2:07 To: Chuanhua Han chuanhua.han@nxp.com Cc: Jagan Teki jagan@openedev.com; Wolfgang Denk wd@denx.de; Shengzhou Liu shengzhou.liu@nxp.com; Ruchika Gupta ruchika.gupta@nxp.com; U-Boot-Denx u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; Yinbo Zhu yinbo.zhu@nxp.com Subject: Re: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert Freescale ESPI driver to driver model
Caution: EXT Email
On Thu, Apr 25, 2019 at 8:27 AM Chuanhua Han
wrote:
Hi,jagan Thank you for your replay!
-----Original Message----- From: Jagan Teki jagan@amarulasolutions.com Sent: 2019年4月24日 14:57 To: Chuanhua Han chuanhua.han@nxp.com Cc: Jagan Teki jagan@openedev.com; Wolfgang Denk wd@denx.de; Shengzhou Liu shengzhou.liu@nxp.com; Ruchika Gupta ruchika.gupta@nxp.com; U-Boot-Denx u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; Yinbo Zhu yinbo.zhu@nxp.com Subject: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert Freescale ESPI driver to driver model
WARNING: This email was created outside of NXP. DO NOT CLICK links or attachments unless you recognize the sender and know the content is
safe.
On Tue, Apr 23, 2019 at 4:17 PM Chuanhua Han
wrote:
Modify the Freescale ESPI driver to support the driver model. Also resolved the following problems:
===================== WARNING ====================== This board
does
not use CONFIG_DM_SPI. Please update the board before v2019.04 for no dm conversion and v2019.07 for partially dm converted drivers. Failure to update can lead to driver/board removal See doc/driver-model/MIGRATION.txt for more info. ==================================================== ===================== WARNING ====================== This board
does
not use CONFIG_DM_SPI_FLASH. Please update the board to use CONFIG_SPI_FLASH before the v2019.07 release. Failure to update by the deadline may result in board removal. See doc/driver-model/MIGRATION.txt for more info. ====================================================
Signed-off-by: Chuanhua Han chuanhua.han@nxp.com
depends on: - https://eur01.safelinks.protection.outlook.com/?url=https%3A%2 F%2F patc
hwork.ozlabs.org%2Fproject%2Fuboot%2Flist%2F%3Fseries%3D99439&d
ata
=02%7C01%7Cchuanhua.han%40nxp.com%7Cfa6bdd7859c4411b5d8608d6c8
8223e3%7
C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C63691685860819371
5&sda
ta=437CqPexTmJAzhl7wZ3lAUQVbmy%2B2NvHlurTcGTJKT0%3D&reserve
d=0
drivers/spi/fsl_espi.c | 450 +++++++++++++++++++++++++++++------------ 1 file changed, 316 insertions(+), 134 deletions(-)
diff --git a/drivers/spi/fsl_espi.c b/drivers/spi/fsl_espi.c index 7444ae1a06..6ebe57c30b 100644 --- a/drivers/spi/fsl_espi.c +++ b/drivers/spi/fsl_espi.c @@ -4,17 +4,27 @@
- Copyright 2010-2011 Freescale Semiconductor, Inc.
- Author: Mingkai Hu (Mingkai.hu@freescale.com)
*/
Chuanhua Han (chuanhua.han@nxp.com)
#include <common.h>
#include <malloc.h> #include <spi.h> #include <asm/immap_85xx.h> +#include <dm.h> +#include <errno.h> +#include <fdtdec.h>
+struct fsl_espi_platdata {
uint flags;
uint speed_hz;
uint num_chipselect;
fdt_addr_t regs_addr;
+};
-struct fsl_spi_slave {
struct spi_slave slave;
+struct fsl_espi_priv { ccsr_espi_t *espi;
u32 speed_hz; unsigned int div16; unsigned int pm; int tx_timeout;
@@ -25,9 +35,18 @@ struct fsl_spi_slave { unsigned int max_transfer_length; };
+struct fsl_spi_slave {
struct spi_slave slave;
struct fsl_espi_priv priv; };
#define to_fsl_spi_slave(s) container_of(s, struct fsl_spi_slave, slave) +#define to_fsl_spi_priv(p) container_of(p, struct +fsl_spi_slave, +priv) #define US_PER_SECOND 1000000UL
+/* default SCK frequency, unit: HZ */ +#define FSL_ESPI_DEFAULT_SCK_FREQ 10000000
#define ESPI_MAX_CS_NUM 4 #define ESPI_FIFO_WIDTH_BIT 32
@@ -62,121 +81,46 @@ struct fsl_spi_slave {
#define ESPI_MAX_DATA_TRANSFER_LEN 0xFFF0
-struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
unsigned int max_hz, unsigned int mode)
-{
struct fsl_spi_slave *fsl;
sys_info_t sysinfo;
unsigned long spibrg = 0;
unsigned long spi_freq = 0;
unsigned char pm = 0;
if (!spi_cs_is_valid(bus, cs))
return NULL;
fsl = spi_alloc_slave(struct fsl_spi_slave, bus, cs);
if (!fsl)
return NULL;
fsl->espi = (void *)(CONFIG_SYS_MPC85xx_ESPI_ADDR);
fsl->mode = mode;
fsl->max_transfer_length = ESPI_MAX_DATA_TRANSFER_LEN;
/* Set eSPI BRG clock source */
get_sys_info(&sysinfo);
spibrg = sysinfo.freq_systembus / 2;
fsl->div16 = 0;
if ((spibrg / max_hz) > 32) {
fsl->div16 = ESPI_CSMODE_DIV16;
pm = spibrg / (max_hz * 16 * 2);
if (pm > 16) {
pm = 16;
debug("Requested speed is too low: %d
Hz, %ld
Hz "
"is used.\n", max_hz, spibrg / (32
16));
}
} else
pm = spibrg / (max_hz * 2);
if (pm)
pm--;
fsl->pm = pm;
if (fsl->div16)
spi_freq = spibrg / ((pm + 1) * 2 * 16);
else
spi_freq = spibrg / ((pm + 1) * 2);
/* set tx_timeout to 10 times of one espi FIFO entry go out
*/
fsl->tx_timeout = DIV_ROUND_UP((US_PER_SECOND *
ESPI_FIFO_WIDTH_BIT
* 10), spi_freq);
return &fsl->slave;
-}
-void spi_free_slave(struct spi_slave *slave) +#ifndef CONFIG_DM_SPI
Would you try for full dm-conversion? it would be hard to move all respective defconfigs to use but better try since we have next version deadline for full dm-conversion. thanks!
Currently my espi driver is modified to be compatible with dm configuration and non-dm configuration. If uboot don't need non-dm code in the future, I will remove this compatibility and only keep the dm driver code. Thank you.
Idea is to make fully dm supported and ie what we have migration deadline, doc/driver-model/MIGRATION.txt
Do you mean that I need to delete the original non-dm code? Or there are some values in the dm code that do not come from dts! Can you tell me something about it? Thank you!
If not dt, can be done via platdata, we have few drivers with similar support drivers/spi/pl022_spi.c
Check the same and let me know for any help.
Thank you for your advice! Now you can first merge the current patch into the main line of uboot, and then I will implement this full dm mode before the next deadline!

On Mon, May 6, 2019 at 1:38 PM Chuanhua Han chuanhua.han@nxp.com wrote:
-----Original Message----- From: Jagan Teki jagan@amarulasolutions.com Sent: 2019年5月6日 15:03 To: Chuanhua Han chuanhua.han@nxp.com Cc: Jagan Teki jagan@openedev.com; Wolfgang Denk wd@denx.de; Shengzhou Liu shengzhou.liu@nxp.com; Ruchika Gupta ruchika.gupta@nxp.com; U-Boot-Denx u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; Yinbo Zhu yinbo.zhu@nxp.com Subject: Re: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert Freescale ESPI driver to driver model
Caution: EXT Email
On Mon, May 6, 2019 at 12:29 PM Chuanhua Han chuanhua.han@nxp.com wrote:
-----Original Message----- From: Jagan Teki jagan@amarulasolutions.com Sent: 2019年4月26日 2:07 To: Chuanhua Han chuanhua.han@nxp.com Cc: Jagan Teki jagan@openedev.com; Wolfgang Denk wd@denx.de; Shengzhou Liu shengzhou.liu@nxp.com; Ruchika Gupta ruchika.gupta@nxp.com; U-Boot-Denx u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; Yinbo Zhu yinbo.zhu@nxp.com Subject: Re: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert Freescale ESPI driver to driver model
Caution: EXT Email
On Thu, Apr 25, 2019 at 8:27 AM Chuanhua Han
wrote:
Hi,jagan Thank you for your replay!
-----Original Message----- From: Jagan Teki jagan@amarulasolutions.com Sent: 2019年4月24日 14:57 To: Chuanhua Han chuanhua.han@nxp.com Cc: Jagan Teki jagan@openedev.com; Wolfgang Denk wd@denx.de; Shengzhou Liu shengzhou.liu@nxp.com; Ruchika Gupta ruchika.gupta@nxp.com; U-Boot-Denx u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; Yinbo Zhu yinbo.zhu@nxp.com Subject: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert Freescale ESPI driver to driver model
WARNING: This email was created outside of NXP. DO NOT CLICK links or attachments unless you recognize the sender and know the content is
safe.
On Tue, Apr 23, 2019 at 4:17 PM Chuanhua Han
wrote: > > Modify the Freescale ESPI driver to support the driver model. > Also resolved the following problems: > > ===================== WARNING ====================== This > board does > not use CONFIG_DM_SPI. Please update the board before v2019.04 > for no dm conversion and v2019.07 for partially dm converted drivers. > Failure to update can lead to driver/board removal See > doc/driver-model/MIGRATION.txt for more info. > ==================================================== > ===================== WARNING ====================== This > board does > not use CONFIG_DM_SPI_FLASH. Please update the board to use > CONFIG_SPI_FLASH before the v2019.07 release. > Failure to update by the deadline may result in board removal. > See doc/driver-model/MIGRATION.txt for more info. > ==================================================== > > Signed-off-by: Chuanhua Han chuanhua.han@nxp.com > --- > depends on: > - > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2 > F%2F > patc >
hwork.ozlabs.org%2Fproject%2Fuboot%2Flist%2F%3Fseries%3D99439&d
ata >
=02%7C01%7Cchuanhua.han%40nxp.com%7Cfa6bdd7859c4411b5d8608d6c8
8223e3%7 >
C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C63691685860819371
5&sda >
ta=437CqPexTmJAzhl7wZ3lAUQVbmy%2B2NvHlurTcGTJKT0%3D&reserve
d=0 > > drivers/spi/fsl_espi.c | 450 > +++++++++++++++++++++++++++++------------ > 1 file changed, 316 insertions(+), 134 deletions(-) > > diff --git a/drivers/spi/fsl_espi.c b/drivers/spi/fsl_espi.c > index 7444ae1a06..6ebe57c30b 100644 > --- a/drivers/spi/fsl_espi.c > +++ b/drivers/spi/fsl_espi.c > @@ -4,17 +4,27 @@ > * > * Copyright 2010-2011 Freescale Semiconductor, Inc. > * Author: Mingkai Hu (Mingkai.hu@freescale.com) > + * Chuanhua Han (chuanhua.han@nxp.com) > */ > > #include <common.h> > - > #include <malloc.h> > #include <spi.h> > #include <asm/immap_85xx.h> > +#include <dm.h> > +#include <errno.h> > +#include <fdtdec.h> > + > +struct fsl_espi_platdata { > + uint flags; > + uint speed_hz; > + uint num_chipselect; > + fdt_addr_t regs_addr; > +}; > > -struct fsl_spi_slave { > - struct spi_slave slave; > +struct fsl_espi_priv { > ccsr_espi_t *espi; > + u32 speed_hz; > unsigned int div16; > unsigned int pm; > int tx_timeout; > @@ -25,9 +35,18 @@ struct fsl_spi_slave { > unsigned int max_transfer_length; > }; > > +struct fsl_spi_slave { > + struct spi_slave slave; > + struct fsl_espi_priv priv; }; > + > #define to_fsl_spi_slave(s) container_of(s, struct > fsl_spi_slave, > slave) > +#define to_fsl_spi_priv(p) container_of(p, struct > +fsl_spi_slave, > +priv) > #define US_PER_SECOND 1000000UL > > +/* default SCK frequency, unit: HZ */ > +#define FSL_ESPI_DEFAULT_SCK_FREQ 10000000 > + > #define ESPI_MAX_CS_NUM 4 > #define ESPI_FIFO_WIDTH_BIT 32 > > @@ -62,121 +81,46 @@ struct fsl_spi_slave { > > #define ESPI_MAX_DATA_TRANSFER_LEN 0xFFF0 > > -struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, > - unsigned int max_hz, unsigned int mode) > -{ > - struct fsl_spi_slave *fsl; > - sys_info_t sysinfo; > - unsigned long spibrg = 0; > - unsigned long spi_freq = 0; > - unsigned char pm = 0; > - > - if (!spi_cs_is_valid(bus, cs)) > - return NULL; > - > - fsl = spi_alloc_slave(struct fsl_spi_slave, bus, cs); > - if (!fsl) > - return NULL; > - > - fsl->espi = (void *)(CONFIG_SYS_MPC85xx_ESPI_ADDR); > - fsl->mode = mode; > - fsl->max_transfer_length = ESPI_MAX_DATA_TRANSFER_LEN; > - > - /* Set eSPI BRG clock source */ > - get_sys_info(&sysinfo); > - spibrg = sysinfo.freq_systembus / 2; > - fsl->div16 = 0; > - if ((spibrg / max_hz) > 32) { > - fsl->div16 = ESPI_CSMODE_DIV16; > - pm = spibrg / (max_hz * 16 * 2); > - if (pm > 16) { > - pm = 16; > - debug("Requested speed is too low: %d
Hz, %ld
Hz " > - "is used.\n", max_hz, spibrg / (32
16));
> - } > - } else > - pm = spibrg / (max_hz * 2); > - if (pm) > - pm--; > - fsl->pm = pm; > - > - if (fsl->div16) > - spi_freq = spibrg / ((pm + 1) * 2 * 16); > - else > - spi_freq = spibrg / ((pm + 1) * 2); > - > - /* set tx_timeout to 10 times of one espi FIFO entry go out
*/
> - fsl->tx_timeout = DIV_ROUND_UP((US_PER_SECOND * ESPI_FIFO_WIDTH_BIT > - * 10), spi_freq); > - > - return &fsl->slave; > -} > - > -void spi_free_slave(struct spi_slave *slave) > +#ifndef CONFIG_DM_SPI
Would you try for full dm-conversion? it would be hard to move all respective defconfigs to use but better try since we have next version deadline for full dm-conversion. thanks!
Currently my espi driver is modified to be compatible with dm configuration and non-dm configuration. If uboot don't need non-dm code in the future, I will remove this compatibility and only keep the dm driver code. Thank you.
Idea is to make fully dm supported and ie what we have migration deadline, doc/driver-model/MIGRATION.txt
Do you mean that I need to delete the original non-dm code? Or there are some values in the dm code that do not come from dts! Can you tell me something about it? Thank you!
If not dt, can be done via platdata, we have few drivers with similar support drivers/spi/pl022_spi.c
Check the same and let me know for any help.
Thank you for your advice! Now you can first merge the current patch into the main line of uboot, and then I will implement this full dm mode before the next deadline!
OK, by the way I couldn't see this patchwork. would you link patch?

-----Original Message----- From: Jagan Teki jagan@amarulasolutions.com Sent: 2019年5月23日 12:36 To: Chuanhua Han chuanhua.han@nxp.com Cc: Jagan Teki jagan@openedev.com; Wolfgang Denk wd@denx.de; Shengzhou Liu shengzhou.liu@nxp.com; Ruchika Gupta ruchika.gupta@nxp.com; U-Boot-Denx u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; Yinbo Zhu yinbo.zhu@nxp.com Subject: Re: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert Freescale ESPI driver to driver model
Caution: EXT Email
On Mon, May 6, 2019 at 1:38 PM Chuanhua Han chuanhua.han@nxp.com wrote:
-----Original Message----- From: Jagan Teki jagan@amarulasolutions.com Sent: 2019年5月6日 15:03 To: Chuanhua Han chuanhua.han@nxp.com Cc: Jagan Teki jagan@openedev.com; Wolfgang Denk wd@denx.de; Shengzhou Liu shengzhou.liu@nxp.com; Ruchika Gupta ruchika.gupta@nxp.com; U-Boot-Denx u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; Yinbo Zhu yinbo.zhu@nxp.com Subject: Re: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert Freescale ESPI driver to driver model
Caution: EXT Email
On Mon, May 6, 2019 at 12:29 PM Chuanhua Han
wrote:
-----Original Message----- From: Jagan Teki jagan@amarulasolutions.com Sent: 2019年4月26日 2:07 To: Chuanhua Han chuanhua.han@nxp.com Cc: Jagan Teki jagan@openedev.com; Wolfgang Denk wd@denx.de; Shengzhou Liu shengzhou.liu@nxp.com; Ruchika Gupta ruchika.gupta@nxp.com; U-Boot-Denx u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; Yinbo Zhu yinbo.zhu@nxp.com Subject: Re: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert Freescale ESPI driver to driver model
Caution: EXT Email
On Thu, Apr 25, 2019 at 8:27 AM Chuanhua Han
wrote:
Hi,jagan Thank you for your replay!
> -----Original Message----- > From: Jagan Teki jagan@amarulasolutions.com > Sent: 2019年4月24日 14:57 > To: Chuanhua Han chuanhua.han@nxp.com > Cc: Jagan Teki jagan@openedev.com; Wolfgang Denk > wd@denx.de; Shengzhou Liu shengzhou.liu@nxp.com; Ruchika > Gupta ruchika.gupta@nxp.com; U-Boot-Denx > u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; > Yinbo Zhu yinbo.zhu@nxp.com > Subject: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert > Freescale ESPI driver to driver model > > WARNING: This email was created outside of NXP. DO NOT CLICK > links or attachments unless you recognize the sender and > know the content is
safe.
> > > > On Tue, Apr 23, 2019 at 4:17 PM Chuanhua Han
> wrote: > > > > Modify the Freescale ESPI driver to support the driver model. > > Also resolved the following problems: > > > > ===================== WARNING ====================== This > > board > does > > not use CONFIG_DM_SPI. Please update the board before > > v2019.04 for no dm conversion and v2019.07 for partially dm
converted drivers.
> > Failure to update can lead to driver/board removal See > > doc/driver-model/MIGRATION.txt for more info. > > ==================================================== > > ===================== WARNING ====================== This > > board > does > > not use CONFIG_DM_SPI_FLASH. Please update the board to > > use CONFIG_SPI_FLASH before the v2019.07 release. > > Failure to update by the deadline may result in board removal. > > See doc/driver-model/MIGRATION.txt for more info. > > ==================================================== > > > > Signed-off-by: Chuanhua Han chuanhua.han@nxp.com > > --- > > depends on: > > - > > https://eur01.safelinks.protection.outlook.com/?url=https% > > 3A%2 > > F%2F > > patc > > >
hwork.ozlabs.org%2Fproject%2Fuboot%2Flist%2F%3Fseries%3D99439&d
> ata > > >
=02%7C01%7Cchuanhua.han%40nxp.com%7Cfa6bdd7859c4411b5d8608d6c8
> 8223e3%7 > > >
C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C63691685860819371
> 5&sda > > >
ta=437CqPexTmJAzhl7wZ3lAUQVbmy%2B2NvHlurTcGTJKT0%3D&reserve
> d=0 > > > > drivers/spi/fsl_espi.c | 450 > > +++++++++++++++++++++++++++++------------ > > 1 file changed, 316 insertions(+), 134 deletions(-) > > > > diff --git a/drivers/spi/fsl_espi.c > > b/drivers/spi/fsl_espi.c index 7444ae1a06..6ebe57c30b > > 100644 > > --- a/drivers/spi/fsl_espi.c > > +++ b/drivers/spi/fsl_espi.c > > @@ -4,17 +4,27 @@ > > * > > * Copyright 2010-2011 Freescale Semiconductor, Inc. > > * Author: Mingkai Hu (Mingkai.hu@freescale.com) > > + * Chuanhua Han (chuanhua.han@nxp.com) > > */ > > > > #include <common.h> > > - > > #include <malloc.h> > > #include <spi.h> > > #include <asm/immap_85xx.h> > > +#include <dm.h> > > +#include <errno.h> > > +#include <fdtdec.h> > > + > > +struct fsl_espi_platdata { > > + uint flags; > > + uint speed_hz; > > + uint num_chipselect; > > + fdt_addr_t regs_addr; }; > > > > -struct fsl_spi_slave { > > - struct spi_slave slave; > > +struct fsl_espi_priv { > > ccsr_espi_t *espi; > > + u32 speed_hz; > > unsigned int div16; > > unsigned int pm; > > int tx_timeout; > > @@ -25,9 +35,18 @@ struct fsl_spi_slave { > > unsigned int max_transfer_length; > > }; > > > > +struct fsl_spi_slave { > > + struct spi_slave slave; > > + struct fsl_espi_priv priv; }; > > + > > #define to_fsl_spi_slave(s) container_of(s, struct > > fsl_spi_slave, > > slave) > > +#define to_fsl_spi_priv(p) container_of(p, struct > > +fsl_spi_slave, > > +priv) > > #define US_PER_SECOND 1000000UL > > > > +/* default SCK frequency, unit: HZ */ > > +#define FSL_ESPI_DEFAULT_SCK_FREQ 10000000 > > + > > #define ESPI_MAX_CS_NUM 4 > > #define ESPI_FIFO_WIDTH_BIT 32 > > > > @@ -62,121 +81,46 @@ struct fsl_spi_slave { > > > > #define ESPI_MAX_DATA_TRANSFER_LEN 0xFFF0 > > > > -struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int
cs,
> > - unsigned int max_hz, unsigned int mode) > > -{ > > - struct fsl_spi_slave *fsl; > > - sys_info_t sysinfo; > > - unsigned long spibrg = 0; > > - unsigned long spi_freq = 0; > > - unsigned char pm = 0; > > - > > - if (!spi_cs_is_valid(bus, cs)) > > - return NULL; > > - > > - fsl = spi_alloc_slave(struct fsl_spi_slave, bus, cs); > > - if (!fsl) > > - return NULL; > > - > > - fsl->espi = (void *)(CONFIG_SYS_MPC85xx_ESPI_ADDR); > > - fsl->mode = mode; > > - fsl->max_transfer_length =
ESPI_MAX_DATA_TRANSFER_LEN;
> > - > > - /* Set eSPI BRG clock source */ > > - get_sys_info(&sysinfo); > > - spibrg = sysinfo.freq_systembus / 2; > > - fsl->div16 = 0; > > - if ((spibrg / max_hz) > 32) { > > - fsl->div16 = ESPI_CSMODE_DIV16; > > - pm = spibrg / (max_hz * 16 * 2); > > - if (pm > 16) { > > - pm = 16; > > - debug("Requested speed is too
low: %d
Hz, %ld
> Hz " > > - "is used.\n", max_hz, spibrg /
(32
16));
> > - } > > - } else > > - pm = spibrg / (max_hz * 2); > > - if (pm) > > - pm--; > > - fsl->pm = pm; > > - > > - if (fsl->div16) > > - spi_freq = spibrg / ((pm + 1) * 2 * 16); > > - else > > - spi_freq = spibrg / ((pm + 1) * 2); > > - > > - /* set tx_timeout to 10 times of one espi FIFO entry go
out
*/
> > - fsl->tx_timeout = DIV_ROUND_UP((US_PER_SECOND * > ESPI_FIFO_WIDTH_BIT > > - * 10), spi_freq); > > - > > - return &fsl->slave; > > -} > > - > > -void spi_free_slave(struct spi_slave *slave) > > +#ifndef CONFIG_DM_SPI > > Would you try for full dm-conversion? it would be hard to > move all respective defconfigs to use but better try since > we have next version deadline for full dm-conversion. thanks! Currently my espi driver is modified to be compatible with dm configuration and non-dm configuration. If uboot don't need non-dm code in the future, I will remove this compatibility and only keep the dm driver code. Thank you.
Idea is to make fully dm supported and ie what we have migration deadline, doc/driver-model/MIGRATION.txt
Do you mean that I need to delete the original non-dm code? Or there are some values in the dm code that do not come from dts! Can you tell me something about it? Thank you!
If not dt, can be done via platdata, we have few drivers with similar support drivers/spi/pl022_spi.c
Check the same and let me know for any help.
Thank you for your advice! Now you can first merge the current patch into the main line of uboot, and then I will implement this full dm mode before the next deadline!
OK, by the way I couldn't see this patchwork. would you link patch?
Can't you see this patchwork? I will send you: https://patchwork.ozlabs.org/project/uboot/list/?series=104110

-----Original Message----- From: U-Boot u-boot-bounces@lists.denx.de On Behalf Of Jagan Teki Sent: Thursday, May 23, 2019 10:06 AM To: Chuanhua Han chuanhua.han@nxp.com Cc: U-Boot-Denx u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; Jagan Teki jagan@openedev.com; Yinbo Zhu yinbo.zhu@nxp.com; Ruchika Gupta ruchika.gupta@nxp.com Subject: Re: [U-Boot] [EXT] Re: [PATCH 2/5] dm: spi: Convert Freescale ESPI driver to driver model
On Mon, May 6, 2019 at 1:38 PM Chuanhua Han chuanhua.han@nxp.com wrote:
-----Original Message----- From: Jagan Teki jagan@amarulasolutions.com Sent: 2019年5月6日 15:03 To: Chuanhua Han chuanhua.han@nxp.com Cc: Jagan Teki jagan@openedev.com; Wolfgang Denk wd@denx.de; Shengzhou Liu shengzhou.liu@nxp.com; Ruchika Gupta ruchika.gupta@nxp.com; U-Boot-Denx u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; Yinbo Zhu yinbo.zhu@nxp.com Subject: Re: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert Freescale ESPI driver to driver model
Caution: EXT Email
On Mon, May 6, 2019 at 12:29 PM Chuanhua Han
wrote:
-----Original Message----- From: Jagan Teki jagan@amarulasolutions.com Sent: 2019年4月26日 2:07 To: Chuanhua Han chuanhua.han@nxp.com Cc: Jagan Teki jagan@openedev.com; Wolfgang Denk wd@denx.de; Shengzhou Liu shengzhou.liu@nxp.com; Ruchika Gupta ruchika.gupta@nxp.com; U-Boot-Denx u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; Yinbo Zhu yinbo.zhu@nxp.com Subject: Re: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert Freescale ESPI driver to driver model
Caution: EXT Email
On Thu, Apr 25, 2019 at 8:27 AM Chuanhua Han
wrote:
Hi,jagan Thank you for your replay!
> -----Original Message----- > From: Jagan Teki jagan@amarulasolutions.com > Sent: 2019年4月24日 14:57 > To: Chuanhua Han chuanhua.han@nxp.com > Cc: Jagan Teki jagan@openedev.com; Wolfgang Denk > wd@denx.de; Shengzhou Liu shengzhou.liu@nxp.com; Ruchika > Gupta ruchika.gupta@nxp.com; U-Boot-Denx > u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; > Yinbo Zhu yinbo.zhu@nxp.com > Subject: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert > Freescale ESPI driver to driver model > > WARNING: This email was created outside of NXP. DO NOT CLICK > links or attachments unless you recognize the sender and > know the content is
safe.
> > > > On Tue, Apr 23, 2019 at 4:17 PM Chuanhua Han
> wrote: > > > > Modify the Freescale ESPI driver to support the driver model. > > Also resolved the following problems: > > > > ===================== WARNING ======================
This
> > board > does > > not use CONFIG_DM_SPI. Please update the board before > > v2019.04 for no dm conversion and v2019.07 for partially dm
converted drivers.
> > Failure to update can lead to driver/board removal See > > doc/driver-model/MIGRATION.txt for more info. > > ==================================================== > > ===================== WARNING ======================
This
> > board > does > > not use CONFIG_DM_SPI_FLASH. Please update the board to > > use CONFIG_SPI_FLASH before the v2019.07 release. > > Failure to update by the deadline may result in board removal. > > See doc/driver-model/MIGRATION.txt for more info. > > ==================================================== > > > > Signed-off-by: Chuanhua Han chuanhua.han@nxp.com > > --- > > depends on: > > - > > https://eur01.safelinks.protection.outlook.com/?url=https% > > 3A%2 > > F%2F > > patc > > >
hwork.ozlabs.org%2Fproject%2Fuboot%2Flist%2F%3Fseries%3D99439&d
> ata > > >
=02%7C01%7Cchuanhua.han%40nxp.com%7Cfa6bdd7859c4411b5d8608d6c8
> 8223e3%7 > > >
C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C63691685860819371
> 5&sda > > >
ta=437CqPexTmJAzhl7wZ3lAUQVbmy%2B2NvHlurTcGTJKT0%3D&reserve
> d=0 > > > > drivers/spi/fsl_espi.c | 450 > > +++++++++++++++++++++++++++++------------ > > 1 file changed, 316 insertions(+), 134 deletions(-) > > > > diff --git a/drivers/spi/fsl_espi.c > > b/drivers/spi/fsl_espi.c index 7444ae1a06..6ebe57c30b > > 100644 > > --- a/drivers/spi/fsl_espi.c > > +++ b/drivers/spi/fsl_espi.c > > @@ -4,17 +4,27 @@ > > * > > * Copyright 2010-2011 Freescale Semiconductor, Inc. > > * Author: Mingkai Hu (Mingkai.hu@freescale.com) > > + * Chuanhua Han (chuanhua.han@nxp.com) > > */ > > > > #include <common.h> > > - > > #include <malloc.h> > > #include <spi.h> > > #include <asm/immap_85xx.h> > > +#include <dm.h> > > +#include <errno.h> > > +#include <fdtdec.h> > > + > > +struct fsl_espi_platdata { > > + uint flags; > > + uint speed_hz; > > + uint num_chipselect; > > + fdt_addr_t regs_addr; }; > > > > -struct fsl_spi_slave { > > - struct spi_slave slave; > > +struct fsl_espi_priv { > > ccsr_espi_t *espi; > > + u32 speed_hz; > > unsigned int div16; > > unsigned int pm; > > int tx_timeout; > > @@ -25,9 +35,18 @@ struct fsl_spi_slave { > > unsigned int max_transfer_length; > > }; > > > > +struct fsl_spi_slave { > > + struct spi_slave slave; > > + struct fsl_espi_priv priv; }; > > + > > #define to_fsl_spi_slave(s) container_of(s, struct > > fsl_spi_slave, > > slave) > > +#define to_fsl_spi_priv(p) container_of(p, struct > > +fsl_spi_slave, > > +priv) > > #define US_PER_SECOND 1000000UL > > > > +/* default SCK frequency, unit: HZ */ > > +#define FSL_ESPI_DEFAULT_SCK_FREQ 10000000 > > + > > #define ESPI_MAX_CS_NUM 4 > > #define ESPI_FIFO_WIDTH_BIT 32 > > > > @@ -62,121 +81,46 @@ struct fsl_spi_slave { > > > > #define ESPI_MAX_DATA_TRANSFER_LEN 0xFFF0 > > > > -struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, > > - unsigned int max_hz, unsigned int mode) > > -{ > > - struct fsl_spi_slave *fsl; > > - sys_info_t sysinfo; > > - unsigned long spibrg = 0; > > - unsigned long spi_freq = 0; > > - unsigned char pm = 0; > > - > > - if (!spi_cs_is_valid(bus, cs)) > > - return NULL; > > - > > - fsl = spi_alloc_slave(struct fsl_spi_slave, bus, cs); > > - if (!fsl) > > - return NULL; > > - > > - fsl->espi = (void *)(CONFIG_SYS_MPC85xx_ESPI_ADDR); > > - fsl->mode = mode; > > - fsl->max_transfer_length = ESPI_MAX_DATA_TRANSFER_LEN; > > - > > - /* Set eSPI BRG clock source */ > > - get_sys_info(&sysinfo); > > - spibrg = sysinfo.freq_systembus / 2; > > - fsl->div16 = 0; > > - if ((spibrg / max_hz) > 32) { > > - fsl->div16 = ESPI_CSMODE_DIV16; > > - pm = spibrg / (max_hz * 16 * 2); > > - if (pm > 16) { > > - pm = 16; > > - debug("Requested speed is too low: %d
Hz, %ld
> Hz " > > - "is used.\n", max_hz, spibrg / (32
16));
> > - } > > - } else > > - pm = spibrg / (max_hz * 2); > > - if (pm) > > - pm--; > > - fsl->pm = pm; > > - > > - if (fsl->div16) > > - spi_freq = spibrg / ((pm + 1) * 2 * 16); > > - else > > - spi_freq = spibrg / ((pm + 1) * 2); > > - > > - /* set tx_timeout to 10 times of one espi FIFO entry go out
*/
> > - fsl->tx_timeout = DIV_ROUND_UP((US_PER_SECOND * > ESPI_FIFO_WIDTH_BIT > > - * 10), spi_freq); > > - > > - return &fsl->slave; > > -} > > - > > -void spi_free_slave(struct spi_slave *slave) > > +#ifndef CONFIG_DM_SPI > > Would you try for full dm-conversion? it would be hard to > move all respective defconfigs to use but better try since > we have next version deadline for full dm-conversion. thanks! Currently my espi driver is modified to be compatible with dm configuration and non-dm configuration. If uboot don't need non-dm code in the future, I will remove this compatibility and only keep the dm driver code. Thank you.
Idea is to make fully dm supported and ie what we have migration deadline, doc/driver-model/MIGRATION.txt
Do you mean that I need to delete the original non-dm code? Or there are some values in the dm code that do not come from dts! Can you tell me something about it? Thank you!
If not dt, can be done via platdata, we have few drivers with similar support drivers/spi/pl022_spi.c
Check the same and let me know for any help.
Thank you for your advice! Now you can first merge the current patch into the main line of uboot, and then I will implement this full dm mode before the next deadline!
OK, by the way I couldn't see this patchwork. would you link patch?
This is the series http://patchwork.ozlabs.org/project/uboot/list/?series=104110 It has been delegated to me (Prabhakar - prabhu-kush).
Aer you planning to merge this patch (supporting both dm and non-dm)
--pk

On Thu, May 23, 2019 at 10:22 AM Prabhakar Kushwaha prabhakar.kushwaha@nxp.com wrote:
-----Original Message----- From: U-Boot u-boot-bounces@lists.denx.de On Behalf Of Jagan Teki Sent: Thursday, May 23, 2019 10:06 AM To: Chuanhua Han chuanhua.han@nxp.com Cc: U-Boot-Denx u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; Jagan Teki jagan@openedev.com; Yinbo Zhu yinbo.zhu@nxp.com; Ruchika Gupta ruchika.gupta@nxp.com Subject: Re: [U-Boot] [EXT] Re: [PATCH 2/5] dm: spi: Convert Freescale ESPI driver to driver model
On Mon, May 6, 2019 at 1:38 PM Chuanhua Han chuanhua.han@nxp.com wrote:
-----Original Message----- From: Jagan Teki jagan@amarulasolutions.com Sent: 2019年5月6日 15:03 To: Chuanhua Han chuanhua.han@nxp.com Cc: Jagan Teki jagan@openedev.com; Wolfgang Denk wd@denx.de; Shengzhou Liu shengzhou.liu@nxp.com; Ruchika Gupta ruchika.gupta@nxp.com; U-Boot-Denx u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; Yinbo Zhu yinbo.zhu@nxp.com Subject: Re: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert Freescale ESPI driver to driver model
Caution: EXT Email
On Mon, May 6, 2019 at 12:29 PM Chuanhua Han
wrote:
-----Original Message----- From: Jagan Teki jagan@amarulasolutions.com Sent: 2019年4月26日 2:07 To: Chuanhua Han chuanhua.han@nxp.com Cc: Jagan Teki jagan@openedev.com; Wolfgang Denk wd@denx.de; Shengzhou Liu shengzhou.liu@nxp.com; Ruchika Gupta ruchika.gupta@nxp.com; U-Boot-Denx u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; Yinbo Zhu yinbo.zhu@nxp.com Subject: Re: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert Freescale ESPI driver to driver model
Caution: EXT Email
On Thu, Apr 25, 2019 at 8:27 AM Chuanhua Han
wrote: > > Hi,jagan > Thank you for your replay! > > > -----Original Message----- > > From: Jagan Teki jagan@amarulasolutions.com > > Sent: 2019年4月24日 14:57 > > To: Chuanhua Han chuanhua.han@nxp.com > > Cc: Jagan Teki jagan@openedev.com; Wolfgang Denk > > wd@denx.de; Shengzhou Liu shengzhou.liu@nxp.com; Ruchika > > Gupta ruchika.gupta@nxp.com; U-Boot-Denx > > u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; > > Yinbo Zhu yinbo.zhu@nxp.com > > Subject: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert > > Freescale ESPI driver to driver model > > > > WARNING: This email was created outside of NXP. DO NOT CLICK > > links or attachments unless you recognize the sender and > > know the content is safe. > > > > > > > > On Tue, Apr 23, 2019 at 4:17 PM Chuanhua Han chuanhua.han@nxp.com > > wrote: > > > > > > Modify the Freescale ESPI driver to support the driver model. > > > Also resolved the following problems: > > > > > > ===================== WARNING ======================
This
> > > board > > does > > > not use CONFIG_DM_SPI. Please update the board before > > > v2019.04 for no dm conversion and v2019.07 for partially dm
converted drivers.
> > > Failure to update can lead to driver/board removal See > > > doc/driver-model/MIGRATION.txt for more info. > > > ==================================================== > > > ===================== WARNING ======================
This
> > > board > > does > > > not use CONFIG_DM_SPI_FLASH. Please update the board to > > > use CONFIG_SPI_FLASH before the v2019.07 release. > > > Failure to update by the deadline may result in board removal. > > > See doc/driver-model/MIGRATION.txt for more info. > > > ==================================================== > > > > > > Signed-off-by: Chuanhua Han chuanhua.han@nxp.com > > > --- > > > depends on: > > > - > > > https://eur01.safelinks.protection.outlook.com/?url=https% > > > 3A%2 > > > F%2F > > > patc > > > > >
hwork.ozlabs.org%2Fproject%2Fuboot%2Flist%2F%3Fseries%3D99439&d
> > ata > > > > >
=02%7C01%7Cchuanhua.han%40nxp.com%7Cfa6bdd7859c4411b5d8608d6c8
> > 8223e3%7 > > > > >
C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C63691685860819371
> > 5&sda > > > > >
ta=437CqPexTmJAzhl7wZ3lAUQVbmy%2B2NvHlurTcGTJKT0%3D&reserve
> > d=0 > > > > > > drivers/spi/fsl_espi.c | 450 > > > +++++++++++++++++++++++++++++------------ > > > 1 file changed, 316 insertions(+), 134 deletions(-) > > > > > > diff --git a/drivers/spi/fsl_espi.c > > > b/drivers/spi/fsl_espi.c index 7444ae1a06..6ebe57c30b > > > 100644 > > > --- a/drivers/spi/fsl_espi.c > > > +++ b/drivers/spi/fsl_espi.c > > > @@ -4,17 +4,27 @@ > > > * > > > * Copyright 2010-2011 Freescale Semiconductor, Inc. > > > * Author: Mingkai Hu (Mingkai.hu@freescale.com) > > > + * Chuanhua Han (chuanhua.han@nxp.com) > > > */ > > > > > > #include <common.h> > > > - > > > #include <malloc.h> > > > #include <spi.h> > > > #include <asm/immap_85xx.h> > > > +#include <dm.h> > > > +#include <errno.h> > > > +#include <fdtdec.h> > > > + > > > +struct fsl_espi_platdata { > > > + uint flags; > > > + uint speed_hz; > > > + uint num_chipselect; > > > + fdt_addr_t regs_addr; }; > > > > > > -struct fsl_spi_slave { > > > - struct spi_slave slave; > > > +struct fsl_espi_priv { > > > ccsr_espi_t *espi; > > > + u32 speed_hz; > > > unsigned int div16; > > > unsigned int pm; > > > int tx_timeout; > > > @@ -25,9 +35,18 @@ struct fsl_spi_slave { > > > unsigned int max_transfer_length; > > > }; > > > > > > +struct fsl_spi_slave { > > > + struct spi_slave slave; > > > + struct fsl_espi_priv priv; }; > > > + > > > #define to_fsl_spi_slave(s) container_of(s, struct > > > fsl_spi_slave, > > > slave) > > > +#define to_fsl_spi_priv(p) container_of(p, struct > > > +fsl_spi_slave, > > > +priv) > > > #define US_PER_SECOND 1000000UL > > > > > > +/* default SCK frequency, unit: HZ */ > > > +#define FSL_ESPI_DEFAULT_SCK_FREQ 10000000 > > > + > > > #define ESPI_MAX_CS_NUM 4 > > > #define ESPI_FIFO_WIDTH_BIT 32 > > > > > > @@ -62,121 +81,46 @@ struct fsl_spi_slave { > > > > > > #define ESPI_MAX_DATA_TRANSFER_LEN 0xFFF0 > > > > > > -struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, > > > - unsigned int max_hz, unsigned int mode) > > > -{ > > > - struct fsl_spi_slave *fsl; > > > - sys_info_t sysinfo; > > > - unsigned long spibrg = 0; > > > - unsigned long spi_freq = 0; > > > - unsigned char pm = 0; > > > - > > > - if (!spi_cs_is_valid(bus, cs)) > > > - return NULL; > > > - > > > - fsl = spi_alloc_slave(struct fsl_spi_slave, bus, cs); > > > - if (!fsl) > > > - return NULL; > > > - > > > - fsl->espi = (void *)(CONFIG_SYS_MPC85xx_ESPI_ADDR); > > > - fsl->mode = mode; > > > - fsl->max_transfer_length = ESPI_MAX_DATA_TRANSFER_LEN; > > > - > > > - /* Set eSPI BRG clock source */ > > > - get_sys_info(&sysinfo); > > > - spibrg = sysinfo.freq_systembus / 2; > > > - fsl->div16 = 0; > > > - if ((spibrg / max_hz) > 32) { > > > - fsl->div16 = ESPI_CSMODE_DIV16; > > > - pm = spibrg / (max_hz * 16 * 2); > > > - if (pm > 16) { > > > - pm = 16; > > > - debug("Requested speed is too low: %d Hz, %ld > > Hz " > > > - "is used.\n", max_hz, spibrg / (32
16)); > > > - } > > > - } else > > > - pm = spibrg / (max_hz * 2); > > > - if (pm) > > > - pm--; > > > - fsl->pm = pm; > > > - > > > - if (fsl->div16) > > > - spi_freq = spibrg / ((pm + 1) * 2 * 16); > > > - else > > > - spi_freq = spibrg / ((pm + 1) * 2); > > > - > > > - /* set tx_timeout to 10 times of one espi FIFO entry go out
*/
> > > - fsl->tx_timeout = DIV_ROUND_UP((US_PER_SECOND * > > ESPI_FIFO_WIDTH_BIT > > > - * 10), spi_freq); > > > - > > > - return &fsl->slave; > > > -} > > > - > > > -void spi_free_slave(struct spi_slave *slave) > > > +#ifndef CONFIG_DM_SPI > > > > Would you try for full dm-conversion? it would be hard to > > move all respective defconfigs to use but better try since > > we have next version deadline for full dm-conversion. thanks! > Currently my espi driver is modified to be compatible with dm > configuration and non-dm configuration. > If uboot don't need non-dm code in the future, I will remove > this compatibility and only keep the dm driver code. Thank you.
Idea is to make fully dm supported and ie what we have migration deadline, doc/driver-model/MIGRATION.txt
Do you mean that I need to delete the original non-dm code? Or there are some values in the dm code that do not come from dts! Can you tell me something about it? Thank you!
If not dt, can be done via platdata, we have few drivers with similar support drivers/spi/pl022_spi.c
Check the same and let me know for any help.
Thank you for your advice! Now you can first merge the current patch into the main line of uboot, and then I will implement this full dm mode before the next deadline!
OK, by the way I couldn't see this patchwork. would you link patch?
This is the series http://patchwork.ozlabs.org/project/uboot/list/?series=104110 It has been delegated to me (Prabhakar - prabhu-kush).
Aer you planning to merge this patch (supporting both dm and non-dm)
Yes, since Chuanhua committed to send full dm in next MW or before, but I can see few nits on the driver will send the comments.

-----Original Message----- From: Jagan Teki jagan@amarulasolutions.com Sent: 2019年5月23日 12:56 To: Prabhakar Kushwaha prabhakar.kushwaha@nxp.com Cc: Chuanhua Han chuanhua.han@nxp.com; U-Boot-Denx u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; Jagan Teki jagan@openedev.com; Yinbo Zhu yinbo.zhu@nxp.com; Ruchika Gupta ruchika.gupta@nxp.com Subject: Re: [U-Boot] [EXT] Re: [PATCH 2/5] dm: spi: Convert Freescale ESPI driver to driver model
Caution: EXT Email
On Thu, May 23, 2019 at 10:22 AM Prabhakar Kushwaha prabhakar.kushwaha@nxp.com wrote:
-----Original Message----- From: U-Boot u-boot-bounces@lists.denx.de On Behalf Of Jagan Teki Sent: Thursday, May 23, 2019 10:06 AM To: Chuanhua Han chuanhua.han@nxp.com Cc: U-Boot-Denx u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; Jagan Teki jagan@openedev.com; Yinbo Zhu yinbo.zhu@nxp.com; Ruchika Gupta ruchika.gupta@nxp.com Subject: Re: [U-Boot] [EXT] Re: [PATCH 2/5] dm: spi: Convert Freescale ESPI driver to driver model
On Mon, May 6, 2019 at 1:38 PM Chuanhua Han
wrote:
-----Original Message----- From: Jagan Teki jagan@amarulasolutions.com Sent: 2019年5月6日 15:03 To: Chuanhua Han chuanhua.han@nxp.com Cc: Jagan Teki jagan@openedev.com; Wolfgang Denk wd@denx.de; Shengzhou Liu shengzhou.liu@nxp.com; Ruchika Gupta ruchika.gupta@nxp.com; U-Boot-Denx u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; Yinbo Zhu yinbo.zhu@nxp.com Subject: Re: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert Freescale ESPI driver to driver model
Caution: EXT Email
On Mon, May 6, 2019 at 12:29 PM Chuanhua Han
wrote:
> -----Original Message----- > From: Jagan Teki jagan@amarulasolutions.com > Sent: 2019年4月26日 2:07 > To: Chuanhua Han chuanhua.han@nxp.com > Cc: Jagan Teki jagan@openedev.com; Wolfgang Denk > wd@denx.de; Shengzhou Liu shengzhou.liu@nxp.com; Ruchika > Gupta ruchika.gupta@nxp.com; U-Boot-Denx > u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; > Yinbo Zhu yinbo.zhu@nxp.com > Subject: Re: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert > Freescale ESPI driver to driver model > > Caution: EXT Email > > On Thu, Apr 25, 2019 at 8:27 AM Chuanhua Han
> wrote: > > > > Hi,jagan > > Thank you for your replay! > > > > > -----Original Message----- > > > From: Jagan Teki jagan@amarulasolutions.com > > > Sent: 2019年4月24日 14:57 > > > To: Chuanhua Han chuanhua.han@nxp.com > > > Cc: Jagan Teki jagan@openedev.com; Wolfgang Denk > > > wd@denx.de; Shengzhou Liu shengzhou.liu@nxp.com; > > > Ruchika Gupta ruchika.gupta@nxp.com; U-Boot-Denx > > > u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; > > > Yinbo Zhu yinbo.zhu@nxp.com > > > Subject: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert > > > Freescale ESPI driver to driver model > > > > > > WARNING: This email was created outside of NXP. DO NOT > > > CLICK links or attachments unless you recognize the > > > sender and know the content is > safe. > > > > > > > > > > > > On Tue, Apr 23, 2019 at 4:17 PM Chuanhua Han > chuanhua.han@nxp.com > > > wrote: > > > > > > > > Modify the Freescale ESPI driver to support the driver model. > > > > Also resolved the following problems: > > > > > > > > ===================== WARNING ======================
This
> > > > board > > > does > > > > not use CONFIG_DM_SPI. Please update the board before > > > > v2019.04 for no dm conversion and v2019.07 for > > > > partially dm
converted drivers.
> > > > Failure to update can lead to driver/board removal See > > > > doc/driver-model/MIGRATION.txt for more info. > > > > ==================================================== > > > > ===================== WARNING ======================
This
> > > > board > > > does > > > > not use CONFIG_DM_SPI_FLASH. Please update the board > > > > to use CONFIG_SPI_FLASH before the v2019.07 release. > > > > Failure to update by the deadline may result in board removal. > > > > See doc/driver-model/MIGRATION.txt for more info. > > > > ==================================================== > > > > > > > > Signed-off-by: Chuanhua Han chuanhua.han@nxp.com > > > > --- > > > > depends on: > > > > - > > > > https://eur01.safelinks.protection.outlook.com/?url=ht > > > > tps% > > > > 3A%2 > > > > F%2F > > > > patc > > > > > > > >
hwork.ozlabs.org%2Fproject%2Fuboot%2Flist%2F%3Fseries%3D99439&d
> > > ata > > > > > > > >
=02%7C01%7Cchuanhua.han%40nxp.com%7Cfa6bdd7859c4411b5d8608d6c8
> > > 8223e3%7 > > > > > > > >
C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C63691685860819371
> > > 5&sda > > > > > > > >
ta=437CqPexTmJAzhl7wZ3lAUQVbmy%2B2NvHlurTcGTJKT0%3D&reserve
> > > d=0 > > > > > > > > drivers/spi/fsl_espi.c | 450 > > > > +++++++++++++++++++++++++++++------------ > > > > 1 file changed, 316 insertions(+), 134 deletions(-) > > > > > > > > diff --git a/drivers/spi/fsl_espi.c > > > > b/drivers/spi/fsl_espi.c index 7444ae1a06..6ebe57c30b > > > > 100644 > > > > --- a/drivers/spi/fsl_espi.c > > > > +++ b/drivers/spi/fsl_espi.c > > > > @@ -4,17 +4,27 @@ > > > > * > > > > * Copyright 2010-2011 Freescale Semiconductor, Inc. > > > > * Author: Mingkai Hu (Mingkai.hu@freescale.com) > > > > + * Chuanhua Han (chuanhua.han@nxp.com) > > > > */ > > > > > > > > #include <common.h> > > > > - > > > > #include <malloc.h> > > > > #include <spi.h> > > > > #include <asm/immap_85xx.h> > > > > +#include <dm.h> > > > > +#include <errno.h> > > > > +#include <fdtdec.h> > > > > + > > > > +struct fsl_espi_platdata { > > > > + uint flags; > > > > + uint speed_hz; > > > > + uint num_chipselect; > > > > + fdt_addr_t regs_addr; }; > > > > > > > > -struct fsl_spi_slave { > > > > - struct spi_slave slave; > > > > +struct fsl_espi_priv { > > > > ccsr_espi_t *espi; > > > > + u32 speed_hz; > > > > unsigned int div16; > > > > unsigned int pm; > > > > int tx_timeout; > > > > @@ -25,9 +35,18 @@ struct fsl_spi_slave { > > > > unsigned int max_transfer_length; > > > > }; > > > > > > > > +struct fsl_spi_slave { > > > > + struct spi_slave slave; > > > > + struct fsl_espi_priv priv; }; > > > > + > > > > #define to_fsl_spi_slave(s) container_of(s, struct > > > > fsl_spi_slave, > > > > slave) > > > > +#define to_fsl_spi_priv(p) container_of(p, struct > > > > +fsl_spi_slave, > > > > +priv) > > > > #define US_PER_SECOND 1000000UL > > > > > > > > +/* default SCK frequency, unit: HZ */ > > > > +#define FSL_ESPI_DEFAULT_SCK_FREQ 10000000 > > > > + > > > > #define ESPI_MAX_CS_NUM 4 > > > > #define ESPI_FIFO_WIDTH_BIT 32 > > > > > > > > @@ -62,121 +81,46 @@ struct fsl_spi_slave { > > > > > > > > #define ESPI_MAX_DATA_TRANSFER_LEN 0xFFF0 > > > > > > > > -struct spi_slave *spi_setup_slave(unsigned int bus, unsigned
int cs,
> > > > - unsigned int max_hz, unsigned int mode) > > > > -{ > > > > - struct fsl_spi_slave *fsl; > > > > - sys_info_t sysinfo; > > > > - unsigned long spibrg = 0; > > > > - unsigned long spi_freq = 0; > > > > - unsigned char pm = 0; > > > > - > > > > - if (!spi_cs_is_valid(bus, cs)) > > > > - return NULL; > > > > - > > > > - fsl = spi_alloc_slave(struct fsl_spi_slave, bus, cs); > > > > - if (!fsl) > > > > - return NULL; > > > > - > > > > - fsl->espi = (void
*)(CONFIG_SYS_MPC85xx_ESPI_ADDR);
> > > > - fsl->mode = mode; > > > > - fsl->max_transfer_length =
ESPI_MAX_DATA_TRANSFER_LEN;
> > > > - > > > > - /* Set eSPI BRG clock source */ > > > > - get_sys_info(&sysinfo); > > > > - spibrg = sysinfo.freq_systembus / 2; > > > > - fsl->div16 = 0; > > > > - if ((spibrg / max_hz) > 32) { > > > > - fsl->div16 = ESPI_CSMODE_DIV16; > > > > - pm = spibrg / (max_hz * 16 * 2); > > > > - if (pm > 16) { > > > > - pm = 16; > > > > - debug("Requested speed is too
low: %d
> Hz, %ld > > > Hz " > > > > - "is used.\n", max_hz,
spibrg / (32
> 16)); > > > > - } > > > > - } else > > > > - pm = spibrg / (max_hz * 2); > > > > - if (pm) > > > > - pm--; > > > > - fsl->pm = pm; > > > > - > > > > - if (fsl->div16) > > > > - spi_freq = spibrg / ((pm + 1) * 2 * 16); > > > > - else > > > > - spi_freq = spibrg / ((pm + 1) * 2); > > > > - > > > > - /* set tx_timeout to 10 times of one espi FIFO entry
go out
*/
> > > > - fsl->tx_timeout = DIV_ROUND_UP((US_PER_SECOND * > > > ESPI_FIFO_WIDTH_BIT > > > > - * 10), spi_freq); > > > > - > > > > - return &fsl->slave; > > > > -} > > > > - > > > > -void spi_free_slave(struct spi_slave *slave) > > > > +#ifndef CONFIG_DM_SPI > > > > > > Would you try for full dm-conversion? it would be hard > > > to move all respective defconfigs to use but better try > > > since we have next version deadline for full dm-conversion.
thanks!
> > Currently my espi driver is modified to be compatible with > > dm configuration and non-dm configuration. > > If uboot don't need non-dm code in the future, I will > > remove this compatibility and only keep the dm driver code.
Thank you.
> > Idea is to make fully dm supported and ie what we have > migration deadline, doc/driver-model/MIGRATION.txt Do you mean that I need to delete the original non-dm code? Or there are some values in the dm code that do not come from dts! Can you tell me something about it? Thank you!
If not dt, can be done via platdata, we have few drivers with similar support drivers/spi/pl022_spi.c
Check the same and let me know for any help.
Thank you for your advice! Now you can first merge the current patch into the main line of uboot, and then I will implement this full dm mode before the next
deadline!
OK, by the way I couldn't see this patchwork. would you link patch?
This is the series https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fpatch
work.ozlabs.org%2Fproject%2Fuboot%2Flist%2F%3Fseries%3D104110&d ata
=02%7C01%7Cchuanhua.han%40nxp.com%7Cc1d1fdfe705d4970c80f08d6df3 afaab%7
C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C63694184174081201 2&sda
ta=wnj4nQ%2BqMaEdNoC9LTB3TLDBl%2BgJNfUO3ox3gUK3QbE%3D&res erved=0
It has been delegated to me (Prabhakar - prabhu-kush).
Aer you planning to merge this patch (supporting both dm and non-dm)
Yes, since Chuanhua committed to send full dm in next MW or before, but I can see few nits on the driver will send the comments.
I have sent the third version of the patch set, is there a problem, can I merge?

-----Original Message----- From: Jagan Teki jagan@amarulasolutions.com Sent: 2019年5月6日 15:03 To: Chuanhua Han chuanhua.han@nxp.com Cc: Jagan Teki jagan@openedev.com; Wolfgang Denk wd@denx.de; Shengzhou Liu shengzhou.liu@nxp.com; Ruchika Gupta ruchika.gupta@nxp.com; U-Boot-Denx u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; Yinbo Zhu yinbo.zhu@nxp.com Subject: Re: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert Freescale ESPI driver to driver model
Caution: EXT Email
On Mon, May 6, 2019 at 12:29 PM Chuanhua Han chuanhua.han@nxp.com wrote:
-----Original Message----- From: Jagan Teki jagan@amarulasolutions.com Sent: 2019年4月26日 2:07 To: Chuanhua Han chuanhua.han@nxp.com Cc: Jagan Teki jagan@openedev.com; Wolfgang Denk wd@denx.de; Shengzhou Liu shengzhou.liu@nxp.com; Ruchika Gupta ruchika.gupta@nxp.com; U-Boot-Denx u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; Yinbo Zhu yinbo.zhu@nxp.com Subject: Re: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert Freescale ESPI driver to driver model
Caution: EXT Email
On Thu, Apr 25, 2019 at 8:27 AM Chuanhua Han
wrote:
Hi,jagan Thank you for your replay!
-----Original Message----- From: Jagan Teki jagan@amarulasolutions.com Sent: 2019年4月24日 14:57 To: Chuanhua Han chuanhua.han@nxp.com Cc: Jagan Teki jagan@openedev.com; Wolfgang Denk wd@denx.de; Shengzhou Liu shengzhou.liu@nxp.com; Ruchika Gupta ruchika.gupta@nxp.com; U-Boot-Denx u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; Yinbo Zhu yinbo.zhu@nxp.com Subject: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert Freescale ESPI driver to driver model
WARNING: This email was created outside of NXP. DO NOT CLICK links or attachments unless you recognize the sender and know the content is
safe.
On Tue, Apr 23, 2019 at 4:17 PM Chuanhua Han
wrote:
Modify the Freescale ESPI driver to support the driver model. Also resolved the following problems:
===================== WARNING ====================== This board
does
not use CONFIG_DM_SPI. Please update the board before v2019.04 for no dm conversion and v2019.07 for partially dm converted drivers. Failure to update can lead to driver/board removal See doc/driver-model/MIGRATION.txt for more info. ==================================================== ===================== WARNING ====================== This board
does
not use CONFIG_DM_SPI_FLASH. Please update the board to use CONFIG_SPI_FLASH before the v2019.07 release. Failure to update by the deadline may result in board removal. See doc/driver-model/MIGRATION.txt for more info. ====================================================
Signed-off-by: Chuanhua Han chuanhua.han@nxp.com
depends on: - https://eur01.safelinks.protection.outlook.com/?url=https%3A%2 F%2F patc
hwork.ozlabs.org%2Fproject%2Fuboot%2Flist%2F%3Fseries%3D99439&d
ata
=02%7C01%7Cchuanhua.han%40nxp.com%7Cfa6bdd7859c4411b5d8608d6c8
8223e3%7
C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C63691685860819371
5&sda
ta=437CqPexTmJAzhl7wZ3lAUQVbmy%2B2NvHlurTcGTJKT0%3D&reserve
d=0
drivers/spi/fsl_espi.c | 450 +++++++++++++++++++++++++++++------------ 1 file changed, 316 insertions(+), 134 deletions(-)
diff --git a/drivers/spi/fsl_espi.c b/drivers/spi/fsl_espi.c index 7444ae1a06..6ebe57c30b 100644 --- a/drivers/spi/fsl_espi.c +++ b/drivers/spi/fsl_espi.c @@ -4,17 +4,27 @@
- Copyright 2010-2011 Freescale Semiconductor, Inc.
- Author: Mingkai Hu (Mingkai.hu@freescale.com)
*/
Chuanhua Han (chuanhua.han@nxp.com)
#include <common.h>
#include <malloc.h> #include <spi.h> #include <asm/immap_85xx.h> +#include <dm.h> +#include <errno.h> +#include <fdtdec.h>
+struct fsl_espi_platdata {
uint flags;
uint speed_hz;
uint num_chipselect;
fdt_addr_t regs_addr;
+};
-struct fsl_spi_slave {
struct spi_slave slave;
+struct fsl_espi_priv { ccsr_espi_t *espi;
u32 speed_hz; unsigned int div16; unsigned int pm; int tx_timeout;
@@ -25,9 +35,18 @@ struct fsl_spi_slave { unsigned int max_transfer_length; };
+struct fsl_spi_slave {
struct spi_slave slave;
struct fsl_espi_priv priv; };
#define to_fsl_spi_slave(s) container_of(s, struct fsl_spi_slave, slave) +#define to_fsl_spi_priv(p) container_of(p, struct +fsl_spi_slave, +priv) #define US_PER_SECOND 1000000UL
+/* default SCK frequency, unit: HZ */ +#define FSL_ESPI_DEFAULT_SCK_FREQ 10000000
#define ESPI_MAX_CS_NUM 4 #define ESPI_FIFO_WIDTH_BIT 32
@@ -62,121 +81,46 @@ struct fsl_spi_slave {
#define ESPI_MAX_DATA_TRANSFER_LEN 0xFFF0
-struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
unsigned int max_hz, unsigned int mode)
-{
struct fsl_spi_slave *fsl;
sys_info_t sysinfo;
unsigned long spibrg = 0;
unsigned long spi_freq = 0;
unsigned char pm = 0;
if (!spi_cs_is_valid(bus, cs))
return NULL;
fsl = spi_alloc_slave(struct fsl_spi_slave, bus, cs);
if (!fsl)
return NULL;
fsl->espi = (void *)(CONFIG_SYS_MPC85xx_ESPI_ADDR);
fsl->mode = mode;
fsl->max_transfer_length = ESPI_MAX_DATA_TRANSFER_LEN;
/* Set eSPI BRG clock source */
get_sys_info(&sysinfo);
spibrg = sysinfo.freq_systembus / 2;
fsl->div16 = 0;
if ((spibrg / max_hz) > 32) {
fsl->div16 = ESPI_CSMODE_DIV16;
pm = spibrg / (max_hz * 16 * 2);
if (pm > 16) {
pm = 16;
debug("Requested speed is too low: %d
Hz, %ld
Hz "
"is used.\n", max_hz, spibrg / (32
16));
}
} else
pm = spibrg / (max_hz * 2);
if (pm)
pm--;
fsl->pm = pm;
if (fsl->div16)
spi_freq = spibrg / ((pm + 1) * 2 * 16);
else
spi_freq = spibrg / ((pm + 1) * 2);
/* set tx_timeout to 10 times of one espi FIFO entry go out
*/
fsl->tx_timeout = DIV_ROUND_UP((US_PER_SECOND *
ESPI_FIFO_WIDTH_BIT
* 10), spi_freq);
return &fsl->slave;
-}
-void spi_free_slave(struct spi_slave *slave) +#ifndef CONFIG_DM_SPI
Would you try for full dm-conversion? it would be hard to move all respective defconfigs to use but better try since we have next version deadline for full dm-conversion. thanks!
Currently my espi driver is modified to be compatible with dm configuration and non-dm configuration. If uboot don't need non-dm code in the future, I will remove this compatibility and only keep the dm driver code. Thank you.
Idea is to make fully dm supported and ie what we have migration deadline, doc/driver-model/MIGRATION.txt
Do you mean that I need to delete the original non-dm code? Or there are some values in the dm code that do not come from dts! Can you tell me something about it? Thank you!
If not dt, can be done via platdata, we have few drivers with similar support drivers/spi/pl022_spi.c
Check the same and let me know for any help.
Can we merge the mainline of uboot first? Looking forward to your reply!

Dear Chuanhua, Jagan,
-----Original Message----- From: U-Boot u-boot-bounces@lists.denx.de On Behalf Of Chuanhua Han Sent: Thursday, May 9, 2019 9:03 AM To: Jagan Teki jagan@amarulasolutions.com Cc: U-Boot-Denx u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; Jagan Teki jagan@openedev.com; Yinbo Zhu yinbo.zhu@nxp.com; Ruchika Gupta ruchika.gupta@nxp.com Subject: Re: [U-Boot] [EXT] Re: [PATCH 2/5] dm: spi: Convert Freescale ESPI driver to driver model
-----Original Message----- From: Jagan Teki jagan@amarulasolutions.com Sent: 2019年5月6日 15:03 To: Chuanhua Han chuanhua.han@nxp.com Cc: Jagan Teki jagan@openedev.com; Wolfgang Denk wd@denx.de; Shengzhou Liu shengzhou.liu@nxp.com; Ruchika Gupta ruchika.gupta@nxp.com; U-Boot-Denx u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; Yinbo Zhu yinbo.zhu@nxp.com Subject: Re: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert Freescale ESPI driver to driver model
Caution: EXT Email
On Mon, May 6, 2019 at 12:29 PM Chuanhua Han chuanhua.han@nxp.com wrote:
-----Original Message----- From: Jagan Teki jagan@amarulasolutions.com Sent: 2019年4月26日 2:07 To: Chuanhua Han chuanhua.han@nxp.com Cc: Jagan Teki jagan@openedev.com; Wolfgang Denk wd@denx.de; Shengzhou Liu shengzhou.liu@nxp.com; Ruchika Gupta ruchika.gupta@nxp.com; U-Boot-Denx u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; Yinbo Zhu yinbo.zhu@nxp.com Subject: Re: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert Freescale ESPI driver to driver model
Caution: EXT Email
On Thu, Apr 25, 2019 at 8:27 AM Chuanhua Han
wrote:
Hi,jagan Thank you for your replay!
-----Original Message----- From: Jagan Teki jagan@amarulasolutions.com Sent: 2019年4月24日 14:57 To: Chuanhua Han chuanhua.han@nxp.com Cc: Jagan Teki jagan@openedev.com; Wolfgang Denk wd@denx.de; Shengzhou Liu shengzhou.liu@nxp.com; Ruchika Gupta ruchika.gupta@nxp.com; U-Boot-Denx u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; Yinbo Zhu yinbo.zhu@nxp.com Subject: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert Freescale ESPI driver to driver model
WARNING: This email was created outside of NXP. DO NOT CLICK links or attachments unless you recognize the sender and know the content is
safe.
On Tue, Apr 23, 2019 at 4:17 PM Chuanhua Han
wrote: > > Modify the Freescale ESPI driver to support the driver model. > Also resolved the following problems: > > ===================== WARNING ====================== This > board does > not use CONFIG_DM_SPI. Please update the board before > v2019.04 for no dm conversion and v2019.07 for partially dm
converted drivers.
> Failure to update can lead to driver/board removal See > doc/driver-model/MIGRATION.txt for more info. > ==================================================== > ===================== WARNING ====================== This > board does > not use CONFIG_DM_SPI_FLASH. Please update the board to use > CONFIG_SPI_FLASH before the v2019.07 release. > Failure to update by the deadline may result in board removal. > See doc/driver-model/MIGRATION.txt for more info. > ==================================================== > > Signed-off-by: Chuanhua Han chuanhua.han@nxp.com > --- > depends on: > - > https://eur01.safelinks.protection.outlook.com/?url=https%3A > %2 > F%2F > patc >
hwork.ozlabs.org%2Fproject%2Fuboot%2Flist%2F%3Fseries%3D99439&d
ata >
=02%7C01%7Cchuanhua.han%40nxp.com%7Cfa6bdd7859c4411b5d8608d6c8
8223e3%7 >
C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C63691685860819371
5&sda >
ta=437CqPexTmJAzhl7wZ3lAUQVbmy%2B2NvHlurTcGTJKT0%3D&reserve
d=0 > > drivers/spi/fsl_espi.c | 450 > +++++++++++++++++++++++++++++------------ > 1 file changed, 316 insertions(+), 134 deletions(-) > > diff --git a/drivers/spi/fsl_espi.c b/drivers/spi/fsl_espi.c > index 7444ae1a06..6ebe57c30b 100644 > --- a/drivers/spi/fsl_espi.c > +++ b/drivers/spi/fsl_espi.c > @@ -4,17 +4,27 @@ > * > * Copyright 2010-2011 Freescale Semiconductor, Inc. > * Author: Mingkai Hu (Mingkai.hu@freescale.com) > + * Chuanhua Han (chuanhua.han@nxp.com) > */ > > #include <common.h> > - > #include <malloc.h> > #include <spi.h> > #include <asm/immap_85xx.h> > +#include <dm.h> > +#include <errno.h> > +#include <fdtdec.h> > + > +struct fsl_espi_platdata { > + uint flags; > + uint speed_hz; > + uint num_chipselect; > + fdt_addr_t regs_addr; }; > > -struct fsl_spi_slave { > - struct spi_slave slave; > +struct fsl_espi_priv { > ccsr_espi_t *espi; > + u32 speed_hz; > unsigned int div16; > unsigned int pm; > int tx_timeout; > @@ -25,9 +35,18 @@ struct fsl_spi_slave { > unsigned int max_transfer_length; > }; > > +struct fsl_spi_slave { > + struct spi_slave slave; > + struct fsl_espi_priv priv; }; > + > #define to_fsl_spi_slave(s) container_of(s, struct > fsl_spi_slave, > slave) > +#define to_fsl_spi_priv(p) container_of(p, struct > +fsl_spi_slave, > +priv) > #define US_PER_SECOND 1000000UL > > +/* default SCK frequency, unit: HZ */ > +#define FSL_ESPI_DEFAULT_SCK_FREQ 10000000 > + > #define ESPI_MAX_CS_NUM 4 > #define ESPI_FIFO_WIDTH_BIT 32 > > @@ -62,121 +81,46 @@ struct fsl_spi_slave { > > #define ESPI_MAX_DATA_TRANSFER_LEN 0xFFF0 > > -struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, > - unsigned int max_hz, unsigned int mode) > -{ > - struct fsl_spi_slave *fsl; > - sys_info_t sysinfo; > - unsigned long spibrg = 0; > - unsigned long spi_freq = 0; > - unsigned char pm = 0; > - > - if (!spi_cs_is_valid(bus, cs)) > - return NULL; > - > - fsl = spi_alloc_slave(struct fsl_spi_slave, bus, cs); > - if (!fsl) > - return NULL; > - > - fsl->espi = (void *)(CONFIG_SYS_MPC85xx_ESPI_ADDR); > - fsl->mode = mode; > - fsl->max_transfer_length = ESPI_MAX_DATA_TRANSFER_LEN; > - > - /* Set eSPI BRG clock source */ > - get_sys_info(&sysinfo); > - spibrg = sysinfo.freq_systembus / 2; > - fsl->div16 = 0; > - if ((spibrg / max_hz) > 32) { > - fsl->div16 = ESPI_CSMODE_DIV16; > - pm = spibrg / (max_hz * 16 * 2); > - if (pm > 16) { > - pm = 16; > - debug("Requested speed is too low: %d
Hz, %ld
Hz " > - "is used.\n", max_hz, spibrg / (32
16));
> - } > - } else > - pm = spibrg / (max_hz * 2); > - if (pm) > - pm--; > - fsl->pm = pm; > - > - if (fsl->div16) > - spi_freq = spibrg / ((pm + 1) * 2 * 16); > - else > - spi_freq = spibrg / ((pm + 1) * 2); > - > - /* set tx_timeout to 10 times of one espi FIFO entry go out
*/
> - fsl->tx_timeout = DIV_ROUND_UP((US_PER_SECOND * ESPI_FIFO_WIDTH_BIT > - * 10), spi_freq); > - > - return &fsl->slave; > -} > - > -void spi_free_slave(struct spi_slave *slave) > +#ifndef CONFIG_DM_SPI
Would you try for full dm-conversion? it would be hard to move all respective defconfigs to use but better try since we have next version deadline for full dm-conversion. thanks!
Currently my espi driver is modified to be compatible with dm configuration and non-dm configuration. If uboot don't need non-dm code in the future, I will remove this compatibility and only keep the dm driver code. Thank you.
Idea is to make fully dm supported and ie what we have migration deadline, doc/driver-model/MIGRATION.txt
Do you mean that I need to delete the original non-dm code? Or there are some values in the dm code that do not come from dts! Can you tell me something about it? Thank you!
If not dt, can be done via platdata, we have few drivers with similar support drivers/spi/pl022_spi.c
I am trying to break dead-lock here.
Request from Jagan i.e. convert this driver in full DM model. Remove non-dm compatibility. Considering most of the NXP's PowerPC platforms are not supported device tree. A middle path will be platdata similar to drivers/spi/pl022_spi.c.
@Chunahua: can you check it's feasibility and provide solution as early as possible.
--pk

-----Original Message----- From: Prabhakar Kushwaha Sent: 2019年5月23日 0:53 To: Chuanhua Han chuanhua.han@nxp.com; Jagan Teki jagan@amarulasolutions.com Cc: U-Boot-Denx u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; Jagan Teki jagan@openedev.com; Yinbo Zhu yinbo.zhu@nxp.com; Ruchika Gupta ruchika.gupta@nxp.com; Xiaobo Xie xiaobo.xie@nxp.com; Rajan Srivastava rajan.srivastava@nxp.com Subject: RE: [U-Boot] [EXT] Re: [PATCH 2/5] dm: spi: Convert Freescale ESPI driver to driver model
Dear Chuanhua, Jagan,
-----Original Message----- From: U-Boot u-boot-bounces@lists.denx.de On Behalf Of Chuanhua Han Sent: Thursday, May 9, 2019 9:03 AM To: Jagan Teki jagan@amarulasolutions.com Cc: U-Boot-Denx u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; Jagan Teki jagan@openedev.com; Yinbo Zhu yinbo.zhu@nxp.com; Ruchika Gupta ruchika.gupta@nxp.com Subject: Re: [U-Boot] [EXT] Re: [PATCH 2/5] dm: spi: Convert Freescale ESPI driver to driver model
-----Original Message----- From: Jagan Teki jagan@amarulasolutions.com Sent: 2019年5月6日 15:03 To: Chuanhua Han chuanhua.han@nxp.com Cc: Jagan Teki jagan@openedev.com; Wolfgang Denk wd@denx.de; Shengzhou Liu shengzhou.liu@nxp.com; Ruchika Gupta ruchika.gupta@nxp.com; U-Boot-Denx u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; Yinbo Zhu yinbo.zhu@nxp.com Subject: Re: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert Freescale ESPI driver to driver model
Caution: EXT Email
On Mon, May 6, 2019 at 12:29 PM Chuanhua Han
wrote:
-----Original Message----- From: Jagan Teki jagan@amarulasolutions.com Sent: 2019年4月26日 2:07 To: Chuanhua Han chuanhua.han@nxp.com Cc: Jagan Teki jagan@openedev.com; Wolfgang Denk wd@denx.de; Shengzhou Liu shengzhou.liu@nxp.com; Ruchika Gupta ruchika.gupta@nxp.com; U-Boot-Denx u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; Yinbo Zhu yinbo.zhu@nxp.com Subject: Re: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert Freescale ESPI driver to driver model
Caution: EXT Email
On Thu, Apr 25, 2019 at 8:27 AM Chuanhua Han
wrote:
Hi,jagan Thank you for your replay!
> -----Original Message----- > From: Jagan Teki jagan@amarulasolutions.com > Sent: 2019年4月24日 14:57 > To: Chuanhua Han chuanhua.han@nxp.com > Cc: Jagan Teki jagan@openedev.com; Wolfgang Denk > wd@denx.de; Shengzhou Liu shengzhou.liu@nxp.com; Ruchika > Gupta ruchika.gupta@nxp.com; U-Boot-Denx > u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; > Yinbo Zhu yinbo.zhu@nxp.com > Subject: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert > Freescale ESPI driver to driver model > > WARNING: This email was created outside of NXP. DO NOT CLICK > links or attachments unless you recognize the sender and > know the content is
safe.
> > > > On Tue, Apr 23, 2019 at 4:17 PM Chuanhua Han
> wrote: > > > > Modify the Freescale ESPI driver to support the driver model. > > Also resolved the following problems: > > > > ===================== WARNING ====================== This > > board > does > > not use CONFIG_DM_SPI. Please update the board before > > v2019.04 for no dm conversion and v2019.07 for partially > > dm
converted drivers.
> > Failure to update can lead to driver/board removal See > > doc/driver-model/MIGRATION.txt for more info. > > ==================================================== > > ===================== WARNING ====================== This > > board > does > > not use CONFIG_DM_SPI_FLASH. Please update the board to > > use CONFIG_SPI_FLASH before the v2019.07 release. > > Failure to update by the deadline may result in board removal. > > See doc/driver-model/MIGRATION.txt for more info. > > ==================================================== > > > > Signed-off-by: Chuanhua Han chuanhua.han@nxp.com > > --- > > depends on: > > - > > https://eur01.safelinks.protection.outlook.com/?url=https% > > 3A > > %2 > > F%2F > > patc > > >
hwork.ozlabs.org%2Fproject%2Fuboot%2Flist%2F%3Fseries%3D99439&d
> ata > > >
=02%7C01%7Cchuanhua.han%40nxp.com%7Cfa6bdd7859c4411b5d8608d6c8
> 8223e3%7 > > >
C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C63691685860819371
> 5&sda > > >
ta=437CqPexTmJAzhl7wZ3lAUQVbmy%2B2NvHlurTcGTJKT0%3D&reserve
> d=0 > > > > drivers/spi/fsl_espi.c | 450 > > +++++++++++++++++++++++++++++------------ > > 1 file changed, 316 insertions(+), 134 deletions(-) > > > > diff --git a/drivers/spi/fsl_espi.c > > b/drivers/spi/fsl_espi.c index 7444ae1a06..6ebe57c30b > > 100644 > > --- a/drivers/spi/fsl_espi.c > > +++ b/drivers/spi/fsl_espi.c > > @@ -4,17 +4,27 @@ > > * > > * Copyright 2010-2011 Freescale Semiconductor, Inc. > > * Author: Mingkai Hu (Mingkai.hu@freescale.com) > > + * Chuanhua Han (chuanhua.han@nxp.com) > > */ > > > > #include <common.h> > > - > > #include <malloc.h> > > #include <spi.h> > > #include <asm/immap_85xx.h> > > +#include <dm.h> > > +#include <errno.h> > > +#include <fdtdec.h> > > + > > +struct fsl_espi_platdata { > > + uint flags; > > + uint speed_hz; > > + uint num_chipselect; > > + fdt_addr_t regs_addr; }; > > > > -struct fsl_spi_slave { > > - struct spi_slave slave; > > +struct fsl_espi_priv { > > ccsr_espi_t *espi; > > + u32 speed_hz; > > unsigned int div16; > > unsigned int pm; > > int tx_timeout; > > @@ -25,9 +35,18 @@ struct fsl_spi_slave { > > unsigned int max_transfer_length; > > }; > > > > +struct fsl_spi_slave { > > + struct spi_slave slave; > > + struct fsl_espi_priv priv; }; > > + > > #define to_fsl_spi_slave(s) container_of(s, struct > > fsl_spi_slave, > > slave) > > +#define to_fsl_spi_priv(p) container_of(p, struct > > +fsl_spi_slave, > > +priv) > > #define US_PER_SECOND 1000000UL > > > > +/* default SCK frequency, unit: HZ */ > > +#define FSL_ESPI_DEFAULT_SCK_FREQ 10000000 > > + > > #define ESPI_MAX_CS_NUM 4 > > #define ESPI_FIFO_WIDTH_BIT 32 > > > > @@ -62,121 +81,46 @@ struct fsl_spi_slave { > > > > #define ESPI_MAX_DATA_TRANSFER_LEN 0xFFF0 > > > > -struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int
cs,
> > - unsigned int max_hz, unsigned int mode) > > -{ > > - struct fsl_spi_slave *fsl; > > - sys_info_t sysinfo; > > - unsigned long spibrg = 0; > > - unsigned long spi_freq = 0; > > - unsigned char pm = 0; > > - > > - if (!spi_cs_is_valid(bus, cs)) > > - return NULL; > > - > > - fsl = spi_alloc_slave(struct fsl_spi_slave, bus, cs); > > - if (!fsl) > > - return NULL; > > - > > - fsl->espi = (void *)(CONFIG_SYS_MPC85xx_ESPI_ADDR); > > - fsl->mode = mode; > > - fsl->max_transfer_length =
ESPI_MAX_DATA_TRANSFER_LEN;
> > - > > - /* Set eSPI BRG clock source */ > > - get_sys_info(&sysinfo); > > - spibrg = sysinfo.freq_systembus / 2; > > - fsl->div16 = 0; > > - if ((spibrg / max_hz) > 32) { > > - fsl->div16 = ESPI_CSMODE_DIV16; > > - pm = spibrg / (max_hz * 16 * 2); > > - if (pm > 16) { > > - pm = 16; > > - debug("Requested speed is too
low: %d
Hz, %ld
> Hz " > > - "is used.\n", max_hz, spibrg /
(32
16));
> > - } > > - } else > > - pm = spibrg / (max_hz * 2); > > - if (pm) > > - pm--; > > - fsl->pm = pm; > > - > > - if (fsl->div16) > > - spi_freq = spibrg / ((pm + 1) * 2 * 16); > > - else > > - spi_freq = spibrg / ((pm + 1) * 2); > > - > > - /* set tx_timeout to 10 times of one espi FIFO entry go
out
*/
> > - fsl->tx_timeout = DIV_ROUND_UP((US_PER_SECOND * > ESPI_FIFO_WIDTH_BIT > > - * 10), spi_freq); > > - > > - return &fsl->slave; > > -} > > - > > -void spi_free_slave(struct spi_slave *slave) > > +#ifndef CONFIG_DM_SPI > > Would you try for full dm-conversion? it would be hard to > move all respective defconfigs to use but better try since > we have next version deadline for full dm-conversion. thanks! Currently my espi driver is modified to be compatible with dm configuration and non-dm configuration. If uboot don't need non-dm code in the future, I will remove this compatibility and only keep the dm driver code. Thank you.
Idea is to make fully dm supported and ie what we have migration deadline, doc/driver-model/MIGRATION.txt
Do you mean that I need to delete the original non-dm code? Or there are some values in the dm code that do not come from dts! Can you tell me something about it? Thank you!
If not dt, can be done via platdata, we have few drivers with similar support drivers/spi/pl022_spi.c
I am trying to break dead-lock here.
Request from Jagan i.e. convert this driver in full DM model. Remove non-dm compatibility. Considering most of the NXP's PowerPC platforms are not supported device tree. A middle path will be platdata similar to drivers/spi/pl022_spi.c.
@Chunahua: can you check it's feasibility and provide solution as early as possible.
I don't know too much about platdata, and now both dm and non-dm support are supported. Based on the i2c support that currently has lx1028 on hand, if espi needs to use platdata for implementation, it is estimated that it will be developed in June.
--pk

On Wed, May 22, 2019 at 10:23 PM Prabhakar Kushwaha prabhakar.kushwaha@nxp.com wrote:
Dear Chuanhua, Jagan,
-----Original Message----- From: U-Boot u-boot-bounces@lists.denx.de On Behalf Of Chuanhua Han Sent: Thursday, May 9, 2019 9:03 AM To: Jagan Teki jagan@amarulasolutions.com Cc: U-Boot-Denx u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; Jagan Teki jagan@openedev.com; Yinbo Zhu yinbo.zhu@nxp.com; Ruchika Gupta ruchika.gupta@nxp.com Subject: Re: [U-Boot] [EXT] Re: [PATCH 2/5] dm: spi: Convert Freescale ESPI driver to driver model
-----Original Message----- From: Jagan Teki jagan@amarulasolutions.com Sent: 2019年5月6日 15:03 To: Chuanhua Han chuanhua.han@nxp.com Cc: Jagan Teki jagan@openedev.com; Wolfgang Denk wd@denx.de; Shengzhou Liu shengzhou.liu@nxp.com; Ruchika Gupta ruchika.gupta@nxp.com; U-Boot-Denx u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; Yinbo Zhu yinbo.zhu@nxp.com Subject: Re: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert Freescale ESPI driver to driver model
Caution: EXT Email
On Mon, May 6, 2019 at 12:29 PM Chuanhua Han chuanhua.han@nxp.com wrote:
-----Original Message----- From: Jagan Teki jagan@amarulasolutions.com Sent: 2019年4月26日 2:07 To: Chuanhua Han chuanhua.han@nxp.com Cc: Jagan Teki jagan@openedev.com; Wolfgang Denk wd@denx.de; Shengzhou Liu shengzhou.liu@nxp.com; Ruchika Gupta ruchika.gupta@nxp.com; U-Boot-Denx u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; Yinbo Zhu yinbo.zhu@nxp.com Subject: Re: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert Freescale ESPI driver to driver model
Caution: EXT Email
On Thu, Apr 25, 2019 at 8:27 AM Chuanhua Han
wrote:
Hi,jagan Thank you for your replay!
> -----Original Message----- > From: Jagan Teki jagan@amarulasolutions.com > Sent: 2019年4月24日 14:57 > To: Chuanhua Han chuanhua.han@nxp.com > Cc: Jagan Teki jagan@openedev.com; Wolfgang Denk > wd@denx.de; Shengzhou Liu shengzhou.liu@nxp.com; Ruchika > Gupta ruchika.gupta@nxp.com; U-Boot-Denx > u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; Yinbo > Zhu yinbo.zhu@nxp.com > Subject: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert > Freescale ESPI driver to driver model > > WARNING: This email was created outside of NXP. DO NOT CLICK > links or attachments unless you recognize the sender and know > the content is
safe.
> > > > On Tue, Apr 23, 2019 at 4:17 PM Chuanhua Han
> wrote: > > > > Modify the Freescale ESPI driver to support the driver model. > > Also resolved the following problems: > > > > ===================== WARNING ====================== This > > board > does > > not use CONFIG_DM_SPI. Please update the board before > > v2019.04 for no dm conversion and v2019.07 for partially dm
converted drivers.
> > Failure to update can lead to driver/board removal See > > doc/driver-model/MIGRATION.txt for more info. > > ==================================================== > > ===================== WARNING ====================== This > > board > does > > not use CONFIG_DM_SPI_FLASH. Please update the board to use > > CONFIG_SPI_FLASH before the v2019.07 release. > > Failure to update by the deadline may result in board removal. > > See doc/driver-model/MIGRATION.txt for more info. > > ==================================================== > > > > Signed-off-by: Chuanhua Han chuanhua.han@nxp.com > > --- > > depends on: > > - > > https://eur01.safelinks.protection.outlook.com/?url=https%3A > > %2 > > F%2F > > patc > > >
hwork.ozlabs.org%2Fproject%2Fuboot%2Flist%2F%3Fseries%3D99439&d
> ata > > >
=02%7C01%7Cchuanhua.han%40nxp.com%7Cfa6bdd7859c4411b5d8608d6c8
> 8223e3%7 > > >
C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C63691685860819371
> 5&sda > > >
ta=437CqPexTmJAzhl7wZ3lAUQVbmy%2B2NvHlurTcGTJKT0%3D&reserve
> d=0 > > > > drivers/spi/fsl_espi.c | 450 > > +++++++++++++++++++++++++++++------------ > > 1 file changed, 316 insertions(+), 134 deletions(-) > > > > diff --git a/drivers/spi/fsl_espi.c b/drivers/spi/fsl_espi.c > > index 7444ae1a06..6ebe57c30b 100644 > > --- a/drivers/spi/fsl_espi.c > > +++ b/drivers/spi/fsl_espi.c > > @@ -4,17 +4,27 @@ > > * > > * Copyright 2010-2011 Freescale Semiconductor, Inc. > > * Author: Mingkai Hu (Mingkai.hu@freescale.com) > > + * Chuanhua Han (chuanhua.han@nxp.com) > > */ > > > > #include <common.h> > > - > > #include <malloc.h> > > #include <spi.h> > > #include <asm/immap_85xx.h> > > +#include <dm.h> > > +#include <errno.h> > > +#include <fdtdec.h> > > + > > +struct fsl_espi_platdata { > > + uint flags; > > + uint speed_hz; > > + uint num_chipselect; > > + fdt_addr_t regs_addr; }; > > > > -struct fsl_spi_slave { > > - struct spi_slave slave; > > +struct fsl_espi_priv { > > ccsr_espi_t *espi; > > + u32 speed_hz; > > unsigned int div16; > > unsigned int pm; > > int tx_timeout; > > @@ -25,9 +35,18 @@ struct fsl_spi_slave { > > unsigned int max_transfer_length; > > }; > > > > +struct fsl_spi_slave { > > + struct spi_slave slave; > > + struct fsl_espi_priv priv; }; > > + > > #define to_fsl_spi_slave(s) container_of(s, struct > > fsl_spi_slave, > > slave) > > +#define to_fsl_spi_priv(p) container_of(p, struct > > +fsl_spi_slave, > > +priv) > > #define US_PER_SECOND 1000000UL > > > > +/* default SCK frequency, unit: HZ */ > > +#define FSL_ESPI_DEFAULT_SCK_FREQ 10000000 > > + > > #define ESPI_MAX_CS_NUM 4 > > #define ESPI_FIFO_WIDTH_BIT 32 > > > > @@ -62,121 +81,46 @@ struct fsl_spi_slave { > > > > #define ESPI_MAX_DATA_TRANSFER_LEN 0xFFF0 > > > > -struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, > > - unsigned int max_hz, unsigned int mode) > > -{ > > - struct fsl_spi_slave *fsl; > > - sys_info_t sysinfo; > > - unsigned long spibrg = 0; > > - unsigned long spi_freq = 0; > > - unsigned char pm = 0; > > - > > - if (!spi_cs_is_valid(bus, cs)) > > - return NULL; > > - > > - fsl = spi_alloc_slave(struct fsl_spi_slave, bus, cs); > > - if (!fsl) > > - return NULL; > > - > > - fsl->espi = (void *)(CONFIG_SYS_MPC85xx_ESPI_ADDR); > > - fsl->mode = mode; > > - fsl->max_transfer_length = ESPI_MAX_DATA_TRANSFER_LEN; > > - > > - /* Set eSPI BRG clock source */ > > - get_sys_info(&sysinfo); > > - spibrg = sysinfo.freq_systembus / 2; > > - fsl->div16 = 0; > > - if ((spibrg / max_hz) > 32) { > > - fsl->div16 = ESPI_CSMODE_DIV16; > > - pm = spibrg / (max_hz * 16 * 2); > > - if (pm > 16) { > > - pm = 16; > > - debug("Requested speed is too low: %d
Hz, %ld
> Hz " > > - "is used.\n", max_hz, spibrg / (32
16));
> > - } > > - } else > > - pm = spibrg / (max_hz * 2); > > - if (pm) > > - pm--; > > - fsl->pm = pm; > > - > > - if (fsl->div16) > > - spi_freq = spibrg / ((pm + 1) * 2 * 16); > > - else > > - spi_freq = spibrg / ((pm + 1) * 2); > > - > > - /* set tx_timeout to 10 times of one espi FIFO entry go out
*/
> > - fsl->tx_timeout = DIV_ROUND_UP((US_PER_SECOND * > ESPI_FIFO_WIDTH_BIT > > - * 10), spi_freq); > > - > > - return &fsl->slave; > > -} > > - > > -void spi_free_slave(struct spi_slave *slave) > > +#ifndef CONFIG_DM_SPI > > Would you try for full dm-conversion? it would be hard to move > all respective defconfigs to use but better try since we have > next version deadline for full dm-conversion. thanks! Currently my espi driver is modified to be compatible with dm configuration and non-dm configuration. If uboot don't need non-dm code in the future, I will remove this compatibility and only keep the dm driver code. Thank you.
Idea is to make fully dm supported and ie what we have migration deadline, doc/driver-model/MIGRATION.txt
Do you mean that I need to delete the original non-dm code? Or there are some values in the dm code that do not come from dts! Can you tell me something about it? Thank you!
If not dt, can be done via platdata, we have few drivers with similar support drivers/spi/pl022_spi.c
I am trying to break dead-lock here.
Request from Jagan i.e. convert this driver in full DM model. Remove non-dm compatibility. Considering most of the NXP's PowerPC platforms are not supported device tree. A middle path will be platdata similar to drivers/spi/pl022_spi.c.
platdata is straightforward, we have a driver that supported. only concern I can see here, the boards which are using this driver would have dm, of_control or platdata if they want to use fully converted fsl_espi.c

-----Original Message----- From: Jagan Teki jagan@amarulasolutions.com Sent: 2019年5月23日 12:38 To: Prabhakar Kushwaha prabhakar.kushwaha@nxp.com Cc: Chuanhua Han chuanhua.han@nxp.com; U-Boot-Denx u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; Jagan Teki jagan@openedev.com; Yinbo Zhu yinbo.zhu@nxp.com; Ruchika Gupta ruchika.gupta@nxp.com; Xiaobo Xie xiaobo.xie@nxp.com; Rajan Srivastava rajan.srivastava@nxp.com Subject: Re: [U-Boot] [EXT] Re: [PATCH 2/5] dm: spi: Convert Freescale ESPI driver to driver model
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On Wed, May 22, 2019 at 10:23 PM Prabhakar Kushwaha prabhakar.kushwaha@nxp.com wrote:
Dear Chuanhua, Jagan,
-----Original Message----- From: U-Boot u-boot-bounces@lists.denx.de On Behalf Of Chuanhua Han Sent: Thursday, May 9, 2019 9:03 AM To: Jagan Teki jagan@amarulasolutions.com Cc: U-Boot-Denx u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; Jagan Teki jagan@openedev.com; Yinbo Zhu yinbo.zhu@nxp.com; Ruchika Gupta ruchika.gupta@nxp.com Subject: Re: [U-Boot] [EXT] Re: [PATCH 2/5] dm: spi: Convert Freescale ESPI driver to driver model
-----Original Message----- From: Jagan Teki jagan@amarulasolutions.com Sent: 2019年5月6日 15:03 To: Chuanhua Han chuanhua.han@nxp.com Cc: Jagan Teki jagan@openedev.com; Wolfgang Denk wd@denx.de; Shengzhou Liu shengzhou.liu@nxp.com; Ruchika Gupta ruchika.gupta@nxp.com; U-Boot-Denx u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; Yinbo Zhu yinbo.zhu@nxp.com Subject: Re: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert Freescale ESPI driver to driver model
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On Mon, May 6, 2019 at 12:29 PM Chuanhua Han chuanhua.han@nxp.com wrote:
-----Original Message----- From: Jagan Teki jagan@amarulasolutions.com Sent: 2019年4月26日 2:07 To: Chuanhua Han chuanhua.han@nxp.com Cc: Jagan Teki jagan@openedev.com; Wolfgang Denk wd@denx.de; Shengzhou Liu shengzhou.liu@nxp.com; Ruchika Gupta ruchika.gupta@nxp.com; U-Boot-Denx u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; Yinbo Zhu yinbo.zhu@nxp.com Subject: Re: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert Freescale ESPI driver to driver model
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On Thu, Apr 25, 2019 at 8:27 AM Chuanhua Han
wrote: > > Hi,jagan > Thank you for your replay! > > > -----Original Message----- > > From: Jagan Teki jagan@amarulasolutions.com > > Sent: 2019年4月24日 14:57 > > To: Chuanhua Han chuanhua.han@nxp.com > > Cc: Jagan Teki jagan@openedev.com; Wolfgang Denk > > wd@denx.de; Shengzhou Liu shengzhou.liu@nxp.com; > > Ruchika Gupta ruchika.gupta@nxp.com; U-Boot-Denx > > u-boot@lists.denx.de; Jiafei Pan jiafei.pan@nxp.com; > > Yinbo Zhu yinbo.zhu@nxp.com > > Subject: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert > > Freescale ESPI driver to driver model > > > > WARNING: This email was created outside of NXP. DO NOT > > CLICK links or attachments unless you recognize the sender > > and know the content is safe. > > > > > > > > On Tue, Apr 23, 2019 at 4:17 PM Chuanhua Han chuanhua.han@nxp.com > > wrote: > > > > > > Modify the Freescale ESPI driver to support the driver model. > > > Also resolved the following problems: > > > > > > ===================== WARNING ====================== > > > This board > > does > > > not use CONFIG_DM_SPI. Please update the board before > > > v2019.04 for no dm conversion and v2019.07 for partially > > > dm
converted drivers.
> > > Failure to update can lead to driver/board removal See > > > doc/driver-model/MIGRATION.txt for more info. > > > ==================================================== > > > ===================== WARNING ====================== > > > This board > > does > > > not use CONFIG_DM_SPI_FLASH. Please update the board to > > > use CONFIG_SPI_FLASH before the v2019.07 release. > > > Failure to update by the deadline may result in board removal. > > > See doc/driver-model/MIGRATION.txt for more info. > > > ==================================================== > > > > > > Signed-off-by: Chuanhua Han chuanhua.han@nxp.com > > > --- > > > depends on: > > > - > > > https://eur01.safelinks.protection.outlook.com/?url=http > > > s%3A > > > %2 > > > F%2F > > > patc > > > > >
hwork.ozlabs.org%2Fproject%2Fuboot%2Flist%2F%3Fseries%3D99439&
d
> > ata > > > > >
=02%7C01%7Cchuanhua.han%40nxp.com%7Cfa6bdd7859c4411b5d8608d6c8
> > 8223e3%7 > > > > >
C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C63691685860819371
> > 5&sda > > > > >
ta=437CqPexTmJAzhl7wZ3lAUQVbmy%2B2NvHlurTcGTJKT0%3D&reserve
> > d=0 > > > > > > drivers/spi/fsl_espi.c | 450 > > > +++++++++++++++++++++++++++++------------ > > > 1 file changed, 316 insertions(+), 134 deletions(-) > > > > > > diff --git a/drivers/spi/fsl_espi.c > > > b/drivers/spi/fsl_espi.c index 7444ae1a06..6ebe57c30b > > > 100644 > > > --- a/drivers/spi/fsl_espi.c > > > +++ b/drivers/spi/fsl_espi.c > > > @@ -4,17 +4,27 @@ > > > * > > > * Copyright 2010-2011 Freescale Semiconductor, Inc. > > > * Author: Mingkai Hu (Mingkai.hu@freescale.com) > > > + * Chuanhua Han (chuanhua.han@nxp.com) > > > */ > > > > > > #include <common.h> > > > - > > > #include <malloc.h> > > > #include <spi.h> > > > #include <asm/immap_85xx.h> > > > +#include <dm.h> > > > +#include <errno.h> > > > +#include <fdtdec.h> > > > + > > > +struct fsl_espi_platdata { > > > + uint flags; > > > + uint speed_hz; > > > + uint num_chipselect; > > > + fdt_addr_t regs_addr; }; > > > > > > -struct fsl_spi_slave { > > > - struct spi_slave slave; > > > +struct fsl_espi_priv { > > > ccsr_espi_t *espi; > > > + u32 speed_hz; > > > unsigned int div16; > > > unsigned int pm; > > > int tx_timeout; > > > @@ -25,9 +35,18 @@ struct fsl_spi_slave { > > > unsigned int max_transfer_length; > > > }; > > > > > > +struct fsl_spi_slave { > > > + struct spi_slave slave; > > > + struct fsl_espi_priv priv; }; > > > + > > > #define to_fsl_spi_slave(s) container_of(s, struct > > > fsl_spi_slave, > > > slave) > > > +#define to_fsl_spi_priv(p) container_of(p, struct > > > +fsl_spi_slave, > > > +priv) > > > #define US_PER_SECOND 1000000UL > > > > > > +/* default SCK frequency, unit: HZ */ > > > +#define FSL_ESPI_DEFAULT_SCK_FREQ 10000000 > > > + > > > #define ESPI_MAX_CS_NUM 4 > > > #define ESPI_FIFO_WIDTH_BIT 32 > > > > > > @@ -62,121 +81,46 @@ struct fsl_spi_slave { > > > > > > #define ESPI_MAX_DATA_TRANSFER_LEN 0xFFF0 > > > > > > -struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int
cs,
> > > - unsigned int max_hz, unsigned int mode) > > > -{ > > > - struct fsl_spi_slave *fsl; > > > - sys_info_t sysinfo; > > > - unsigned long spibrg = 0; > > > - unsigned long spi_freq = 0; > > > - unsigned char pm = 0; > > > - > > > - if (!spi_cs_is_valid(bus, cs)) > > > - return NULL; > > > - > > > - fsl = spi_alloc_slave(struct fsl_spi_slave, bus, cs); > > > - if (!fsl) > > > - return NULL; > > > - > > > - fsl->espi = (void *)(CONFIG_SYS_MPC85xx_ESPI_ADDR); > > > - fsl->mode = mode; > > > - fsl->max_transfer_length =
ESPI_MAX_DATA_TRANSFER_LEN;
> > > - > > > - /* Set eSPI BRG clock source */ > > > - get_sys_info(&sysinfo); > > > - spibrg = sysinfo.freq_systembus / 2; > > > - fsl->div16 = 0; > > > - if ((spibrg / max_hz) > 32) { > > > - fsl->div16 = ESPI_CSMODE_DIV16; > > > - pm = spibrg / (max_hz * 16 * 2); > > > - if (pm > 16) { > > > - pm = 16; > > > - debug("Requested speed is too
low: %d
Hz, %ld > > Hz " > > > - "is used.\n", max_hz, spibrg
/ (32
16)); > > > - } > > > - } else > > > - pm = spibrg / (max_hz * 2); > > > - if (pm) > > > - pm--; > > > - fsl->pm = pm; > > > - > > > - if (fsl->div16) > > > - spi_freq = spibrg / ((pm + 1) * 2 * 16); > > > - else > > > - spi_freq = spibrg / ((pm + 1) * 2); > > > - > > > - /* set tx_timeout to 10 times of one espi FIFO entry go
out
*/
> > > - fsl->tx_timeout = DIV_ROUND_UP((US_PER_SECOND * > > ESPI_FIFO_WIDTH_BIT > > > - * 10), spi_freq); > > > - > > > - return &fsl->slave; > > > -} > > > - > > > -void spi_free_slave(struct spi_slave *slave) > > > +#ifndef CONFIG_DM_SPI > > > > Would you try for full dm-conversion? it would be hard to > > move all respective defconfigs to use but better try since > > we have next version deadline for full dm-conversion. thanks! > Currently my espi driver is modified to be compatible with > dm configuration and non-dm configuration. > If uboot don't need non-dm code in the future, I will remove > this compatibility and only keep the dm driver code. Thank you.
Idea is to make fully dm supported and ie what we have migration deadline, doc/driver-model/MIGRATION.txt
Do you mean that I need to delete the original non-dm code? Or there are some values in the dm code that do not come from dts! Can you tell me something about it? Thank you!
If not dt, can be done via platdata, we have few drivers with similar support drivers/spi/pl022_spi.c
I am trying to break dead-lock here.
Request from Jagan i.e. convert this driver in full DM model. Remove
non-dm compatibility.
Considering most of the NXP's PowerPC platforms are not supported device
tree.
A middle path will be platdata similar to drivers/spi/pl022_spi.c.
platdata is straightforward, we have a driver that supported. only concern I can see here, the boards which are using this driver would have dm, of_control or platdata if they want to use fully converted fsl_espi.c
Ok, I will do a full dm conversion in June.

Add espi controller node to support t2080.
Signed-off-by: Chuanhua Han chuanhua.han@nxp.com --- depends on: - https://patchwork.ozlabs.org/project/uboot/list/?series=99439
arch/powerpc/dts/t2080.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+)
diff --git a/arch/powerpc/dts/t2080.dtsi b/arch/powerpc/dts/t2080.dtsi index d2bebb08b6..e3970d3590 100644 --- a/arch/powerpc/dts/t2080.dtsi +++ b/arch/powerpc/dts/t2080.dtsi @@ -69,6 +69,16 @@ voltage-ranges = <1800 1800 3300 3300>; };
+ espi0: spi@110000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,mpc8536-espi"; + reg = <0x110000 0x1000>; + interrupts = <53 0x2 0 0>; + fsl,espi-num-chipselects = <4>; + status = "disabled"; + }; + usb0: usb@210000 { compatible = "fsl-usb2-mph"; reg = <0x210000 0x1000>;

Add espi slave nodes to support t2080qds.
Signed-off-by: Chuanhua Han chuanhua.han@nxp.com --- depends on: - https://patchwork.ozlabs.org/project/uboot/list/?series=99439
arch/powerpc/dts/t2080qds.dts | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+)
diff --git a/arch/powerpc/dts/t2080qds.dts b/arch/powerpc/dts/t2080qds.dts index 1819a081dd..5eebe26010 100644 --- a/arch/powerpc/dts/t2080qds.dts +++ b/arch/powerpc/dts/t2080qds.dts @@ -14,4 +14,37 @@ #address-cells = <2>; #size-cells = <2>; interrupt-parent = <&mpic>; + + aliases { + spi0 = &espi0; + }; +}; + +&espi0 { + + status = "okay"; + flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "micron,n25q128a11", "jedec,spi-nor"; /* 16MB */ + reg = <0>; + spi-max-frequency = <40000000>; /* input clock */ + }; + + flash@1 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "sst,sst25wf040", "jedec,spi-nor"; + reg = <1>; + spi-max-frequency = <35000000>; + }; + + flash@2 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "eon,en25s64", "jedec,spi-nor"; + reg = <2>; + spi-max-frequency = <35000000>; + }; + };

This patch is to enable espi DM for T2080QDS in uboot
Signed-off-by: Chuanhua Han chuanhua.han@nxp.com --- depends on: - https://patchwork.ozlabs.org/project/uboot/list/?series=99439
configs/T2080QDS_NAND_defconfig | 2 ++ configs/T2080QDS_SDCARD_defconfig | 2 ++ configs/T2080QDS_SECURE_BOOT_defconfig | 2 ++ configs/T2080QDS_SPIFLASH_defconfig | 2 ++ configs/T2080QDS_SRIO_PCIE_BOOT_defconfig | 2 ++ configs/T2080QDS_defconfig | 2 ++ 6 files changed, 12 insertions(+)
diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig index 72a6e8772b..1f8ae64294 100644 --- a/configs/T2080QDS_NAND_defconfig +++ b/configs/T2080QDS_NAND_defconfig @@ -66,3 +66,5 @@ CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_STORAGE=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig index 2e3a51aa0a..668a92b49c 100644 --- a/configs/T2080QDS_SDCARD_defconfig +++ b/configs/T2080QDS_SDCARD_defconfig @@ -65,3 +65,5 @@ CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_STORAGE=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig index 6cb36ebbb3..8e317d8e4e 100644 --- a/configs/T2080QDS_SECURE_BOOT_defconfig +++ b/configs/T2080QDS_SECURE_BOOT_defconfig @@ -58,3 +58,5 @@ CONFIG_USB_STORAGE=y CONFIG_RSA=y CONFIG_SPL_RSA=y CONFIG_RSA_SOFTWARE_EXP=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig index 9d17a99198..5da8c3a060 100644 --- a/configs/T2080QDS_SPIFLASH_defconfig +++ b/configs/T2080QDS_SPIFLASH_defconfig @@ -66,3 +66,5 @@ CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_STORAGE=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y diff --git a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig index 560ae143a1..2fa6ccc8d1 100644 --- a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig +++ b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig @@ -48,3 +48,5 @@ CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_STORAGE=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig index 4d6314b1cf..8c5735aede 100644 --- a/configs/T2080QDS_defconfig +++ b/configs/T2080QDS_defconfig @@ -55,3 +55,5 @@ CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_STORAGE=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y
participants (3)
-
Chuanhua Han
-
Jagan Teki
-
Prabhakar Kushwaha