[U-Boot] [PATCH] mx6slevk: Add SPI NOR flash support

From: Fabio Estevam fabio.estevam@freescale.com
mx6slevk has a m25p32 SPI NOR flash connected to ESCSPI port.
Add support for it.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com --- arch/arm/include/asm/arch-mx6/mx6sl_pins.h | 4 ++++ board/freescale/mx6slevk/mx6slevk.c | 20 ++++++++++++++++++++ include/configs/mx6slevk.h | 12 ++++++++++++ 3 files changed, 36 insertions(+)
diff --git a/arch/arm/include/asm/arch-mx6/mx6sl_pins.h b/arch/arm/include/asm/arch-mx6/mx6sl_pins.h index 5f9c90a..045ccc4 100644 --- a/arch/arm/include/asm/arch-mx6/mx6sl_pins.h +++ b/arch/arm/include/asm/arch-mx6/mx6sl_pins.h @@ -10,6 +10,10 @@ #include <asm/imx-common/iomux-v3.h>
enum { + MX6_PAD_ECSPI1_MISO__ECSPI_MISO = IOMUX_PAD(0x0358, 0x0068, 0, 0x0684, 0, 0), + MX6_PAD_ECSPI1_MOSI__ECSPI_MOSI = IOMUX_PAD(0x035C, 0x006C, 0, 0x0688, 0, 0), + MX6_PAD_ECSPI1_SCLK__ECSPI_SCLK = IOMUX_PAD(0x0360, 0x0070, 0, 0x067C, 0, 0), + MX6_PAD_ECSPI1_SS0__GPIO4_IO11 = IOMUX_PAD(0x0364, 0x0074, 5, 0x0000, 0, 0), MX6_PAD_SD2_CLK__USDHC2_CLK = IOMUX_PAD(0x055C, 0x0254, 0, 0x0000, 0, 0), MX6_PAD_SD2_CMD__USDHC2_CMD = IOMUX_PAD(0x0560, 0x0258, 0, 0x0000, 0, 0), MX6_PAD_SD2_DAT0__USDHC2_DAT0 = IOMUX_PAD(0x0564, 0x025C, 0, 0x0000, 0, 0), diff --git a/board/freescale/mx6slevk/mx6slevk.c b/board/freescale/mx6slevk/mx6slevk.c index aadad32..d2b64cc 100644 --- a/board/freescale/mx6slevk/mx6slevk.c +++ b/board/freescale/mx6slevk/mx6slevk.c @@ -34,6 +34,9 @@ DECLARE_GLOBAL_DATA_PTR; PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
+#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) + #define ETH_PHY_RESET IMX_GPIO_NR(4, 21)
int dram_init(void) @@ -71,6 +74,20 @@ static iomux_v3_cfg_t const fec_pads[] = { MX6_PAD_FEC_TX_CLK__GPIO_4_21 | MUX_PAD_CTRL(NO_PAD_CTRL), };
+#ifdef CONFIG_MXC_SPI +static iomux_v3_cfg_t ecspi1_pads[] = { + MX6_PAD_ECSPI1_MISO__ECSPI_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_ECSPI1_MOSI__ECSPI_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_ECSPI1_SCLK__ECSPI_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_ECSPI1_SS0__GPIO4_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +static void setup_spi(void) +{ + imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads)); +} +#endif + static void setup_iomux_uart(void) { imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); @@ -132,6 +149,9 @@ static int setup_fec(void) int board_early_init_f(void) { setup_iomux_uart(); +#ifdef CONFIG_MXC_SPI + setup_spi(); +#endif return 0; }
diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h index 1876dbf..3d05a64 100644 --- a/include/configs/mx6slevk.h +++ b/include/configs/mx6slevk.h @@ -10,6 +10,7 @@ #define __CONFIG_H
#include <asm/arch/imx-regs.h> +#include <asm/imx-common/gpio.h> #include <linux/sizes.h> #include "mx6_common.h"
@@ -196,4 +197,15 @@ #define CONFIG_CMD_CACHE #endif
+#define CONFIG_CMD_SF +#ifdef CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_STMICRO +#define CONFIG_MXC_SPI +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS (0 | (IMX_GPIO_NR(4, 11) << 8)) +#define CONFIG_SF_DEFAULT_SPEED 20000000 +#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 +#endif + #endif /* __CONFIG_H */

On Friday, April 11, 2014 at 01:39:43 PM, Fabio Estevam wrote:
From: Fabio Estevam fabio.estevam@freescale.com
mx6slevk has a m25p32 SPI NOR flash connected to ESCSPI port.
Add support for it.
So now the SPI works or is it still broken?
Best regards, Marek Vasut

On Fri, Apr 11, 2014 at 8:58 AM, Marek Vasut marex@denx.de wrote:
On Friday, April 11, 2014 at 01:39:43 PM, Fabio Estevam wrote:
From: Fabio Estevam fabio.estevam@freescale.com
mx6slevk has a m25p32 SPI NOR flash connected to ESCSPI port.
Add support for it.
So now the SPI works or is it still broken?
Works fine now:
=> sf probe SF: Detected M25P32 with page size 256 Bytes, erase size 64 KiB, total 4 MiB
Regards,
Fabio Estevam

On Friday, April 11, 2014 at 01:39:43 PM, Fabio Estevam wrote:
From: Fabio Estevam fabio.estevam@freescale.com
mx6slevk has a m25p32 SPI NOR flash connected to ESCSPI port.
Add support for it.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com
Acked-by: Marek Vasut marex@denx.de
Best regards, Marek Vasut

Works like a charm now. Thanks for the update. U-Boot is awesome!
On Fri, Apr 11, 2014 at 6:39 AM, Fabio Estevam festevam@gmail.com wrote:
From: Fabio Estevam fabio.estevam@freescale.com
mx6slevk has a m25p32 SPI NOR flash connected to ESCSPI port.
Add support for it.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com
arch/arm/include/asm/arch-mx6/mx6sl_pins.h | 4 ++++ board/freescale/mx6slevk/mx6slevk.c | 20 ++++++++++++++++++++ include/configs/mx6slevk.h | 12 ++++++++++++ 3 files changed, 36 insertions(+)
diff --git a/arch/arm/include/asm/arch-mx6/mx6sl_pins.h b/arch/arm/include/asm/arch-mx6/mx6sl_pins.h index 5f9c90a..045ccc4 100644 --- a/arch/arm/include/asm/arch-mx6/mx6sl_pins.h +++ b/arch/arm/include/asm/arch-mx6/mx6sl_pins.h @@ -10,6 +10,10 @@ #include <asm/imx-common/iomux-v3.h>
enum {
MX6_PAD_ECSPI1_MISO__ECSPI_MISO =
IOMUX_PAD(0x0358, 0x0068, 0, 0x0684, 0, 0),
MX6_PAD_ECSPI1_MOSI__ECSPI_MOSI =
IOMUX_PAD(0x035C, 0x006C, 0, 0x0688, 0, 0),
MX6_PAD_ECSPI1_SCLK__ECSPI_SCLK =
IOMUX_PAD(0x0360, 0x0070, 0, 0x067C, 0, 0),
MX6_PAD_ECSPI1_SS0__GPIO4_IO11 =
IOMUX_PAD(0x0364, 0x0074, 5, 0x0000, 0, 0), MX6_PAD_SD2_CLK__USDHC2_CLK = IOMUX_PAD(0x055C, 0x0254, 0, 0x0000, 0, 0), MX6_PAD_SD2_CMD__USDHC2_CMD = IOMUX_PAD(0x0560, 0x0258, 0, 0x0000, 0, 0), MX6_PAD_SD2_DAT0__USDHC2_DAT0 = IOMUX_PAD(0x0564, 0x025C, 0, 0x0000, 0, 0), diff --git a/board/freescale/mx6slevk/mx6slevk.c b/board/freescale/mx6slevk/mx6slevk.c index aadad32..d2b64cc 100644 --- a/board/freescale/mx6slevk/mx6slevk.c +++ b/board/freescale/mx6slevk/mx6slevk.c @@ -34,6 +34,9 @@ DECLARE_GLOBAL_DATA_PTR; PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
+#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
#define ETH_PHY_RESET IMX_GPIO_NR(4, 21)
int dram_init(void) @@ -71,6 +74,20 @@ static iomux_v3_cfg_t const fec_pads[] = { MX6_PAD_FEC_TX_CLK__GPIO_4_21 | MUX_PAD_CTRL(NO_PAD_CTRL), };
+#ifdef CONFIG_MXC_SPI +static iomux_v3_cfg_t ecspi1_pads[] = {
MX6_PAD_ECSPI1_MISO__ECSPI_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL),
MX6_PAD_ECSPI1_MOSI__ECSPI_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL),
MX6_PAD_ECSPI1_SCLK__ECSPI_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL),
MX6_PAD_ECSPI1_SS0__GPIO4_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL),
+};
+static void setup_spi(void) +{
imx_iomux_v3_setup_multiple_pads(ecspi1_pads,
ARRAY_SIZE(ecspi1_pads)); +} +#endif
static void setup_iomux_uart(void) { imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); @@ -132,6 +149,9 @@ static int setup_fec(void) int board_early_init_f(void) { setup_iomux_uart(); +#ifdef CONFIG_MXC_SPI
setup_spi();
+#endif return 0; }
diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h index 1876dbf..3d05a64 100644 --- a/include/configs/mx6slevk.h +++ b/include/configs/mx6slevk.h @@ -10,6 +10,7 @@ #define __CONFIG_H
#include <asm/arch/imx-regs.h> +#include <asm/imx-common/gpio.h> #include <linux/sizes.h> #include "mx6_common.h"
@@ -196,4 +197,15 @@ #define CONFIG_CMD_CACHE #endif
+#define CONFIG_CMD_SF +#ifdef CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_STMICRO +#define CONFIG_MXC_SPI +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS (0 | (IMX_GPIO_NR(4, 11) << 8)) +#define CONFIG_SF_DEFAULT_SPEED 20000000 +#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 +#endif
#endif /* __CONFIG_H */
1.8.3.2

On Fri, Apr 11, 2014 at 5:09 PM, Fabio Estevam festevam@gmail.com wrote:
From: Fabio Estevam fabio.estevam@freescale.com
mx6slevk has a m25p32 SPI NOR flash connected to ESCSPI port.
Add support for it.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com
arch/arm/include/asm/arch-mx6/mx6sl_pins.h | 4 ++++ board/freescale/mx6slevk/mx6slevk.c | 20 ++++++++++++++++++++ include/configs/mx6slevk.h | 12 ++++++++++++ 3 files changed, 36 insertions(+)
diff --git a/arch/arm/include/asm/arch-mx6/mx6sl_pins.h b/arch/arm/include/asm/arch-mx6/mx6sl_pins.h index 5f9c90a..045ccc4 100644 --- a/arch/arm/include/asm/arch-mx6/mx6sl_pins.h +++ b/arch/arm/include/asm/arch-mx6/mx6sl_pins.h @@ -10,6 +10,10 @@ #include <asm/imx-common/iomux-v3.h>
enum {
MX6_PAD_ECSPI1_MISO__ECSPI_MISO = IOMUX_PAD(0x0358, 0x0068, 0, 0x0684, 0, 0),
MX6_PAD_ECSPI1_MOSI__ECSPI_MOSI = IOMUX_PAD(0x035C, 0x006C, 0, 0x0688, 0, 0),
MX6_PAD_ECSPI1_SCLK__ECSPI_SCLK = IOMUX_PAD(0x0360, 0x0070, 0, 0x067C, 0, 0),
MX6_PAD_ECSPI1_SS0__GPIO4_IO11 = IOMUX_PAD(0x0364, 0x0074, 5, 0x0000, 0, 0), MX6_PAD_SD2_CLK__USDHC2_CLK = IOMUX_PAD(0x055C, 0x0254, 0, 0x0000, 0, 0), MX6_PAD_SD2_CMD__USDHC2_CMD = IOMUX_PAD(0x0560, 0x0258, 0, 0x0000, 0, 0), MX6_PAD_SD2_DAT0__USDHC2_DAT0 = IOMUX_PAD(0x0564, 0x025C, 0, 0x0000, 0, 0),
diff --git a/board/freescale/mx6slevk/mx6slevk.c b/board/freescale/mx6slevk/mx6slevk.c index aadad32..d2b64cc 100644 --- a/board/freescale/mx6slevk/mx6slevk.c +++ b/board/freescale/mx6slevk/mx6slevk.c @@ -34,6 +34,9 @@ DECLARE_GLOBAL_DATA_PTR; PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
+#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
#define ETH_PHY_RESET IMX_GPIO_NR(4, 21)
int dram_init(void) @@ -71,6 +74,20 @@ static iomux_v3_cfg_t const fec_pads[] = { MX6_PAD_FEC_TX_CLK__GPIO_4_21 | MUX_PAD_CTRL(NO_PAD_CTRL), };
+#ifdef CONFIG_MXC_SPI +static iomux_v3_cfg_t ecspi1_pads[] = {
MX6_PAD_ECSPI1_MISO__ECSPI_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL),
MX6_PAD_ECSPI1_MOSI__ECSPI_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL),
MX6_PAD_ECSPI1_SCLK__ECSPI_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL),
MX6_PAD_ECSPI1_SS0__GPIO4_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL),
+};
+static void setup_spi(void) +{
imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads));
+} +#endif
static void setup_iomux_uart(void) { imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); @@ -132,6 +149,9 @@ static int setup_fec(void) int board_early_init_f(void) { setup_iomux_uart(); +#ifdef CONFIG_MXC_SPI
setup_spi();
+#endif return 0; }
diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h index 1876dbf..3d05a64 100644 --- a/include/configs/mx6slevk.h +++ b/include/configs/mx6slevk.h @@ -10,6 +10,7 @@ #define __CONFIG_H
#include <asm/arch/imx-regs.h> +#include <asm/imx-common/gpio.h> #include <linux/sizes.h> #include "mx6_common.h"
@@ -196,4 +197,15 @@ #define CONFIG_CMD_CACHE #endif
+#define CONFIG_CMD_SF +#ifdef CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_STMICRO +#define CONFIG_MXC_SPI +#define CONFIG_SF_DEFAULT_BUS 0
*no_need* to define DEFAULT_BUS as 0 - it's default.
+#define CONFIG_SF_DEFAULT_CS (0 | (IMX_GPIO_NR(4, 11) << 8)) +#define CONFIG_SF_DEFAULT_SPEED 20000000 +#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 +#endif
#endif /* __CONFIG_H */
1.8.3.2
thanks!

On Saturday, April 12, 2014 at 12:30:51 PM, Jagan Teki wrote:
On Fri, Apr 11, 2014 at 5:09 PM, Fabio Estevam festevam@gmail.com wrote:
From: Fabio Estevam fabio.estevam@freescale.com
mx6slevk has a m25p32 SPI NOR flash connected to ESCSPI port.
Add support for it.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com
arch/arm/include/asm/arch-mx6/mx6sl_pins.h | 4 ++++ board/freescale/mx6slevk/mx6slevk.c | 20 ++++++++++++++++++++ include/configs/mx6slevk.h | 12 ++++++++++++ 3 files changed, 36 insertions(+)
diff --git a/arch/arm/include/asm/arch-mx6/mx6sl_pins.h b/arch/arm/include/asm/arch-mx6/mx6sl_pins.h index 5f9c90a..045ccc4 100644 --- a/arch/arm/include/asm/arch-mx6/mx6sl_pins.h +++ b/arch/arm/include/asm/arch-mx6/mx6sl_pins.h @@ -10,6 +10,10 @@
#include <asm/imx-common/iomux-v3.h>
enum {
MX6_PAD_ECSPI1_MISO__ECSPI_MISO =
IOMUX_PAD(0x0358, 0x0068, 0, 0x0684, 0, 0), + MX6_PAD_ECSPI1_MOSI__ECSPI_MOSI = IOMUX_PAD(0x035C, 0x006C, 0, 0x0688, 0, 0), + MX6_PAD_ECSPI1_SCLK__ECSPI_SCLK = IOMUX_PAD(0x0360, 0x0070, 0, 0x067C, 0, 0), + MX6_PAD_ECSPI1_SS0__GPIO4_IO11 = IOMUX_PAD(0x0364, 0x0074, 5, 0x0000, 0, 0),
MX6_PAD_SD2_CLK__USDHC2_CLK = IOMUX_PAD(0x055C, 0x0254, 0, 0x0000, 0, 0), MX6_PAD_SD2_CMD__USDHC2_CMD = IOMUX_PAD(0x0560, 0x0258, 0, 0x0000, 0, 0), MX6_PAD_SD2_DAT0__USDHC2_DAT0 = IOMUX_PAD(0x0564, 0x025C, 0, 0x0000, 0, 0),
diff --git a/board/freescale/mx6slevk/mx6slevk.c b/board/freescale/mx6slevk/mx6slevk.c index aadad32..d2b64cc 100644 --- a/board/freescale/mx6slevk/mx6slevk.c +++ b/board/freescale/mx6slevk/mx6slevk.c @@ -34,6 +34,9 @@ DECLARE_GLOBAL_DATA_PTR;
PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
+#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
#define ETH_PHY_RESET IMX_GPIO_NR(4, 21)
int dram_init(void)
@@ -71,6 +74,20 @@ static iomux_v3_cfg_t const fec_pads[] = {
MX6_PAD_FEC_TX_CLK__GPIO_4_21 | MUX_PAD_CTRL(NO_PAD_CTRL),
};
+#ifdef CONFIG_MXC_SPI +static iomux_v3_cfg_t ecspi1_pads[] = {
MX6_PAD_ECSPI1_MISO__ECSPI_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL),
MX6_PAD_ECSPI1_MOSI__ECSPI_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL),
MX6_PAD_ECSPI1_SCLK__ECSPI_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL),
MX6_PAD_ECSPI1_SS0__GPIO4_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL),
+};
+static void setup_spi(void) +{
imx_iomux_v3_setup_multiple_pads(ecspi1_pads,
ARRAY_SIZE(ecspi1_pads)); +} +#endif
static void setup_iomux_uart(void) {
imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
@@ -132,6 +149,9 @@ static int setup_fec(void)
int board_early_init_f(void) {
setup_iomux_uart();
+#ifdef CONFIG_MXC_SPI
setup_spi();
+#endif
return 0;
}
diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h index 1876dbf..3d05a64 100644 --- a/include/configs/mx6slevk.h +++ b/include/configs/mx6slevk.h @@ -10,6 +10,7 @@
#define __CONFIG_H
#include <asm/arch/imx-regs.h>
+#include <asm/imx-common/gpio.h>
#include <linux/sizes.h> #include "mx6_common.h"
@@ -196,4 +197,15 @@
#define CONFIG_CMD_CACHE #endif
+#define CONFIG_CMD_SF +#ifdef CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_STMICRO +#define CONFIG_MXC_SPI +#define CONFIG_SF_DEFAULT_BUS 0
*no_need* to define DEFAULT_BUS as 0 - it's default.
We better be explicit here.

On Sat, Apr 12, 2014 at 8:41 PM, Marek Vasut marex@denx.de wrote:
On Saturday, April 12, 2014 at 12:30:51 PM, Jagan Teki wrote:
On Fri, Apr 11, 2014 at 5:09 PM, Fabio Estevam festevam@gmail.com wrote:
From: Fabio Estevam fabio.estevam@freescale.com
mx6slevk has a m25p32 SPI NOR flash connected to ESCSPI port.
Add support for it.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com
arch/arm/include/asm/arch-mx6/mx6sl_pins.h | 4 ++++ board/freescale/mx6slevk/mx6slevk.c | 20 ++++++++++++++++++++ include/configs/mx6slevk.h | 12 ++++++++++++ 3 files changed, 36 insertions(+)
diff --git a/arch/arm/include/asm/arch-mx6/mx6sl_pins.h b/arch/arm/include/asm/arch-mx6/mx6sl_pins.h index 5f9c90a..045ccc4 100644 --- a/arch/arm/include/asm/arch-mx6/mx6sl_pins.h +++ b/arch/arm/include/asm/arch-mx6/mx6sl_pins.h @@ -10,6 +10,10 @@
#include <asm/imx-common/iomux-v3.h>
enum {
MX6_PAD_ECSPI1_MISO__ECSPI_MISO =
IOMUX_PAD(0x0358, 0x0068, 0, 0x0684, 0, 0), + MX6_PAD_ECSPI1_MOSI__ECSPI_MOSI = IOMUX_PAD(0x035C, 0x006C, 0, 0x0688, 0, 0), + MX6_PAD_ECSPI1_SCLK__ECSPI_SCLK = IOMUX_PAD(0x0360, 0x0070, 0, 0x067C, 0, 0), + MX6_PAD_ECSPI1_SS0__GPIO4_IO11 = IOMUX_PAD(0x0364, 0x0074, 5, 0x0000, 0, 0),
MX6_PAD_SD2_CLK__USDHC2_CLK = IOMUX_PAD(0x055C, 0x0254, 0, 0x0000, 0, 0), MX6_PAD_SD2_CMD__USDHC2_CMD = IOMUX_PAD(0x0560, 0x0258, 0, 0x0000, 0, 0), MX6_PAD_SD2_DAT0__USDHC2_DAT0 = IOMUX_PAD(0x0564, 0x025C, 0, 0x0000, 0, 0),
diff --git a/board/freescale/mx6slevk/mx6slevk.c b/board/freescale/mx6slevk/mx6slevk.c index aadad32..d2b64cc 100644 --- a/board/freescale/mx6slevk/mx6slevk.c +++ b/board/freescale/mx6slevk/mx6slevk.c @@ -34,6 +34,9 @@ DECLARE_GLOBAL_DATA_PTR;
PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
+#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
#define ETH_PHY_RESET IMX_GPIO_NR(4, 21)
int dram_init(void)
@@ -71,6 +74,20 @@ static iomux_v3_cfg_t const fec_pads[] = {
MX6_PAD_FEC_TX_CLK__GPIO_4_21 | MUX_PAD_CTRL(NO_PAD_CTRL),
};
+#ifdef CONFIG_MXC_SPI +static iomux_v3_cfg_t ecspi1_pads[] = {
MX6_PAD_ECSPI1_MISO__ECSPI_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL),
MX6_PAD_ECSPI1_MOSI__ECSPI_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL),
MX6_PAD_ECSPI1_SCLK__ECSPI_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL),
MX6_PAD_ECSPI1_SS0__GPIO4_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL),
+};
+static void setup_spi(void) +{
imx_iomux_v3_setup_multiple_pads(ecspi1_pads,
ARRAY_SIZE(ecspi1_pads)); +} +#endif
static void setup_iomux_uart(void) {
imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
@@ -132,6 +149,9 @@ static int setup_fec(void)
int board_early_init_f(void) {
setup_iomux_uart();
+#ifdef CONFIG_MXC_SPI
setup_spi();
+#endif
return 0;
}
diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h index 1876dbf..3d05a64 100644 --- a/include/configs/mx6slevk.h +++ b/include/configs/mx6slevk.h @@ -10,6 +10,7 @@
#define __CONFIG_H
#include <asm/arch/imx-regs.h>
+#include <asm/imx-common/gpio.h>
#include <linux/sizes.h> #include "mx6_common.h"
@@ -196,4 +197,15 @@
#define CONFIG_CMD_CACHE #endif
+#define CONFIG_CMD_SF +#ifdef CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_STMICRO +#define CONFIG_MXC_SPI +#define CONFIG_SF_DEFAULT_BUS 0
*no_need* to define DEFAULT_BUS as 0 - it's default.
We better be explicit here.
*explicit* fine - don't you think defining a default value may increase extra macro which looks *duplicate*
thanks!

On Saturday, April 12, 2014 at 07:50:35 PM, Jagan Teki wrote: [...]
diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h index 1876dbf..3d05a64 100644 --- a/include/configs/mx6slevk.h +++ b/include/configs/mx6slevk.h @@ -10,6 +10,7 @@
#define __CONFIG_H
#include <asm/arch/imx-regs.h>
+#include <asm/imx-common/gpio.h>
#include <linux/sizes.h> #include "mx6_common.h"
@@ -196,4 +197,15 @@
#define CONFIG_CMD_CACHE #endif
+#define CONFIG_CMD_SF +#ifdef CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_STMICRO +#define CONFIG_MXC_SPI +#define CONFIG_SF_DEFAULT_BUS 0
*no_need* to define DEFAULT_BUS as 0 - it's default.
We better be explicit here.
*explicit* fine - don't you think defining a default value may increase extra macro which looks *duplicate*
No.
Explicitly defining the value in the board file serves well for people who will dig in the SPI on this particular MX6 board as it will make it immediatelly clear to them which SPI bus is the SPI NOR sitting on. It makes things easily tweakable as well.
Also, is there any reason to put asterisks around random words in the sentence?
Best regards, Marek Vasut

On Sun, Apr 13, 2014 at 2:29 AM, Marek Vasut marex@denx.de wrote:
On Saturday, April 12, 2014 at 07:50:35 PM, Jagan Teki wrote: [...]
diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h index 1876dbf..3d05a64 100644 --- a/include/configs/mx6slevk.h +++ b/include/configs/mx6slevk.h @@ -10,6 +10,7 @@
#define __CONFIG_H
#include <asm/arch/imx-regs.h>
+#include <asm/imx-common/gpio.h>
#include <linux/sizes.h> #include "mx6_common.h"
@@ -196,4 +197,15 @@
#define CONFIG_CMD_CACHE #endif
+#define CONFIG_CMD_SF +#ifdef CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_STMICRO +#define CONFIG_MXC_SPI +#define CONFIG_SF_DEFAULT_BUS 0
*no_need* to define DEFAULT_BUS as 0 - it's default.
We better be explicit here.
*explicit* fine - don't you think defining a default value may increase extra macro which looks *duplicate*
No.
Explicitly defining the value in the board file serves well for people who will dig in the SPI on this particular MX6 board as it will make it immediatelly clear to them which SPI bus is the SPI NOR sitting on. It makes things easily tweakable as well.
Ok.
Also, is there any reason to put asterisks around random words in the sentence?
For important words in a sentence.
I saw could be see couple of warnings on this.
Reviewed-by: Jagannadha Sutradharudu Teki jaganna@xilinx.com
thanks!

On 11/04/2014 13:39, Fabio Estevam wrote:
From: Fabio Estevam fabio.estevam@freescale.com
mx6slevk has a m25p32 SPI NOR flash connected to ESCSPI port.
Add support for it.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com
Applied to u-boot-imx, thaanks !
Best regards, Stefano Babic
participants (5)
-
Fabio Estevam
-
Jagan Teki
-
Marek Vasut
-
Sam Catch
-
Stefano Babic