All existing MIPS boards define CFG_HZ to be the number of ticks per second for the timebase. However, CFG_HZ should be a constant 1000 for all boards.

This patch set CFG_HZ to be defined as 1000 for all MIPS boards, and uses the new configuration value 'CFG_MIPS_CLOCK' to calculate the timebase.

Per-board patches to board config files are included.

Signed-off-by: Jason McMullan mcmullan@netapp.com --- include/configs/dbau1x00.h | 3 ++- include/configs/gth2.h | 3 ++- include/configs/incaip.h | 3 ++- include/configs/pb1x00.h | 3 ++- include/configs/purple.h | 3 ++- include/configs/qemu-mips.h | 3 ++- include/configs/tb0229.h | 3 ++- lib_mips/time.c | 17 +++++++++++++++-- 8 files changed, 29 insertions(+), 9 deletions(-)

diff --git a/include/configs/dbau1x00.h b/include/configs/dbau1x00.h index b2f606f..b4cc0c2 100644 --- a/include/configs/dbau1x00.h +++ b/include/configs/dbau1x00.h @@ -148,7 +148,8 @@ #error "Invalid CPU frequency - must be multiple of 12!" #endif

-#define CFG_HZ (CFG_MHZ * 1000000) /* FIXME causes overflow in net.c */ +#define CFG_MIPS_CLOCK (CFG_MHZ * 1000000) +#define CFG_HZ 1000

#define CFG_SDRAM_BASE 0x80000000 /* Cached addr */

diff --git a/include/configs/gth2.h b/include/configs/gth2.h index c2a50c1..656eccb 100644 --- a/include/configs/gth2.h +++ b/include/configs/gth2.h @@ -117,8 +117,9 @@ #define CFG_BOOTPARAMS_LEN 128*1024

#define CFG_MHZ 500 +#define CFG_MIPS_CLOCK (CFG_MHZ * 1000000)

-#define CFG_HZ (CFG_MHZ * 1000000) /* FIXME causes overflow in net.c */ +#define CFG_HZ 1000

#define CFG_SDRAM_BASE 0x80000000 /* Cached addr */

diff --git a/include/configs/incaip.h b/include/configs/incaip.h index 5ca00b3..c0e26f2 100644 --- a/include/configs/incaip.h +++ b/include/configs/incaip.h @@ -118,7 +118,8 @@

#define CFG_BOOTPARAMS_LEN 128*1024

-#define CFG_HZ (incaip_get_cpuclk() / 2) +#define CFG_MIPS_CLOCK (incaip_get_cpuclk() / 2) +#define CFG_HZ 1000

#define CFG_SDRAM_BASE 0x80000000

diff --git a/include/configs/pb1x00.h b/include/configs/pb1x00.h index 810e0f0..5cb5069 100644 --- a/include/configs/pb1x00.h +++ b/include/configs/pb1x00.h @@ -81,7 +81,8 @@

#define CFG_BOOTPARAMS_LEN 128*1024

-#define CFG_HZ 396000000 /* FIXME causes overflow in net.c */ +#define CFG_MIPS_CLOCK 396000000 +#define CFG_HZ 1000

#define CFG_SDRAM_BASE 0x80000000 /* Cached addr */

diff --git a/include/configs/purple.h b/include/configs/purple.h index 1be4e05..9fe98f2 100644 --- a/include/configs/purple.h +++ b/include/configs/purple.h @@ -114,7 +114,8 @@ #define CFG_PROMPT "PURPLE # " /* Monitor Command Prompt */ #define CFG_CBSIZE 256 /* Console I/O Buffer Size */ #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ -#define CFG_HZ (CPU_CLOCK_RATE/2) +#define CFG_MIPS_CLOCK (CPU_CLOCK_RATE/2) +#define CFG_HZ 1000 #define CFG_MAXARGS 16 /* max number of command args*/

#define CFG_LOAD_ADDR 0x80500000 /* default load address */ diff --git a/include/configs/qemu-mips.h b/include/configs/qemu-mips.h index d6bcc8e..6889d7f 100644 --- a/include/configs/qemu-mips.h +++ b/include/configs/qemu-mips.h @@ -119,8 +119,9 @@ #define CFG_BOOTPARAMS_LEN 128*1024

#define CFG_MHZ 132 +#define CFG_MIPS_CLOCK (132 * 1000000)

-#define CFG_HZ (CFG_MHZ * 1000000) +#define CFG_HZ 1000

#define CFG_SDRAM_BASE 0x80000000 /* Cached addr */

diff --git a/include/configs/tb0229.h b/include/configs/tb0229.h index dadf5d3..82206d5 100644 --- a/include/configs/tb0229.h +++ b/include/configs/tb0229.h @@ -122,7 +122,8 @@

#define CFG_BOOTPARAMS_LEN 128*1024

-#define CFG_HZ (CPU_TCLOCK_RATE/4) +#define CFG_MIPS_CLOCK (CPU_TCLOCK_RATE/4) +#define CFG_HZ 1000

#define CFG_SDRAM_BASE 0x80000000

diff --git a/lib_mips/time.c b/lib_mips/time.c index cd8dc72..1746160 100644 --- a/lib_mips/time.c +++ b/lib_mips/time.c @@ -23,24 +23,37 @@

#include <common.h>

+/* CFG_MIPS_CLOCK is the number of ticks per second of the MIPS cpu timer. + * For MIPS processors, this is often the same as the CPU speed in HZ, + * however many embedded processors have a /2 or /4 divider. Please see + * your CPU reference manual for details. + */ +#ifndef CFG_MIPS_CLOCK +#error CFG_MIPS_CLOCK must be set in the board configuration file +#endif

+/* Input is in CFG_HZ ticks */ static inline void mips_compare_set(u32 v) { + v *= (CFG_MIPS_CLOCK / CFG_HZ); asm volatile ("mtc0 %0, $11" : : "r" (v)); }

+/* Input is in CFG_HZ ticks */ static inline void mips_count_set(u32 v) { + v *= (CFG_MIPS_CLOCK / CFG_HZ); asm volatile ("mtc0 %0, $9" : : "r" (v)); }

+/* Returns CFG_HZ ticks */ static inline u32 mips_count_get(void) { u32 count;

asm volatile ("mfc0 %0, $9" : "=r" (count) :); - return count; + return count / (CFG_MIPS_CLOCK / CFG_HZ); }

/* @@ -75,7 +88,7 @@ void udelay (unsigned long usec) ulong tmo; ulong start = get_timer(0);

- tmo = usec * (CFG_HZ / 1000000); + tmo = usec * CFG_HZ / 1000; while ((ulong)((mips_count_get() - start)) < tmo) /*NOP*/; }