A known hardware issue of USB1 port where bit 1 (connect status change) of PORTSC register will be set after issuing Port Reset (like "usb reset" in u-boot command line). This will be treated as an error and stops later device enumeration.

Therefore we clear that bit after Port Reset in order to proceed later device enumeration.

Signed-off-by: Jim Lin jilin@nvidia.com --- To reproduce this issue, you can modify board .dts file to set as the following to build u-boot binary. " usb0 = "/usb@c5000000"; usb1 = "/usb@c5008000"; " Install device on USB1 port (address at 0xc5000000). And run "usb reset" in u-boot console to enumerate device.

Before adding this patch, we could see problem every time. After adding, tried 10 times of "usb reset", "usb tree", "usb stop" , without seeing issue.

Changes in v3: - Move patch for USB1 controller into ehci_powerup_fixup of ehci-tegra.c - Update copyright year to 2012

Changes in v2: - Change config name - Add a callback function at the end of ehci_submit_root() function

drivers/usb/host/ehci-tegra.c | 19 ++++++++++++++++++- 1 files changed, 18 insertions(+), 1 deletions(-)

diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c index a7e105b..8e516e5 100644 --- a/drivers/usb/host/ehci-tegra.c +++ b/drivers/usb/host/ehci-tegra.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2009 NVIDIA Corporation + * Copyright (c) 2009-2012 NVIDIA Corporation * * See file CREDITS for list of people who contributed to this * project. @@ -29,6 +29,23 @@ #include <asm/errno.h> #include <asm/arch/usb.h>

+/* + * A known hardware issue where Connect Status Change bit of PORTSC register + * of USB1 controller will be set after Port Reset. + * We have to clear it in order for later device enumeration to proceed. + */ +void ehci_powerup_fixup(uint32_t *status_reg, uint32_t *reg) +{ + uint32_t my_reg; + + mdelay(50); + if (((u32) status_reg & 0xFFFFC000) != TEGRA_USB1_BASE) + return; + my_reg = ehci_readl(status_reg); + /* For EHCI_PS_CSC to be cleared in ehci_hcd.c */ + if (my_reg & EHCI_PS_CSC) + *reg |= EHCI_PS_CSC; +}

/* * Create the appropriate control structures to manage